From 41f9748a2d856aa3d1fe7b895e38ad3c4b65e11e Mon Sep 17 00:00:00 2001 From: Matt Ettus Date: Wed, 28 Jul 2010 18:59:03 -0700 Subject: sequence number reset upon programming streamid --- usrp2/vrt/vita_tx_chain.v | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'usrp2/vrt/vita_tx_chain.v') diff --git a/usrp2/vrt/vita_tx_chain.v b/usrp2/vrt/vita_tx_chain.v index bcdbea820..662cdca62 100644 --- a/usrp2/vrt/vita_tx_chain.v +++ b/usrp2/vrt/vita_tx_chain.v @@ -26,16 +26,17 @@ module vita_tx_chain wire error; wire [31:0] error_code; + wire clear_seqnum; assign underrun = error; assign message = error_code; setting_reg #(.my_addr(BASE_CTRL+2), .at_reset(0)) sr_streamid (.clk(clk),.rst(reset),.strobe(set_stb),.addr(set_addr), - .in(set_data),.out(streamid),.changed()); + .in(set_data),.out(streamid),.changed(clear_seqnum)); vita_tx_deframer #(.BASE(BASE_CTRL), .MAXCHAN(MAXCHAN)) vita_tx_deframer - (.clk(clk), .reset(reset), .clear(clear_vita), + (.clk(clk), .reset(reset), .clear(clear_vita), .clear_seqnum(clear_seqnum), .set_stb(set_stb),.set_addr(set_addr),.set_data(set_data), .data_i(tx_data_i), .src_rdy_i(tx_src_rdy_i), .dst_rdy_o(tx_dst_rdy_o), .sample_fifo_o(tx1_data), .sample_fifo_src_rdy_o(tx1_src_rdy), .sample_fifo_dst_rdy_i(tx1_dst_rdy), -- cgit v1.2.3