From b33b611d0600437c89f27a93077b8966416b1e9f Mon Sep 17 00:00:00 2001 From: Josh Blum Date: Fri, 4 Nov 2011 23:24:42 -0700 Subject: increase vita rx fifosize to 10, like USRP2, make things work --- usrp2/top/B100/u1plus_core.v | 4 ++-- usrp2/top/E1x0/u1e_core.v | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) (limited to 'usrp2/top') diff --git a/usrp2/top/B100/u1plus_core.v b/usrp2/top/B100/u1plus_core.v index 48eb6c935..86bf747a0 100644 --- a/usrp2/top/B100/u1plus_core.v +++ b/usrp2/top/B100/u1plus_core.v @@ -162,7 +162,7 @@ module u1plus_core .sample(sample_rx0), .run(run_rx0), .strobe(strobe_rx0), .debug() ); - vita_rx_chain #(.BASE(SR_RX_CTRL0), .UNIT(0), .FIFOSIZE(9), .PROT_ENG_FLAGS(0)) vita_rx_chain0 + vita_rx_chain #(.BASE(SR_RX_CTRL0), .UNIT(0), .FIFOSIZE(10), .PROT_ENG_FLAGS(0)) vita_rx_chain0 (.clk(wb_clk),.reset(wb_rst),.clear(clear_rx), .set_stb(set_stb),.set_addr(set_addr),.set_data(set_data), .vita_time(vita_time), .overrun(rx_overrun_dsp0), @@ -185,7 +185,7 @@ module u1plus_core .sample(sample_rx1), .run(run_rx1), .strobe(strobe_rx1), .debug() ); - vita_rx_chain #(.BASE(SR_RX_CTRL1), .UNIT(1), .FIFOSIZE(9), .PROT_ENG_FLAGS(0)) vita_rx_chain1 + vita_rx_chain #(.BASE(SR_RX_CTRL1), .UNIT(1), .FIFOSIZE(10), .PROT_ENG_FLAGS(0)) vita_rx_chain1 (.clk(wb_clk),.reset(wb_rst),.clear(clear_rx), .set_stb(set_stb),.set_addr(set_addr),.set_data(set_data), .vita_time(vita_time), .overrun(rx_overrun_dsp1), diff --git a/usrp2/top/E1x0/u1e_core.v b/usrp2/top/E1x0/u1e_core.v index 6cb21b114..496a7ef4c 100644 --- a/usrp2/top/E1x0/u1e_core.v +++ b/usrp2/top/E1x0/u1e_core.v @@ -167,7 +167,7 @@ module u1e_core .sample(sample_rx0), .run(run_rx0), .strobe(strobe_rx0), .debug() ); - vita_rx_chain #(.BASE(SR_RX_CTRL0), .UNIT(0), .FIFOSIZE(9), .PROT_ENG_FLAGS(0)) vita_rx_chain0 + vita_rx_chain #(.BASE(SR_RX_CTRL0), .UNIT(0), .FIFOSIZE(10), .PROT_ENG_FLAGS(0)) vita_rx_chain0 (.clk(wb_clk),.reset(wb_rst),.clear(clear_rx), .set_stb(set_stb),.set_addr(set_addr),.set_data(set_data), .vita_time(vita_time), .overrun(rx_overrun_dsp0), @@ -190,7 +190,7 @@ module u1e_core .sample(sample_rx1), .run(run_rx1), .strobe(strobe_rx1), .debug() ); - vita_rx_chain #(.BASE(SR_RX_CTRL1), .UNIT(1), .FIFOSIZE(9), .PROT_ENG_FLAGS(0)) vita_rx_chain1 + vita_rx_chain #(.BASE(SR_RX_CTRL1), .UNIT(1), .FIFOSIZE(10), .PROT_ENG_FLAGS(0)) vita_rx_chain1 (.clk(wb_clk),.reset(wb_rst),.clear(clear_rx), .set_stb(set_stb),.set_addr(set_addr),.set_data(set_data), .vita_time(vita_time), .overrun(rx_overrun_dsp1), -- cgit v1.2.3