From 7a95ea36f86c512fbbaf34c99e1ba5c3a0237f54 Mon Sep 17 00:00:00 2001 From: Josh Blum Date: Mon, 12 Mar 2012 13:54:42 -0700 Subject: fpga: force -include_global for custom sources ISE will not recognize custom sources as part of the hierarchy, and thus will not compile (unless its the first macro...). Remove custom sources from the source list, and specially add them with the -include_global option. --- usrp2/top/B100/Makefile.B100 | 2 +- usrp2/top/E1x0/Makefile.E100 | 2 +- usrp2/top/E1x0/Makefile.E110 | 2 +- usrp2/top/N2x0/Makefile.N200R3 | 3 +-- usrp2/top/N2x0/Makefile.N200R4 | 3 +-- usrp2/top/N2x0/Makefile.N210R3 | 3 +-- usrp2/top/N2x0/Makefile.N210R4 | 3 +-- usrp2/top/USRP2/Makefile | 3 +-- usrp2/top/tcl/ise_helper.tcl | 8 ++++++++ 9 files changed, 16 insertions(+), 13 deletions(-) (limited to 'usrp2/top') diff --git a/usrp2/top/B100/Makefile.B100 b/usrp2/top/B100/Makefile.B100 index 48dc7dfd3..4687f2169 100644 --- a/usrp2/top/B100/Makefile.B100 +++ b/usrp2/top/B100/Makefile.B100 @@ -57,7 +57,7 @@ SOURCES = $(abspath $(TOP_SRCS)) $(FIFO_SRCS) \ $(CONTROL_LIB_SRCS) $(SDR_LIB_SRCS) $(SERDES_SRCS) \ $(SIMPLE_GEMAC_SRCS) $(TIMING_SRCS) $(OPENCORES_SRCS) \ $(VRT_SRCS) $(UDP_SRCS) $(COREGEN_SRCS) $(EXTRAM_SRCS) \ -$(GPIF_SRCS) $(CUSTOM_SRCS) +$(GPIF_SRCS) ################################################## # Process Properties diff --git a/usrp2/top/E1x0/Makefile.E100 b/usrp2/top/E1x0/Makefile.E100 index d3cdc92e0..3ba7e1031 100644 --- a/usrp2/top/E1x0/Makefile.E100 +++ b/usrp2/top/E1x0/Makefile.E100 @@ -57,7 +57,7 @@ SOURCES = $(abspath $(TOP_SRCS)) $(FIFO_SRCS) \ $(CONTROL_LIB_SRCS) $(SDR_LIB_SRCS) $(SERDES_SRCS) \ $(SIMPLE_GEMAC_SRCS) $(TIMING_SRCS) $(OPENCORES_SRCS) \ $(VRT_SRCS) $(UDP_SRCS) $(COREGEN_SRCS) $(EXTRAM_SRCS) \ -$(GPMC_SRCS) $(CUSTOM_SRCS) +$(GPMC_SRCS) ################################################## # Process Properties diff --git a/usrp2/top/E1x0/Makefile.E110 b/usrp2/top/E1x0/Makefile.E110 index 37dc0af1e..89e51b523 100644 --- a/usrp2/top/E1x0/Makefile.E110 +++ b/usrp2/top/E1x0/Makefile.E110 @@ -57,7 +57,7 @@ SOURCES = $(abspath $(TOP_SRCS)) $(FIFO_SRCS) \ $(CONTROL_LIB_SRCS) $(SDR_LIB_SRCS) $(SERDES_SRCS) \ $(SIMPLE_GEMAC_SRCS) $(TIMING_SRCS) $(OPENCORES_SRCS) \ $(VRT_SRCS) $(UDP_SRCS) $(COREGEN_SRCS) $(EXTRAM_SRCS) \ -$(GPMC_SRCS) $(CUSTOM_SRCS) +$(GPMC_SRCS) ################################################## # Process Properties diff --git a/usrp2/top/N2x0/Makefile.N200R3 b/usrp2/top/N2x0/Makefile.N200R3 index 680cadf44..07b955d13 100644 --- a/usrp2/top/N2x0/Makefile.N200R3 +++ b/usrp2/top/N2x0/Makefile.N200R3 @@ -56,8 +56,7 @@ u2plus.ucf SOURCES = $(abspath $(TOP_SRCS)) $(FIFO_SRCS) \ $(CONTROL_LIB_SRCS) $(SDR_LIB_SRCS) $(SERDES_SRCS) \ $(SIMPLE_GEMAC_SRCS) $(TIMING_SRCS) $(OPENCORES_SRCS) \ -$(VRT_SRCS) $(UDP_SRCS) $(COREGEN_SRCS) $(EXTRAM_SRCS) \ -$(CUSTOM_SRCS) +$(VRT_SRCS) $(UDP_SRCS) $(COREGEN_SRCS) $(EXTRAM_SRCS) ################################################## # Process Properties diff --git a/usrp2/top/N2x0/Makefile.N200R4 b/usrp2/top/N2x0/Makefile.N200R4 index 5c9ffd7a6..8b1090308 100644 --- a/usrp2/top/N2x0/Makefile.N200R4 +++ b/usrp2/top/N2x0/Makefile.N200R4 @@ -57,8 +57,7 @@ u2plus.ucf SOURCES = $(abspath $(TOP_SRCS)) $(FIFO_SRCS) \ $(CONTROL_LIB_SRCS) $(SDR_LIB_SRCS) $(SERDES_SRCS) \ $(SIMPLE_GEMAC_SRCS) $(TIMING_SRCS) $(OPENCORES_SRCS) \ -$(VRT_SRCS) $(UDP_SRCS) $(COREGEN_SRCS) $(EXTRAM_SRCS) \ -$(CUSTOM_SRCS) +$(VRT_SRCS) $(UDP_SRCS) $(COREGEN_SRCS) $(EXTRAM_SRCS) ################################################## # Process Properties diff --git a/usrp2/top/N2x0/Makefile.N210R3 b/usrp2/top/N2x0/Makefile.N210R3 index 0b53ac951..411aa20f1 100644 --- a/usrp2/top/N2x0/Makefile.N210R3 +++ b/usrp2/top/N2x0/Makefile.N210R3 @@ -56,8 +56,7 @@ u2plus.ucf SOURCES = $(abspath $(TOP_SRCS)) $(FIFO_SRCS) \ $(CONTROL_LIB_SRCS) $(SDR_LIB_SRCS) $(SERDES_SRCS) \ $(SIMPLE_GEMAC_SRCS) $(TIMING_SRCS) $(OPENCORES_SRCS) \ -$(VRT_SRCS) $(UDP_SRCS) $(COREGEN_SRCS) $(EXTRAM_SRCS) \ -$(CUSTOM_SRCS) +$(VRT_SRCS) $(UDP_SRCS) $(COREGEN_SRCS) $(EXTRAM_SRCS) ################################################## # Process Properties diff --git a/usrp2/top/N2x0/Makefile.N210R4 b/usrp2/top/N2x0/Makefile.N210R4 index a7d2a9b49..44ce17b3f 100644 --- a/usrp2/top/N2x0/Makefile.N210R4 +++ b/usrp2/top/N2x0/Makefile.N210R4 @@ -57,8 +57,7 @@ u2plus.ucf SOURCES = $(abspath $(TOP_SRCS)) $(FIFO_SRCS) \ $(CONTROL_LIB_SRCS) $(SDR_LIB_SRCS) $(SERDES_SRCS) \ $(SIMPLE_GEMAC_SRCS) $(TIMING_SRCS) $(OPENCORES_SRCS) \ -$(VRT_SRCS) $(UDP_SRCS) $(COREGEN_SRCS) $(EXTRAM_SRCS) \ -$(CUSTOM_SRCS) +$(VRT_SRCS) $(UDP_SRCS) $(COREGEN_SRCS) $(EXTRAM_SRCS) ################################################## # Process Properties diff --git a/usrp2/top/USRP2/Makefile b/usrp2/top/USRP2/Makefile index 1fc375c76..10610c7dc 100644 --- a/usrp2/top/USRP2/Makefile +++ b/usrp2/top/USRP2/Makefile @@ -56,8 +56,7 @@ u2_rev3.ucf SOURCES = $(abspath $(TOP_SRCS)) $(FIFO_SRCS) \ $(CONTROL_LIB_SRCS) $(SDR_LIB_SRCS) $(SERDES_SRCS) \ $(SIMPLE_GEMAC_SRCS) $(TIMING_SRCS) $(OPENCORES_SRCS) \ -$(VRT_SRCS) $(UDP_SRCS) $(COREGEN_SRCS) $(EXTRAM_SRCS) \ -$(CUSTOM_SRCS) +$(VRT_SRCS) $(UDP_SRCS) $(COREGEN_SRCS) $(EXTRAM_SRCS) ################################################## # Process Properties diff --git a/usrp2/top/tcl/ise_helper.tcl b/usrp2/top/tcl/ise_helper.tcl index f11596f8b..c5ceded1b 100644 --- a/usrp2/top/tcl/ise_helper.tcl +++ b/usrp2/top/tcl/ise_helper.tcl @@ -58,6 +58,14 @@ if [file isfile $env(ISE_FILE)] { xfile add $source } + ################################################## + # Add the custom sources + ################################################## + foreach source $env(CUSTOM_SRCS) { + puts ">>> Adding custom source to project: $source" + xfile add $source -include_global + } + ################################################## # Set the top level module ################################################## -- cgit v1.2.3