From 6f172696365d5ac2887c7c08f3f0c5e561121c87 Mon Sep 17 00:00:00 2001
From: Matt Ettus <matt@ettus.com>
Date: Wed, 2 Jun 2010 14:57:09 -0700
Subject: copied over from other repo.  Beginnings of a skeleton fpga image for
 USRP1-Plus

---
 usrp2/top/u1plus/timing.ucf | 2 ++
 1 file changed, 2 insertions(+)
 create mode 100644 usrp2/top/u1plus/timing.ucf

(limited to 'usrp2/top/u1plus/timing.ucf')

diff --git a/usrp2/top/u1plus/timing.ucf b/usrp2/top/u1plus/timing.ucf
new file mode 100644
index 000000000..ca5ebf8e3
--- /dev/null
+++ b/usrp2/top/u1plus/timing.ucf
@@ -0,0 +1,2 @@
+NET "CLK_FPGA_P" TNM_NET = "CLK_FPGA_P";
+TIMESPEC "TS_CLK_FPGA_P" = PERIOD "CLK_FPGA_P" 15625 ps HIGH 50 %;
-- 
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