From fdf98d12a58548a929ce44a860d8981c707f3ec7 Mon Sep 17 00:00:00 2001
From: Josh Blum <josh@joshknows.com>
Date: Fri, 9 Mar 2012 16:53:11 -0800
Subject: fifo ctrl: minor fixes for spi core, swap time define

---
 usrp2/top/N2x0/Makefile.N210R3 | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'usrp2/top/N2x0/Makefile.N210R3')

diff --git a/usrp2/top/N2x0/Makefile.N210R3 b/usrp2/top/N2x0/Makefile.N210R3
index 3ef769d3a..411aa20f1 100644
--- a/usrp2/top/N2x0/Makefile.N210R3
+++ b/usrp2/top/N2x0/Makefile.N210R3
@@ -70,7 +70,7 @@ SYNTHESIZE_PROPERTIES = \
 "Use Clock Enable" Auto \
 "Use Synchronous Reset" Auto \
 "Use Synchronous Set" Auto \
-"Verilog Macros" " FIFO_CTRL_USE_TIME=1 $(CUSTOM_DEFS)"
+"Verilog Macros" "$(CUSTOM_DEFS)"
 
 TRANSLATE_PROPERTIES = \
 "Macro Search Path" "$(shell pwd)/../../coregen/"
-- 
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