From 7bf8a6df381a667134b55701993c6770d32bc76b Mon Sep 17 00:00:00 2001 From: Josh Blum Date: Fri, 22 Jan 2010 11:56:55 -0800 Subject: Moved usrp2 fpga files into usrp2 subdir. --- usrp2/testbench/cmdfile | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) create mode 100644 usrp2/testbench/cmdfile (limited to 'usrp2/testbench/cmdfile') diff --git a/usrp2/testbench/cmdfile b/usrp2/testbench/cmdfile new file mode 100644 index 000000000..8083eb92a --- /dev/null +++ b/usrp2/testbench/cmdfile @@ -0,0 +1,27 @@ + +# My stuff +-y . +-y ../top/u2_core +-y ../control_lib +-y ../control_lib/newfifo +-y ../serdes +-y ../sdr_lib +-y ../timing +-y ../coregen +-y ../extram +-y ../simple_gemac +-y ../simple_gemac/miim + +# Models +-y ../models +-y ../models/CY7C1356C + +# Open Cores +-y ../opencores/8b10b +-y ../opencores/spi/rtl/verilog ++incdir+../opencores/spi/rtl/verilog +-y ../opencores/i2c/rtl/verilog ++incdir+../opencores/i2c/rtl/verilog +-y ../opencores/aemb/rtl/verilog +-y ../opencores/simple_pic/rtl + -- cgit v1.2.3