From ce43cdfc6782b9f24781170f8f78a96e93bb2365 Mon Sep 17 00:00:00 2001 From: Matt Ettus Date: Sun, 5 Dec 2010 20:33:05 -0800 Subject: redone DC offset with sigma-delta quantization --- usrp2/sdr_lib/rx_dcoffset.v | 51 ++++++++++++++++++++++++++------------------- 1 file changed, 29 insertions(+), 22 deletions(-) (limited to 'usrp2/sdr_lib/rx_dcoffset.v') diff --git a/usrp2/sdr_lib/rx_dcoffset.v b/usrp2/sdr_lib/rx_dcoffset.v index 64ff4110d..35dfb07ae 100644 --- a/usrp2/sdr_lib/rx_dcoffset.v +++ b/usrp2/sdr_lib/rx_dcoffset.v @@ -18,43 +18,50 @@ module rx_dcoffset - #(parameter WIDTH=14, - parameter ADDR=8'd0) - (input clk, input rst, - input set_stb, input [7:0] set_addr, input [31:0] set_data, - input signed [WIDTH-1:0] adc_in, output signed [WIDTH-1:0] adc_out); - - // Because of some extra delays to make timing easier, the transfer function is: - // (z-1)/(z^2-z-alpha) where alpha is 1/2^n + #(parameter WIDTH=16, + parameter ADDR=8'd0, + parameter alpha_shift=16) + (input clk, input rst, + input set_stb, input [7:0] set_addr, input [31:0] set_data, + input [WIDTH-1:0] in, output [WIDTH-1:0] out); - wire set_now = set_stb & (ADDR == set_addr); + wire set_now = set_stb & (ADDR == set_addr); - reg fixed; // uses fixed offset - wire signed [WIDTH-1:0] fixed_dco; - reg signed [31:0] integrator; + reg fixed; // uses fixed offset + wire [WIDTH-1:0] fixed_dco; + localparam int_width = WIDTH + alpha_shift; + reg [int_width-1:0] integrator; + always @(posedge clk) if(rst) begin fixed <= 0; - integrator <= 32'd0; + integrator <= {int_width{1'b0}}; end else if(set_now) begin - integrator <= {set_data[WIDTH-1:0],{(32-WIDTH){1'b0}}}; + //integrator <= {set_data[30:0],{(31-int_width){1'b0}}}; fixed <= set_data[31]; end else if(~fixed) - integrator <= integrator + adc_out; - - wire [WIDTH:0] scaled_integrator; + integrator <= integrator + {{(alpha_shift){out[WIDTH-1]}},out}; + + wire [WIDTH-1:0] quantized; + wire [int_width-WIDTH:0] q_err; + wire [int_width-1:0] q_err_ext; + wire [int_width-1:0] q_loop; + + round #(.bits_in(int_width), .bits_out(WIDTH)) quantizer + (.in(q_loop), .out(quantized), .err(q_err)); - round #(.bits_in(33),.bits_out(15)) round (.in({integrator[31],integrator}),.out(scaled_integrator)); + sign_extend #(.bits_in(int_width-WIDTH+1),.bits_out(int_width)) sign_extend + (.in(q_err), .out(q_err_ext)); - wire [WIDTH:0] adc_out_int = {adc_in[WIDTH-1],adc_in} - scaled_integrator; - - clip_reg #(.bits_in(WIDTH+1),.bits_out(WIDTH)) clip_adc - (.clk(clk),.in(adc_out_int),.out(adc_out)); + add2_and_clip_reg #(.WIDTH(int_width)) sd_fixed + (.clk(clk), .rst(rst), .in1(integrator), .in2(q_err_ext), .sum(q_loop)); + add2_and_clip_reg #(.WIDTH(WIDTH)) add2_and_clip_reg + (.clk(clk), .in1(in), .in2(-quantized), .sum(out)); endmodule // rx_dcoffset -- cgit v1.2.3