From d7342b46abac60bf4e2811ac4798dc4e06b5844f Mon Sep 17 00:00:00 2001 From: Matt Ettus Date: Thu, 15 Apr 2010 14:51:41 -0700 Subject: synchronous and asynchronous gpmc models --- usrp2/models/gpmc_model_async.v | 95 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 95 insertions(+) create mode 100644 usrp2/models/gpmc_model_async.v (limited to 'usrp2/models/gpmc_model_async.v') diff --git a/usrp2/models/gpmc_model_async.v b/usrp2/models/gpmc_model_async.v new file mode 100644 index 000000000..a63a5a8fd --- /dev/null +++ b/usrp2/models/gpmc_model_async.v @@ -0,0 +1,95 @@ + + +module gpmc_model_async + (output EM_CLK, inout [15:0] EM_D, output reg [10:1] EM_A, output reg [1:0] EM_NBE, + output reg EM_WAIT0, output reg EM_NCS4, output reg EM_NCS6, + output reg EM_NWE, output reg EM_NOE ); + + assign EM_CLK = 0; + reg [15:0] EM_D_int; + assign EM_D = EM_D_int; + + initial + begin + EM_A <= 10'bz; + EM_NBE <= 2'b11; + EM_NWE <= 1; + EM_NOE <= 1; + EM_NCS4 <= 1; + EM_NCS6 <= 1; + EM_D_int <= 16'bz; + EM_WAIT0 <= 0; // FIXME this is actually an input + end + + task GPMC_Write; + input ctrl; + input [10:0] addr; + input [15:0] data; + begin + #2.3; + EM_A <= addr[10:1]; + EM_D_int <= data; + #2.01; + if(ctrl) + EM_NCS6 <= 0; + else + EM_NCS4 <= 0; + #14; + EM_NWE <= 0; + #77.5; + EM_NCS4 <= 1; + EM_NCS6 <= 1; + //#1.5; + EM_NWE <= 1; + #60; + EM_A <= 10'bz; + EM_D_int <= 16'bz; + end + endtask // GPMC_Write + + task GPMC_Read; + input ctrl; + input [10:0] addr; + begin + #1.3; + EM_A <= addr[10:1]; + #3; + if(ctrl) + EM_NCS6 <= 0; + else + EM_NCS4 <= 0; + #14; + EM_NOE <= 0; + #77.5; + EM_NCS4 <= 1; + EM_NCS6 <= 1; + //#1.5; + $display("Data Read from GPMC: %X",EM_D); + EM_NOE <= 1; + #254; + EM_A <= 10'bz; + end + endtask // GPMC_Read + + initial + begin + #1000; + GPMC_Write(1,36,16'hF00D); + #1000; + GPMC_Read(1,36); + #1000; + GPMC_Write(0,36,16'h1234); + GPMC_Write(0,38,16'h5678); + GPMC_Write(0,40,16'h9abc); + GPMC_Write(0,11'h2F4,16'hF00D); + GPMC_Write(0,11'h7FE,16'hDEAD); + GPMC_Write(0,11'h7FE,16'hDEAD); + GPMC_Write(0,11'h7FE,16'hDEAD); + GPMC_Write(0,11'h7FE,16'hDEAD); + GPMC_Write(0,11'h7FE,16'hDEAD); + GPMC_Write(0,11'h7FE,16'hDEAD); + #100000; + $finish; + end + +endmodule // gpmc_model_async -- cgit v1.2.3 From 2e6079841b7509f08a54c67db2ec19e07329e0d9 Mon Sep 17 00:00:00 2001 From: Matt Ettus Date: Thu, 15 Apr 2010 16:14:57 -0700 Subject: change time parameters because Xilinx IP has a 1ps timescale --- usrp2/models/gpmc_model_async.v | 41 +++++++++++++++++++++++++++-------------- 1 file changed, 27 insertions(+), 14 deletions(-) (limited to 'usrp2/models/gpmc_model_async.v') diff --git a/usrp2/models/gpmc_model_async.v b/usrp2/models/gpmc_model_async.v index a63a5a8fd..64b596284 100644 --- a/usrp2/models/gpmc_model_async.v +++ b/usrp2/models/gpmc_model_async.v @@ -1,4 +1,4 @@ - +`timescale 1ps/1ps module gpmc_model_async (output EM_CLK, inout [15:0] EM_D, output reg [10:1] EM_A, output reg [1:0] EM_NBE, @@ -26,22 +26,22 @@ module gpmc_model_async input [10:0] addr; input [15:0] data; begin - #2.3; + #23000; EM_A <= addr[10:1]; EM_D_int <= data; - #2.01; + #20100; if(ctrl) EM_NCS6 <= 0; else EM_NCS4 <= 0; - #14; + #14000; EM_NWE <= 0; - #77.5; + #77500; EM_NCS4 <= 1; EM_NCS6 <= 1; //#1.5; EM_NWE <= 1; - #60; + #60000; EM_A <= 10'bz; EM_D_int <= 16'bz; end @@ -51,33 +51,33 @@ module gpmc_model_async input ctrl; input [10:0] addr; begin - #1.3; + #13000; EM_A <= addr[10:1]; - #3; + #3000; if(ctrl) EM_NCS6 <= 0; else EM_NCS4 <= 0; - #14; + #14000; EM_NOE <= 0; - #77.5; + #77500; EM_NCS4 <= 1; EM_NCS6 <= 1; //#1.5; $display("Data Read from GPMC: %X",EM_D); EM_NOE <= 1; - #254; + #254000; EM_A <= 10'bz; end endtask // GPMC_Read initial begin - #1000; + #1000000; GPMC_Write(1,36,16'hF00D); - #1000; + #1000000; GPMC_Read(1,36); - #1000; + #1000000; GPMC_Write(0,36,16'h1234); GPMC_Write(0,38,16'h5678); GPMC_Write(0,40,16'h9abc); @@ -89,6 +89,19 @@ module gpmc_model_async GPMC_Write(0,11'h7FE,16'hDEAD); GPMC_Write(0,11'h7FE,16'hDEAD); #100000; + GPMC_Read(0,0); + GPMC_Read(0,0); + GPMC_Read(0,0); + GPMC_Read(0,0); + GPMC_Read(0,0); + GPMC_Read(0,0); + GPMC_Read(0,0); + GPMC_Read(0,0); + GPMC_Read(0,0); + GPMC_Read(0,0); + #100000; + GPMC_Read(0,0); + #100000000; $finish; end -- cgit v1.2.3 From beccd823da07b7c8b8d95b4688c6e05732f66165 Mon Sep 17 00:00:00 2001 From: Matt Ettus Date: Thu, 15 Apr 2010 17:55:22 -0700 Subject: async seems to work with packet lengths now. Still need to do wishbone regs for gpmc --- usrp2/gpmc/fifo_to_gpmc_async.v | 9 +------- usrp2/gpmc/fifo_watcher.v | 38 +++++++++++++++++++++++++++------- usrp2/gpmc/gpmc_async.v | 10 ++++----- usrp2/models/gpmc_model_async.v | 46 ++++++++++++++++++++++++++++++----------- usrp2/top/u1e/Makefile | 6 +++--- 5 files changed, 72 insertions(+), 37 deletions(-) (limited to 'usrp2/models/gpmc_model_async.v') diff --git a/usrp2/gpmc/fifo_to_gpmc_async.v b/usrp2/gpmc/fifo_to_gpmc_async.v index 4f253e1b5..5ac8b19bd 100644 --- a/usrp2/gpmc/fifo_to_gpmc_async.v +++ b/usrp2/gpmc/fifo_to_gpmc_async.v @@ -8,7 +8,7 @@ module fifo_to_gpmc_async (input clk, input reset, input clear, input [17:0] data_i, input src_rdy_i, output dst_rdy_o, output [15:0] EM_D, input EM_NCS, input EM_NOE, - input [15:0] frame_len, output reg bus_error); + input [15:0] frame_len); // Synchronize the async control signals reg [1:0] cs_del, oe_del; @@ -35,11 +35,4 @@ module fifo_to_gpmc_async assign dst_rdy_o = do_read; - always @(posedge clk) - if(reset) - bus_error <= 0; - else if(dst_rdy_o & ~src_rdy_i) - bus_error <= 1; - - endmodule // fifo_to_gpmc_async diff --git a/usrp2/gpmc/fifo_watcher.v b/usrp2/gpmc/fifo_watcher.v index 8b8f1abfb..da2051b04 100644 --- a/usrp2/gpmc/fifo_watcher.v +++ b/usrp2/gpmc/fifo_watcher.v @@ -2,25 +2,47 @@ module fifo_watcher (input clk, input reset, input clear, - input src_rdy, input dst_rdy, input sof, input eof, - output have_packet, output [15:0] length, input next); + input src_rdy1, input dst_rdy1, input sof1, input eof1, + input src_rdy2, input dst_rdy2, input sof2, input eof2, + output have_packet, output [15:0] length, output reg bus_error); - wire write = src_rdy & dst_rdy & eof; + wire write = src_rdy1 & dst_rdy1 & eof1; + wire read = src_rdy2 & dst_rdy2 & eof2; + wire have_packet_int; + reg [15:0] counter; fifo_short #(.WIDTH(16)) frame_lengths (.clk(clk), .reset(reset), .clear(clear), .datain(counter), .src_rdy_i(write), .dst_rdy_o(), - .dataout(length), .src_rdy_o(have_packet), .dst_rdy_i(next) ); + .dataout(length), .src_rdy_o(have_packet_int), .dst_rdy_i(read) ); - reg [15:0] counter; always @(posedge clk) if(reset | clear) counter <= 1; // Start at 1 - else if(src_rdy & dst_rdy) - if(eof) + else if(src_rdy1 & dst_rdy1) + if(eof1) counter <= 1; else counter <= counter + 1; - + always @(posedge clk) + if(reset | clear) + bus_error <= 0; + else if(dst_rdy2 & ~src_rdy2) + bus_error <= 1; + else if(read & ~have_packet_int) + bus_error <= 1; + + reg in_packet; + assign have_packet = have_packet_int & ~in_packet; + + always @(posedge clk) + if(reset | clear) + in_packet <= 0; + else if(src_rdy2 & dst_rdy2) + if(eof2) + in_packet <= 0; + else + in_packet <= 1; + endmodule // fifo_watcher diff --git a/usrp2/gpmc/gpmc_async.v b/usrp2/gpmc/gpmc_async.v index c4cf0ef89..22e56cc89 100644 --- a/usrp2/gpmc/gpmc_async.v +++ b/usrp2/gpmc/gpmc_async.v @@ -67,7 +67,6 @@ module gpmc_async wire [17:0] rx18_data, rx18b_data; wire rx18_src_rdy, rx18_dst_rdy, rx18b_src_rdy, rx18b_dst_rdy; wire [15:0] rx_fifo_space, rx_frame_len; - assign rx_frame_len = tx_frame_len; fifo36_to_fifo18 f18_to_f36 (.clk(fifo_clk), .reset(fifo_rst), .clear(0), @@ -83,15 +82,14 @@ module gpmc_async (.clk(fifo_clk), .reset(fifo_rst), .clear(0), .data_i(rx18b_data), .src_rdy_i(rx18b_src_rdy), .dst_rdy_o(rx18b_dst_rdy), .EM_D(EM_D_fifo), .EM_NCS(EM_NCS4), .EM_NOE(EM_NOE), - .frame_len(rx_frame_len), .bus_error(bus_error_rx) ); + .frame_len(rx_frame_len) ); fifo_watcher fifo_watcher (.clk(fifo_clk), .reset(fifo_rst), .clear(0), - .src_rdy(rx18_src_rdy), .dst_rdy(rx18_dst_rdy), .sof(rx18_data[16]), .eof(rx18_data[17]), - .have_packet(), .length(), .next() ); + .src_rdy1(rx18_src_rdy), .dst_rdy1(rx18_dst_rdy), .sof1(rx18_data[16]), .eof1(rx18_data[17]), + .src_rdy2(rx18b_src_rdy), .dst_rdy2(rx18b_dst_rdy), .sof2(rx18b_data[16]), .eof2(rx18b_data[17]), + .have_packet(rx_have_data), .length(rx_frame_len), .bus_error(bus_error_rx) ); - assign rx_have_data = 0; - // //////////////////////////////////////////// // Control path on CS6 diff --git a/usrp2/models/gpmc_model_async.v b/usrp2/models/gpmc_model_async.v index 64b596284..beeaee028 100644 --- a/usrp2/models/gpmc_model_async.v +++ b/usrp2/models/gpmc_model_async.v @@ -78,28 +78,50 @@ module gpmc_model_async #1000000; GPMC_Read(1,36); #1000000; - GPMC_Write(0,36,16'h1234); - GPMC_Write(0,38,16'h5678); - GPMC_Write(0,40,16'h9abc); - GPMC_Write(0,11'h2F4,16'hF00D); - GPMC_Write(0,11'h7FE,16'hDEAD); - GPMC_Write(0,11'h7FE,16'hDEAD); - GPMC_Write(0,11'h7FE,16'hDEAD); - GPMC_Write(0,11'h7FE,16'hDEAD); - GPMC_Write(0,11'h7FE,16'hDEAD); - GPMC_Write(0,11'h7FE,16'hDEAD); - #100000; + GPMC_Write(0,0,16'h1234); + GPMC_Write(0,0,16'h5678); + GPMC_Write(0,0,16'h9abc); + GPMC_Write(0,0,16'hF00D); + GPMC_Write(0,0,16'hDEAD); + GPMC_Write(0,0,16'hDEAD); + GPMC_Write(0,0,16'hDEAD); + GPMC_Write(0,0,16'hDEAD); + GPMC_Write(0,0,16'hDEAD); + GPMC_Write(0,0,16'hDEAD); + #1000000; + GPMC_Write(0,0,16'h1234); + GPMC_Write(0,0,16'h5678); + GPMC_Write(0,0,16'h9abc); + GPMC_Write(0,0,16'hF00D); + GPMC_Write(0,0,16'hDEAD); + GPMC_Write(0,0,16'hDEAD); + GPMC_Write(0,0,16'hDEAD); + GPMC_Write(0,0,16'hDEAD); + GPMC_Write(0,0,16'hDEAD); + GPMC_Write(0,0,16'h9876); + #1000000; + GPMC_Read(0,0); + GPMC_Read(0,0); + GPMC_Read(0,0); + GPMC_Read(0,0); + GPMC_Read(0,0); GPMC_Read(0,0); GPMC_Read(0,0); GPMC_Read(0,0); GPMC_Read(0,0); GPMC_Read(0,0); + #1000000; + GPMC_Read(0,0); + GPMC_Read(0,0); + GPMC_Read(0,0); GPMC_Read(0,0); GPMC_Read(0,0); GPMC_Read(0,0); GPMC_Read(0,0); GPMC_Read(0,0); - #100000; + GPMC_Read(0,0); + GPMC_Read(0,0); + #1000000; GPMC_Read(0,0); #100000000; $finish; diff --git a/usrp2/top/u1e/Makefile b/usrp2/top/u1e/Makefile index 160e67894..e15a49e10 100644 --- a/usrp2/top/u1e/Makefile +++ b/usrp2/top/u1e/Makefile @@ -176,12 +176,12 @@ timing/time_receiver.v \ timing/time_sender.v \ timing/time_sync.v \ timing/timer.v \ -gpmc/gpmc.v \ +gpmc/gpmc_async.v \ gpmc/edge_sync.v \ gpmc/dbsm.v \ gpmc/gpmc_to_fifo_async.v \ -gpmc/gpmc_to_fifo_sync.v \ -gpmc/fifo_to_gpmc_sync.v \ +gpmc/fifo_to_gpmc_async.v \ +gpmc/fifo_watcher.v \ gpmc/gpmc_wb.v \ top/u1e/u1e_core.v \ top/u1e/u1e.ucf \ -- cgit v1.2.3