From fc54a55f97171f5714c370d566f31429ce112e89 Mon Sep 17 00:00:00 2001 From: Matt Ettus Date: Wed, 14 Apr 2010 18:07:00 -0700 Subject: make timing diagrams for bus transactions. Still need to do reads --- usrp2/gpmc/.gitignore | 2 ++ usrp2/gpmc/burst_data_write.txt | 16 ++++++++++++++++ usrp2/gpmc/make_timing_diag | 6 ++++++ usrp2/gpmc/single_data_read.txt | 12 ++++++++++++ usrp2/gpmc/single_data_write.txt | 10 ++++++++++ 5 files changed, 46 insertions(+) create mode 100644 usrp2/gpmc/.gitignore create mode 100644 usrp2/gpmc/burst_data_write.txt create mode 100755 usrp2/gpmc/make_timing_diag create mode 100644 usrp2/gpmc/single_data_read.txt create mode 100644 usrp2/gpmc/single_data_write.txt (limited to 'usrp2/gpmc') diff --git a/usrp2/gpmc/.gitignore b/usrp2/gpmc/.gitignore new file mode 100644 index 000000000..3e14fa4f7 --- /dev/null +++ b/usrp2/gpmc/.gitignore @@ -0,0 +1,2 @@ +*.gif + diff --git a/usrp2/gpmc/burst_data_write.txt b/usrp2/gpmc/burst_data_write.txt new file mode 100644 index 000000000..3b5dfc785 --- /dev/null +++ b/usrp2/gpmc/burst_data_write.txt @@ -0,0 +1,16 @@ +# OMAP burst writes to FPGA + +CLK=0,nWE=1,nCS=1,nOE=1,DATA=Z. +CLK=1. +CLK=0,nWE=0,nCS=0,DATA=WR_DATA1. +CLK=1. +CLK=0,nWE=0,nCS=0,DATA=WR_DATA2. +CLK=1. +CLK=0,nWE=0,nCS=0,DATA=WR_DATA3. +CLK=1. +CLK=0,nWE=0,nCS=0,DATA=WR_DATA4. +CLK=1. +CLK=0,nWE=1,nCS=1,DATA=Z. +CLK=1. + + diff --git a/usrp2/gpmc/make_timing_diag b/usrp2/gpmc/make_timing_diag new file mode 100755 index 000000000..03166ad35 --- /dev/null +++ b/usrp2/gpmc/make_timing_diag @@ -0,0 +1,6 @@ +#!/bin/sh +drawtiming -o single_data_write.gif single_data_write.txt +drawtiming -o single_data_read.gif single_data_read.txt +drawtiming -o burst_data_write.gif burst_data_write.txt +#drawtiming -o burst_data_read.gif burst_data_read.txt + diff --git a/usrp2/gpmc/single_data_read.txt b/usrp2/gpmc/single_data_read.txt new file mode 100644 index 000000000..1dc0e3a78 --- /dev/null +++ b/usrp2/gpmc/single_data_read.txt @@ -0,0 +1,12 @@ +# OMAP writes to FPGA +# initialize the signals +CLK=0,nWE=1,nCS=1,nOE=1,DATA=Z. +CLK=1. +CLK=0,nOE=0,nCS=0,DATA=RD_DATA. +CLK=1. +CLK=0. +CLK=1. +CLK=0,nOE=1,nCS=1,DATA=Z. +CLK=1. + + diff --git a/usrp2/gpmc/single_data_write.txt b/usrp2/gpmc/single_data_write.txt new file mode 100644 index 000000000..287e3e2c1 --- /dev/null +++ b/usrp2/gpmc/single_data_write.txt @@ -0,0 +1,10 @@ +# OMAP writes to FPGA +# initialize the signals +CLK=0,nWE=1,nCS=1,nOE=1,DATA=Z. +CLK=1. +CLK=0,nWE=0,nCS=0,DATA=WR_DATA. +CLK=1. +CLK=0,nWE=1,nCS=1,DATA=Z. +CLK=1. + + -- cgit v1.2.3