From ac3e42d1053772f324245dfff23eadcc7c6135cd Mon Sep 17 00:00:00 2001
From: Matt Ettus <matt@ettus.com>
Date: Fri, 18 Mar 2011 14:56:01 -0700
Subject: u1p: gpif-to-fx2 path should now handle arbitrary sized packets, up
to 2KB
---
usrp2/gpif/gpif_rd.v | 51 +++++++++++++++++++++++++++++----------------------
1 file changed, 29 insertions(+), 22 deletions(-)
(limited to 'usrp2/gpif')
diff --git a/usrp2/gpif/gpif_rd.v b/usrp2/gpif/gpif_rd.v
index 76db72d8a..e79b275b3 100644
--- a/usrp2/gpif/gpif_rd.v
+++ b/usrp2/gpif/gpif_rd.v
@@ -10,7 +10,7 @@ module gpif_rd
output [31:0] debug
);
- wire [18:0] data_o, resp_o;
+ wire [17:0] data_o, resp_o; // drop occ bit from input data
wire final_rdy_data, final_rdy_resp;
// 33/257 Bug Fix
@@ -24,35 +24,42 @@ module gpif_rd
read_count <= 0;
// Data Path
- wire [18:0] data_int;
+ wire [17:0] data_int;
wire src_rdy_int, dst_rdy_int;
- fifo_2clock_cascade #(.WIDTH(19), .SIZE(4)) rd_fifo_2clk
- (.wclk(sys_clk), .datain(data_i), .src_rdy_i(src_rdy_i), .dst_rdy_o(dst_rdy_o), .space(),
+ fifo_2clock_cascade #(.WIDTH(18), .SIZE(4)) rd_fifo_2clk
+ (.wclk(sys_clk), .datain(data_i[17:0]), .src_rdy_i(src_rdy_i), .dst_rdy_o(dst_rdy_o), .space(),
.rclk(~gpif_clk), .dataout(data_int), .src_rdy_o(src_rdy_int), .dst_rdy_i(dst_rdy_int), .occupied(),
.arst(sys_rst));
- // FIXME -- handle short packets
- wire send_data_line = gpif_rd & ~gpif_ep & ~read_count[8];
+ reg [7:0] packet_count;
+ reg do_padding;
+ wire consume_data_line = gpif_rd & ~gpif_ep & ~read_count[8] & ~do_padding;
+ wire produce_eop = src_rdy_int & dst_rdy_int & data_int[17];
+ wire consume_sop = consume_data_line & final_rdy_data & data_o[16];
+ wire consume_eop = consume_data_line & final_rdy_data & data_o[17];
- fifo_cascade #(.WIDTH(19), .SIZE(9)) rd_fifo
+ fifo_cascade #(.WIDTH(18), .SIZE(10)) rd_fifo
(.clk(~gpif_clk), .reset(gpif_rst), .clear(0),
.datain(data_int), .src_rdy_i(src_rdy_int), .dst_rdy_o(dst_rdy_int), .space(),
- .dataout(data_o), .src_rdy_o(final_rdy_data), .dst_rdy_i(send_data_line), .occupied());
+ .dataout(data_o), .src_rdy_o(final_rdy_data), .dst_rdy_i(consume_data_line), .occupied());
- reg [7:0] packet_count;
always @(negedge gpif_clk)
if(gpif_rst)
packet_count <= 0;
else
- if(src_rdy_int & dst_rdy_int & data_int[17]) // eop
- if(~(send_data_line & data_o[16]))
- packet_count <= packet_count + 1;
- else
- ;
- else
- if(send_data_line & data_o[16])
- packet_count <= packet_count - 1;
+ if(produce_eop & ~consume_sop)
+ packet_count <= packet_count + 1;
+ else if(consume_sop & ~produce_eop)
+ packet_count <= packet_count - 1;
+ always @(negedge gpif_clk)
+ if(gpif_rst)
+ do_padding <= 0;
+ else if(~gpif_rd)
+ do_padding <= 0;
+ else if(consume_eop)
+ do_padding <= 1;
+
always @(negedge gpif_clk)
if(gpif_rst)
gpif_empty_d <= 1;
@@ -61,12 +68,12 @@ module gpif_rd
// Response Path
wire [15:0] resp_fifolevel;
- wire send_resp_line = gpif_rd & gpif_ep & ~read_count[4];
+ wire consume_resp_line = gpif_rd & gpif_ep & ~read_count[4];
- fifo_2clock_cascade #(.WIDTH(19), .SIZE(4)) resp_fifo_2clk
- (.wclk(sys_clk), .datain(resp_i), .src_rdy_i(resp_src_rdy_i), .dst_rdy_o(resp_dst_rdy_o), .space(),
+ fifo_2clock_cascade #(.WIDTH(18), .SIZE(4)) resp_fifo_2clk
+ (.wclk(sys_clk), .datain(resp_i[17:0]), .src_rdy_i(resp_src_rdy_i), .dst_rdy_o(resp_dst_rdy_o), .space(),
.rclk(~gpif_clk), .dataout(resp_o),
- .src_rdy_o(final_rdy_resp), .dst_rdy_i(send_resp_line), .occupied(resp_fifolevel),
+ .src_rdy_o(final_rdy_resp), .dst_rdy_i(consume_resp_line), .occupied(resp_fifolevel),
.arst(sys_rst));
// FIXME -- handle short packets
@@ -82,6 +89,6 @@ module gpif_rd
assign debug = { { 16'd0 },
{ data_int[17:16], data_o[17:16], packet_count[3:0] },
- { 2'b0,final_rdy_data, final_rdy_resp, send_data_line, send_resp_line, src_rdy_int, dst_rdy_int} };
+ { 2'b0,final_rdy_data, final_rdy_resp, consume_data_line, consume_resp_line, src_rdy_int, dst_rdy_int} };
endmodule // gpif_rd
--
cgit v1.2.3