From cd9308eb81fd37fcd5142d49c10741f107e6b657 Mon Sep 17 00:00:00 2001 From: Matt Ettus Date: Sun, 12 Jun 2011 14:03:42 -0700 Subject: u1e: new 2 clock fifo, 18 bits by 1K --- usrp2/fifo/fifo_2clock.v | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'usrp2/fifo/fifo_2clock.v') diff --git a/usrp2/fifo/fifo_2clock.v b/usrp2/fifo/fifo_2clock.v index 756ad508f..c6aaf34dc 100644 --- a/usrp2/fifo/fifo_2clock.v +++ b/usrp2/fifo/fifo_2clock.v @@ -65,6 +65,11 @@ module fifo_2clock (.rst(arst), .wr_clk(wclk),.din({1'b0,datain}),.full(full),.wr_en(write),.wr_data_count(level_wclk), .rd_clk(rclk),.dout({dummy,dataout}),.empty(empty),.rd_en(read),.rd_data_count(level_rclk) ); + else if ((WIDTH==18) & (SIZE==10)) + fifo_xlnx_1Kx18_2clk fifo_xlnx_1Kx18_2clk + (.rst(arst), + .wr_clk(wclk),.din(datain),.full(full),.wr_en(write),.wr_data_count(level_wclk), + .rd_clk(rclk),.dout(dataout),.empty(empty),.rd_en(read),.rd_data_count(level_rclk) ); endgenerate assign occupied = {{(16-SIZE-1){1'b0}},level_rclk}; -- cgit v1.2.3