From d0742cf2a5285ed08d49e16948d8227414247f6a Mon Sep 17 00:00:00 2001 From: Matt Ettus Date: Wed, 14 Jul 2010 17:01:25 -0700 Subject: get it to build --- usrp2/extramfifo/fifo_extram36_tb.build | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) mode change 100644 => 100755 usrp2/extramfifo/fifo_extram36_tb.build (limited to 'usrp2/extramfifo/fifo_extram36_tb.build') diff --git a/usrp2/extramfifo/fifo_extram36_tb.build b/usrp2/extramfifo/fifo_extram36_tb.build old mode 100644 new mode 100755 index 699591889..ac9369758 --- a/usrp2/extramfifo/fifo_extram36_tb.build +++ b/usrp2/extramfifo/fifo_extram36_tb.build @@ -1 +1 @@ -iverilog -y ../../models -y ../../models/CY7C1356C -y . -y ../../control_lib/ -y ../../coregen -y /opt/Xilinx/10.1/ISE/verilog/src/XilinxCoreLib -y /opt/Xilinx/10.1/ISE/verilog/src/unisims/ -o fifo_extram36_tb fifo_extram36_tb.v +iverilog -y ../models -y . -y ../control_lib/ -y ../coregen -y ../fifo -y /opt/Xilinx/10.1/ISE/verilog/src/XilinxCoreLib -y /opt/Xilinx/10.1/ISE/verilog/src/unisims/ -o fifo_extram36_tb fifo_extram36_tb.v -- cgit v1.2.3