From 7e75951d263c00e9f84bdf14d6176680cb3de833 Mon Sep 17 00:00:00 2001 From: Ian Buckley Date: Fri, 15 Oct 2010 11:37:23 -0700 Subject: Added external RAM FIFO to u2plus. Added code branch to ext_fifo.v using generate that instantiates different input and out fifo's and touched nobl_fifo code so that it works at 18 and 36bit widths. Added 2nd DCM to top level to generate off chip RAMCLK. Added explicit I/O instances to top level for tristate drivers and changed signals to core as needed. Creted new FIFO's in core gen to replace much larger FIFO's used on u2rev3 --- usrp2/coregen/Makefile.srcs | 2 ++ 1 file changed, 2 insertions(+) (limited to 'usrp2/coregen/Makefile.srcs') diff --git a/usrp2/coregen/Makefile.srcs b/usrp2/coregen/Makefile.srcs index a59696d15..f163877a9 100644 --- a/usrp2/coregen/Makefile.srcs +++ b/usrp2/coregen/Makefile.srcs @@ -16,6 +16,8 @@ fifo_xlnx_16x19_2clk.v \ fifo_xlnx_16x19_2clk.xco \ fifo_xlnx_16x40_2clk.v \ fifo_xlnx_16x40_2clk.xco \ +fifo_xlnx_32x36_2clk.v \ +fifo_xlnx_32x36_2clk.xco \ fifo_xlnx_512x36_2clk_36to18.v \ fifo_xlnx_512x36_2clk_36to18.xco \ fifo_xlnx_512x36_2clk_18to36.v \ -- cgit v1.2.3