From a170b9b42345794429486dd4f3316e84ea2cc871 Mon Sep 17 00:00:00 2001 From: Josh Blum Date: Fri, 22 Jan 2010 11:46:58 -0800 Subject: Moved usrp1 fpga files into usrp1 subdir. --- usrp1/models/fifo_4k_18.v | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) create mode 100644 usrp1/models/fifo_4k_18.v (limited to 'usrp1/models/fifo_4k_18.v') diff --git a/usrp1/models/fifo_4k_18.v b/usrp1/models/fifo_4k_18.v new file mode 100644 index 000000000..3efbf74f0 --- /dev/null +++ b/usrp1/models/fifo_4k_18.v @@ -0,0 +1,26 @@ + + +module fifo_4k_18 + (input [17:0] data, + input wrreq, + input wrclk, + output wrfull, + output wrempty, + output [11:0] wrusedw, + + output [17:0] q, + input rdreq, + input rdclk, + output rdfull, + output rdempty, + output [11:0] rdusedw, + + input aclr ); + +fifo #(.width(18),.depth(4096),.addr_bits(12)) fifo_4k + ( data, wrreq, rdreq, rdclk, wrclk, aclr, q, + rdfull, rdempty, rdusedw, wrfull, wrempty, wrusedw); + +endmodule // fifo_4k_18 + + -- cgit v1.2.3