From a170b9b42345794429486dd4f3316e84ea2cc871 Mon Sep 17 00:00:00 2001
From: Josh Blum <josh@joshknows.com>
Date: Fri, 22 Jan 2010 11:46:58 -0800
Subject: Moved usrp1 fpga files into usrp1 subdir.

---
 usrp1/megacells/fifo_4kx16_dc_inst.v | 13 +++++++++++++
 1 file changed, 13 insertions(+)
 create mode 100755 usrp1/megacells/fifo_4kx16_dc_inst.v

(limited to 'usrp1/megacells/fifo_4kx16_dc_inst.v')

diff --git a/usrp1/megacells/fifo_4kx16_dc_inst.v b/usrp1/megacells/fifo_4kx16_dc_inst.v
new file mode 100755
index 000000000..566f27a17
--- /dev/null
+++ b/usrp1/megacells/fifo_4kx16_dc_inst.v
@@ -0,0 +1,13 @@
+fifo_4kx16_dc	fifo_4kx16_dc_inst (
+	.aclr ( aclr_sig ),
+	.data ( data_sig ),
+	.rdclk ( rdclk_sig ),
+	.rdreq ( rdreq_sig ),
+	.wrclk ( wrclk_sig ),
+	.wrreq ( wrreq_sig ),
+	.q ( q_sig ),
+	.rdempty ( rdempty_sig ),
+	.rdusedw ( rdusedw_sig ),
+	.wrfull ( wrfull_sig ),
+	.wrusedw ( wrusedw_sig )
+	);
-- 
cgit v1.2.3