From 61f2f0214c5999ea42a368a4fc99f03d8eb28d1e Mon Sep 17 00:00:00 2001 From: jcorgan Date: Mon, 8 Sep 2008 01:00:12 +0000 Subject: Merged r9433:9527 from features/gr-usrp2 into trunk. Adds usrp2 and gr-usrp2 top-level components. Trunk passes distcheck with mb-gcc installed, but currently not without them. The key issue is that when mb-gcc is not installed, the build system skips over the usrp2/firmware directory, and the firmware include files don't get put into the dist tarball. But we can't do the usual DIST_SUBDIRS method as the firmware is a subpackage. git-svn-id: http://gnuradio.org/svn/gnuradio/trunk@9528 221aa14e-8319-0410-a670-987f0aec2ac5 --- opencores/spi/rtl/verilog/CVS/Entries | 6 ++++++ opencores/spi/rtl/verilog/CVS/Repository | 1 + opencores/spi/rtl/verilog/CVS/Root | 1 + opencores/spi/rtl/verilog/CVS/Template | 0 4 files changed, 8 insertions(+) create mode 100644 opencores/spi/rtl/verilog/CVS/Entries create mode 100644 opencores/spi/rtl/verilog/CVS/Repository create mode 100644 opencores/spi/rtl/verilog/CVS/Root create mode 100644 opencores/spi/rtl/verilog/CVS/Template (limited to 'opencores/spi/rtl/verilog/CVS') diff --git a/opencores/spi/rtl/verilog/CVS/Entries b/opencores/spi/rtl/verilog/CVS/Entries new file mode 100644 index 000000000..d125a1657 --- /dev/null +++ b/opencores/spi/rtl/verilog/CVS/Entries @@ -0,0 +1,6 @@ +/spi_clgen.v/1.3/Thu Jul 3 17:32:15 2003// +/spi_defines.v/1.8/Mon Mar 15 17:46:08 2004// +/spi_shift.v/1.7/Tue Jul 8 15:36:37 2003// +/spi_top.v/1.8/Tue Jul 8 15:36:37 2003// +/timescale.v/1.1.1.1/Wed Jun 12 15:45:23 2002// +D diff --git a/opencores/spi/rtl/verilog/CVS/Repository b/opencores/spi/rtl/verilog/CVS/Repository new file mode 100644 index 000000000..361b93bf8 --- /dev/null +++ b/opencores/spi/rtl/verilog/CVS/Repository @@ -0,0 +1 @@ +spi/rtl/verilog diff --git a/opencores/spi/rtl/verilog/CVS/Root b/opencores/spi/rtl/verilog/CVS/Root new file mode 100644 index 000000000..44b2aa23b --- /dev/null +++ b/opencores/spi/rtl/verilog/CVS/Root @@ -0,0 +1 @@ +:pserver:anonymous@cvs.opencores.org:/cvsroot/anonymous diff --git a/opencores/spi/rtl/verilog/CVS/Template b/opencores/spi/rtl/verilog/CVS/Template new file mode 100644 index 000000000..e69de29bb -- cgit v1.2.3