From e8143acd3eed1356caebdf5845ce1cb0faa2a678 Mon Sep 17 00:00:00 2001 From: Mark Meserve Date: Fri, 16 Nov 2018 17:13:00 -0600 Subject: rh: fix typo in set_clk_safe_state --- mpm/python/usrp_mpm/dboard_manager/rhodium.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'mpm/python/usrp_mpm') diff --git a/mpm/python/usrp_mpm/dboard_manager/rhodium.py b/mpm/python/usrp_mpm/dboard_manager/rhodium.py index 5f1061184..c736003d5 100644 --- a/mpm/python/usrp_mpm/dboard_manager/rhodium.py +++ b/mpm/python/usrp_mpm/dboard_manager/rhodium.py @@ -493,7 +493,7 @@ class Rhodium(DboardManagerBase): self.dac.tx_enable(False) self.adc.power_down_channel(True) with open_uio( - label="dboard-regs-{}".format(slot_idx), + label="dboard-regs-{}".format(self.slot_idx), read_only=False ) as radio_regs: # Clear the Sample Clock enables and place the MMCM in reset. -- cgit v1.2.3