From 3b716315fea52a1c1866c60c5d101e3bfe163560 Mon Sep 17 00:00:00 2001 From: Daniel Jepson Date: Tue, 26 Sep 2017 09:54:54 -0700 Subject: mpm: Update TDC sync code to make it generic for N dboards --- mpm/python/usrp_mpm/dboard_manager/eiscat.py | 3 +++ 1 file changed, 3 insertions(+) (limited to 'mpm/python/usrp_mpm/dboard_manager') diff --git a/mpm/python/usrp_mpm/dboard_manager/eiscat.py b/mpm/python/usrp_mpm/dboard_manager/eiscat.py index 822923fbf..06b647eec 100644 --- a/mpm/python/usrp_mpm/dboard_manager/eiscat.py +++ b/mpm/python/usrp_mpm/dboard_manager/eiscat.py @@ -571,6 +571,9 @@ class EISCAT(DboardManagerBase): self.ref_clock_freq, 1.9E-12, # TODO don't hardcode. This should live in the EEPROM self.INIT_PHASE_DAC_WORD, + 2.496e9, # lmk_vco_freq + [135e-9,], # target_values + 0x3, # spi_addr self.log ) _sync_db_clock(self.clock_synchronizer) -- cgit v1.2.3