From d588005fd87dd2594adb29dbbdcf948bbb0ab0c1 Mon Sep 17 00:00:00 2001 From: Ryan Marlow Date: Fri, 26 Jan 2018 14:07:50 -0500 Subject: DDC/DUC: switch CORDIC -> DDS for all relevant variable names - Bump compat number for DDC/DUC to 2.0 --- images/manifest.txt | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'images') diff --git a/images/manifest.txt b/images/manifest.txt index d3478ac3d..122b2c3e5 100644 --- a/images/manifest.txt +++ b/images/manifest.txt @@ -1,8 +1,8 @@ # UHD Image Manifest File # Target hash url SHA256 # X300-Series -x3xx_x310_fpga_default fpga-1791847 x3xx/fpga-1791847/x3xx_x310_fpga_default-g1791847.zip b18622e48f8a7e762c07ec90a563a5925f6098fe9a905fe1689c246696678142 -x3xx_x300_fpga_default fpga-1791847 x3xx/fpga-1791847/x3xx_x300_fpga_default-g1791847.zip 2e184533f90abe17ce931848c8d2ca628b497399ac9bdd069f685ba9ce50aa3c +x3xx_x310_fpga_default fpga-4bb66b3 x3xx/fpga-4bb66b3/x3xx_x310_fpga_default-g4bb66b3.zip ded331d6e5261589e32148ac1f21096e9fd17716e5527e998beb893d282691b4 +x3xx_x300_fpga_default fpga-4bb66b3 x3xx/fpga-4bb66b3/x3xx_x300_fpga_default-g4bb66b3.zip e4d311f791e6ca5c4818b0f83b0fe5ee9ee3c593dd3044d5c28968a4f5c4e3f6 # Example daughterboard targets (none currently exist) #x3xx_twinrx_cpld_default example_target #dboard_ubx_cpld_default example_target @@ -11,9 +11,9 @@ x3xx_x300_fpga_default fpga-1791847 x3xx/fpga-1791847/x3xx_x300_ e3xx_e310_fpga_default fpga-1c568e6 e3xx/fpga-1c568e6/e3xx_e310_fpga_default-g1c568e6.zip 2957b4bdefe6885644ef2bc7b0e3845d13a7fe45f5a0933a2adaffd24c1b6802 # N300-Series -n3xx_n310_fpga_default fpga-fad351d n3xx/fpga-fad351d/n3xx_n310_fpga_default-gfad351d.zip de65ef6521ed20c57fbe75c86afc0dc80531d77b0c88a89cec742bf67363b9be -n3xx_n300_fpga_default fpga-fad351d n3xx/fpga-fad351d/n3xx_n300_fpga_default-gfad351d.zip 0fb5aebee11f9cbb99bb6c09f50099c5eba807acab46a3a23e8f65b1ef4e06c8 -n3xx_n310_fpga_aurora fpga-6bea23d n3xx/fpga-6bea23d/n3xx_n310_fpga_aurora-g6bea23d.zip 62a12a2c85526f759c96a1eb7db226e715cdd83b9c277d29f037ae00c72bf7fa +n3xx_n310_fpga_default fpga-4bb66b3 n3xx/fpga-4bb66b3/n3xx_n310_fpga_default-g4bb66b3.zip 1b6fc983b7589351b6e6a935dcde70e77fca75cb3f629f43f5bef876b134e7f5 +n3xx_n300_fpga_default fpga-4bb66b3 n3xx/fpga-4bb66b3/n3xx_n300_fpga_default-g4bb66b3.zip 25d5d49da4174d6d7647d4b23e1bef1df9a2eb1e26d328f48fc73a9557a25a82 +n3xx_n310_fpga_aurora fpga-4bb66b3 n3xx/fpga-4bb66b3/n3xx_n310_fpga_aurora-g4bb66b3.zip f93181aa29ebeee29b44afc1cb83202ba655a9dab2d1aad7a8e28e794746749b #n3xx_n310_cpld_default fpga-6bea23d n3xx/fpga-6bea23d/n3xx_n310_cpld_default-g6bea23d.zip 0 # N3XX Mykonos firmware #n3xx_n310_fw_default fpga-6bea23d n3xx/fpga-6bea23d/n3xx_n310_fw_default-g6bea23d.zip 0 @@ -38,7 +38,7 @@ usrp2_n200_fpga_default fpga-6bea23d usrp2/fpga-6bea23d/usrp2_n20 usrp2_n200_fw_default fpga-6bea23d usrp2/fpga-6bea23d/usrp2_n200_fw_default-g6bea23d.zip 3eee2a6195caafe814912167fccf2dfc369f706446f8ecee36e97d2c0830116f usrp2_n210_fpga_default fpga-6bea23d usrp2/fpga-6bea23d/usrp2_n210_fpga_default-g6bea23d.zip 5ce68ac539ee6eeb7d04fb3127c1fabcaff442a8edfaaa2f3746590f9df909bd usrp2_n210_fw_default fpga-6bea23d usrp2/fpga-6bea23d/usrp2_n210_fw_default-g6bea23d.zip 3646fcd3fc974d18c621cb10dfe97c4dad6d282036dc63b7379995dfad95fb98 -n230_n230_fpga_default fpga-1c568e6 n230/fpga-1c568e6/n230_n230_fpga_default-g1c568e6.zip 8cf8b5318aa797d180b8a09b2dc39f25418a5952c11ec65687ceb5542a3a59cb +n230_n230_fpga_default fpga-4bb66b3 n230/fpga-4bb66b3/n230_n230_fpga_default-g4bb66b3.zip 02ba098d797832906b8cb2e75f10dba5b2dc21cc84ec99e1f159a72e0b89eefa # USRP1 Devices usrp1_usrp1_fpga_default fpga-6bea23d usrp1/fpga-6bea23d/usrp1_usrp1_fpga_default-g6bea23d.zip 03bf72868c900dd0853bf48e2ede91058d579829b0e70c021e51b0e282d1d5be -- cgit v1.2.3