From d5109ae99e5da24707a8d7a6d57b96f6deabbede Mon Sep 17 00:00:00 2001 From: Ashish Chaudhari Date: Tue, 20 Feb 2018 11:42:56 -0800 Subject: rfnoc,x300: Multiple clocking changes - Moved bus_clk <=> ce_clk crossing to axi_wrapper in FPGA which resulted in a noc_shell compat bump - Change x300 bus_clk frequency to 187.5 MHz --- images/manifest.txt | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) (limited to 'images/manifest.txt') diff --git a/images/manifest.txt b/images/manifest.txt index 8ed7ef6b5..f0a9fdcc0 100644 --- a/images/manifest.txt +++ b/images/manifest.txt @@ -1,15 +1,15 @@ # UHD Image Manifest File # Target hash url SHA256 # X300-Series -x3xx_x310_fpga_default fpga-30cc152 x3xx/fpga-30cc152/x3xx_x310_fpga_default.zip 0a7a410013ab83efca8101defc7bcb5346e74a03b6412e8d9077b3b5728b93f5 -x3xx_x300_fpga_default fpga-30cc152 x3xx/fpga-30cc152/x3xx_x300_fpga_default.zip c4814bc948a1ce06ccc85ed6c58c4946e12a150a27ce3fc94080f7ff98669f2f +x3xx_x310_fpga_default fpga-1c568e6 x3xx/fpga-1c568e6/x3xx_x310_fpga_default.zip d441d1b51c2b4f12fd83b09b0d1937265f8b537dfb98f5a0e7bfe611a53abb7e +x3xx_x300_fpga_default fpga-1c568e6 x3xx/fpga-1c568e6/x3xx_x300_fpga_default.zip e2413b6690029481991155d79e760d2e68a443df0e7cb95672083737424837db # Example daughterboard targets (none currently exist) #x3xx_twinrx_cpld_default example_target #dboard_ubx_cpld_default example_target # E-Series -e3xx_e310_fpga_default fpga-30cc152 e3xx/fpga-30cc152/e3xx_e310_fpga_default.zip c2c996190be6c4ada2e176a0e2b647dfe7a56100cc3c140ca5bc702411747530 +e3xx_e310_fpga_default fpga-1c568e6 e3xx/fpga-1c568e6/e3xx_e310_fpga_default.zip 2957b4bdefe6885644ef2bc7b0e3845d13a7fe45f5a0933a2adaffd24c1b6802 # N300-Series -n3xx_n310_fpga_default fpga-8570a45 n3xx/fpga-8570a45/n3xx_n310_fpga_default.zip 3e53a28ccf8cf01128e8f05e7741fa68beccd9b7b50abddd6c06a4d7f8bd6fd9 +n3xx_n310_fpga_default fpga-1c568e6 n3xx/fpga-1c568e6/n3xx_n310_fpga_default.zip 658bc41282107940a22f19f95581cfe7007642fdfde5a1261c0e92c741782120 n3xx_n310_fpga_aurora fpga-6bea23d n3xx/fpga-6bea23d/n3xx_n310_fpga_aurora.zip 62a12a2c85526f759c96a1eb7db226e715cdd83b9c277d29f037ae00c72bf7fa #n3xx_n310_cpld_default fpga-6bea23d n3xx/fpga-6bea23d/n3xx_n310_cpld_default.zip 0 # N3XX Mykonos firmware @@ -21,10 +21,10 @@ n3xx_n310_fpga_aurora fpga-6bea23d n3xx/fpga-6bea23d/n3xx_n310_ #n3xx_n310_sdimg_default fpga-6bea23d n3xx/fpga-6bea23d/n3xx_n310_sdimg_default.zip 0 #n3xx_n300_sdimg_default fpga-6bea23d n3xx/fpga-6bea23d/n3xx_n300_sdimg_default.zip 0 # B200-Series -b2xx_b200_fpga_default fpga-6bea23d b2xx/fpga-6bea23d/b2xx_b200_fpga_default.zip f7d0a3d33e026484d89c420df66fe3a698717126f8407ef02240b323d4a12839 -b2xx_b200mini_fpga_default fpga-6bea23d b2xx/fpga-6bea23d/b2xx_b200mini_fpga_default.zip 7fa95b938f0bfbdce821c23950d28ca43e7ef24a7cda39a0b2f09fac84f24aae -b2xx_b210_fpga_default fpga-6bea23d b2xx/fpga-6bea23d/b2xx_b210_fpga_default.zip e08dbdaa6508c1fd480463f40231ef3b221b6f78567fab7db72c1d367d396c6f -b2xx_b205mini_fpga_default fpga-6bea23d b2xx/fpga-6bea23d/b2xx_b205mini_fpga_default.zip a74598cd9ecc71f34e8fba06b31c303d0f1a88532e9689efaff516aa6d5e1ff6 +b2xx_b200_fpga_default fpga-1c568e6 b2xx/fpga-1c568e6/b2xx_b200_fpga_default.zip 7ba7561d517dc9a474b01f06c273f921a3a27005e41cd38fde7cd03bbb00284f +b2xx_b200mini_fpga_default fpga-1c568e6 b2xx/fpga-1c568e6/b2xx_b200mini_fpga_default.zip 5cf63ec2d50630c35b6614729ae426d209cda48b02f25dd6eb31650f6ffe5bab +b2xx_b210_fpga_default fpga-1c568e6 b2xx/fpga-1c568e6/b2xx_b210_fpga_default.zip 612b239f86a6d1b09736c6eb55cfe370937d0414acfee48f96cecfe94c080a89 +b2xx_b205mini_fpga_default fpga-1c568e6 b2xx/fpga-1c568e6/b2xx_b205mini_fpga_default.zip ab4de1ff063cb2224f74f17c6e7371fec314cb95fcef2a8035529a3fe1e6355f b2xx_common_fw_default uhd-14000041 b2xx/uhd-14000041/b2xx_common_fw_default.zip 920790744085d8525529c1d0ece8942fef6d29b0a503530a814727fbacd7732c # USRP2 Devices usrp2_usrp2_fw_default fpga-6bea23d usrp2/fpga-6bea23d/usrp2_usrp2_fw_default.zip d523a18318cb6a7637be40484bf03a6f54766410fee2c1a1f72e8971ea9a9cb6 @@ -33,7 +33,7 @@ usrp2_n200_fpga_default fpga-6bea23d usrp2/fpga-6bea23d/usrp2_n20 usrp2_n200_fw_default fpga-6bea23d usrp2/fpga-6bea23d/usrp2_n200_fw_default.zip 3eee2a6195caafe814912167fccf2dfc369f706446f8ecee36e97d2c0830116f usrp2_n210_fpga_default fpga-6bea23d usrp2/fpga-6bea23d/usrp2_n210_fpga_default.zip 5ce68ac539ee6eeb7d04fb3127c1fabcaff442a8edfaaa2f3746590f9df909bd usrp2_n210_fw_default fpga-6bea23d usrp2/fpga-6bea23d/usrp2_n210_fw_default.zip 3646fcd3fc974d18c621cb10dfe97c4dad6d282036dc63b7379995dfad95fb98 -n230_n230_fpga_default fpga-30cc152 n230/fpga-30cc152/n230_n230_fpga_default.zip 2027230401449bdfa9753ee41121d8b5e5ba28204a2ef8f8e130492152a18233 +n230_n230_fpga_default fpga-1c568e6 n230/fpga-1c568e6/n230_n230_fpga_default.zip 8cf8b5318aa797d180b8a09b2dc39f25418a5952c11ec65687ceb5542a3a59cb # USRP1 Devices usrp1_usrp1_fpga_default fpga-6bea23d usrp1/fpga-6bea23d/usrp1_usrp1_fpga_default.zip 03bf72868c900dd0853bf48e2ede91058d579829b0e70c021e51b0e282d1d5be usrp1_b100_fpga_default fpga-6bea23d usrp1/fpga-6bea23d/usrp1_b100_fpga_default.zip 7f2306f21e17aa3fae3f966d08c6297d6cf42041974f846ca89f0d633ece8769 -- cgit v1.2.3