From 160025b1f3761aced6f60923f05e8ccf642ffa43 Mon Sep 17 00:00:00 2001
From: Sugandha Gupta <sugandha.gupta@ettus.com>
Date: Fri, 27 Jul 2018 09:29:49 -0700
Subject: e320: Add e320 to images package script

---
 images/image_package_mapping.py | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

(limited to 'images/image_package_mapping.py')

diff --git a/images/image_package_mapping.py b/images/image_package_mapping.py
index cf5059969..01bd699f3 100644
--- a/images/image_package_mapping.py
+++ b/images/image_package_mapping.py
@@ -24,6 +24,25 @@ PACKAGE_MAPPING = {
                   "usrp_e3xx_fpga_idle.rpt",
                   "usrp_e3xx_fpga_idle_sg3.rpt"]
     },
+    "e320": {
+        "type": "e3xx",
+        "package_name": "e3xx_e320_fpga_default-g{}.zip",
+        "files": ['usrp_e320_fpga_1G.bit',
+                  'usrp_e320_fpga_1G.bit.md5',
+                  'usrp_e320_fpga_1G.dts',
+                  'usrp_e320_fpga_1G.dts.md5',
+                  'usrp_e320_fpga_1G.rpt',
+                  'usrp_e320_fpga_XG.bit',
+                  'usrp_e320_fpga_XG.bit.md5',
+                  'usrp_e320_fpga_XG.dts',
+                  'usrp_e320_fpga_XG.dts.md5',
+                  'usrp_e320_fpga_XG.rpt',
+                  'usrp_e320_fpga_AA.bit',
+                  'usrp_e320_fpga_AA.bit.md5',
+                  'usrp_e320_fpga_AA.dts',
+                  'usrp_e320_fpga_AA.dts.md5',
+                  'usrp_e320_fpga_AA.rpt']
+    },
     "x300": {
         "type": "x3xx",
         "package_name": "x3xx_x300_fpga_default-g{}.zip",
-- 
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