From d7304cc724de43b0d61d5b9d61a528d58898f004 Mon Sep 17 00:00:00 2001 From: eklai Date: Thu, 23 Jan 2020 18:47:28 -0800 Subject: x300: add front-panel GPIO source control Adds a ZPU register to control the FP GPIO source. These are 2bits per GPIO pin, totalling 24 bits. 0 corresponds to RF-A, 1 corresponds to RF-B. The following Python code will control the upper 6 bits of the front-panel GPIO from the B-side radio on an X300: >>> import uhd >>> U = uhd.usrp.MultiUSRP("type=x300") >>> U.get_gpio_src_banks() ['FP0'] >>> U.get_gpio_src("FP0") ['RFA', 'RFA', 'RFA', 'RFA', 'RFA', 'RFA', 'RFA', 'RFA', 'RFA', 'RFA', 'RFA', 'RFA'] >>> U.set_gpio_src("FP0", ['RFA', 'RFA', 'RFA', 'RFA', 'RFA', 'RFA', 'RFB', 'RFB', 'RFB', 'RFB', 'RFB', 'RFB']) >>> U.get_gpio_src("FP0") ['RFA', 'RFA', 'RFA', 'RFA', 'RFA', 'RFA', 'RFB', 'RFB', 'RFB', 'RFB', 'RFB', 'RFB'] >>> # Make all GPIOs outputs: >>> U.set_gpio_attr("FP0A", "DDR", 0xFFF) >>> U.set_gpio_attr("FP0B", "DDR", 0xFFF) >>> # Control all GPIOs from software (not ATR): >>> U.set_gpio_attr("FP0A", "CTRL", 0x000) >>> U.set_gpio_attr("FP0B", "CTRL", 0x000) >>> # Bottom 3 pins go high from radio A >>> U.set_gpio_attr("FP0A", "OUT", 0x007) >>> # Top 3 pins go high from radio B >>> U.set_gpio_attr("FP0B", "OUT", 0xE00) Amends the gpio.cpp example to allow switching the source. Co-authored-by: Brent Stapleton --- host/examples/gpio.cpp | 48 ++++++++++++-- host/lib/usrp/multi_usrp_python.hpp | 3 + host/lib/usrp/x300/x300_mb_controller.cpp | 105 ++++++++++++++++++++++++++---- host/lib/usrp/x300/x300_mb_controller.hpp | 4 ++ host/lib/usrp/x300/x300_radio_control.cpp | 47 ++++++------- host/lib/usrp/x300/x300_regs.hpp | 4 +- 6 files changed, 164 insertions(+), 47 deletions(-) (limited to 'host') diff --git a/host/examples/gpio.cpp b/host/examples/gpio.cpp index fdd65349e..779fc1fa0 100644 --- a/host/examples/gpio.cpp +++ b/host/examples/gpio.cpp @@ -1,6 +1,7 @@ // // Copyright 2014-15 Ettus Research LLC // Copyright 2018 Ettus Research, a National Instruments Company +// Copyright 2020 Ettus Research, a National Instruments Brand // // SPDX-License-Identifier: GPL-3.0-or-later // @@ -48,8 +49,11 @@ // ATR_TX - Output values to be set when transmitting // ATR_XX - Output values to be set when operating in full duplex // This code below contains examples of setting all these registers. On -// devices with multiple radios, the ATR for the front panel GPIO is driven -// by the state of the first radio (0 or A). +// devices with multiple radios, the ATR driver for the front panel GPIO +// defaults to the state of the first radio (0 or A). This can be changed +// on a bit-by-bit basis by writing to the register: +// The ATR source can also be controlled, ie. drive from Radio0 or Radio1. +// SRC - Source (RFA=Radio0, RFB=Radio1, etc.) // // The UHD API // The multi_usrp::set_gpio_attr() method is the UHD API for configuring and @@ -57,8 +61,9 @@ // bank - the name of the GPIO bank (typically "FP0" for front panel GPIO, // "TX" for TX daughter card GPIO, or // "RX" for RX daughter card GPIO) -// attr - attribute (register) to change ("DDR", "OUT", "CTRL", "ATR_0X", -// "ATR_RX", "ATR_TX", "ATR_XX") +// attr - attribute (register) to change ("SRC", "DDR", "OUT", "CTRL", +// "ATR_0X", "ATR_RX", "ATR_TX", +// "ATR_XX") // value - the value to be set // mask - a mask indicating which bits in the specified attribute register are // to be changed (default is all bits). @@ -71,6 +76,7 @@ #include #include #include +#include #include #include #include @@ -127,6 +133,13 @@ void output_reg_values(const std::string bank, % to_bit_string(gpio_bits, num_bits)) << std::endl; } + // GPIO Src + const auto gpio_src = usrp->get_gpio_src(bank); + std::cout << boost::format("%10s:") % "SRC: "; + for (auto src : gpio_src) { + std::cout << " " << src; + } + std::cout << std::endl; } int UHD_SAFE_MAIN(int argc, char* argv[]) @@ -137,9 +150,12 @@ int UHD_SAFE_MAIN(int argc, char* argv[]) double rx_rate, tx_rate, dwell; std::string gpio; size_t num_bits; + std::string src_str; std::string ctrl_str; std::string ddr_str; std::string out_str; + std::string tx_subdev_spec; + std::string rx_subdev_spec; // setup the program options po::options_description desc("Allowed options"); @@ -147,6 +163,8 @@ int UHD_SAFE_MAIN(int argc, char* argv[]) desc.add_options() ("help", "help message") ("args", po::value(&args)->default_value(""), "multi uhd device address args") + ("tx_subdev_spec", po::value(&tx_subdev_spec)->default_value(""), "A:0, B:0, or A:0 B:0") + ("rx_subdev_spec", po::value(&rx_subdev_spec)->default_value(""), "A:0, B:0, or A:0 B:0") ("repeat", "repeat loop until Ctrl-C is pressed") ("list-banks", "print list of banks before running tests") ("cpu", po::value(&cpu)->default_value(GPIO_DEFAULT_CPU_FORMAT), "cpu data format") @@ -157,6 +175,7 @@ int UHD_SAFE_MAIN(int argc, char* argv[]) ("bank", po::value(&gpio)->default_value(GPIO_DEFAULT_GPIO), "name of gpio bank") ("bits", po::value(&num_bits)->default_value(GPIO_DEFAULT_NUM_BITS), "number of bits in gpio bank") ("bitbang", "single test case where user sets values for CTRL, DDR, and OUT registers") + ("src", po::value(&src_str), "GPIO SRC reg value") ("ddr", po::value(&ddr_str)->default_value(GPIO_DEFAULT_DDR), "GPIO DDR reg value") ("out", po::value(&out_str)->default_value(GPIO_DEFAULT_OUT), "GPIO OUT reg value") ; @@ -187,6 +206,18 @@ int UHD_SAFE_MAIN(int argc, char* argv[]) } std::cout << "Using GPIO bank: " << gpio << std::endl; + // subdev spec + if (tx_subdev_spec != "") + usrp->set_tx_subdev_spec(tx_subdev_spec); + if (rx_subdev_spec != "") + usrp->set_rx_subdev_spec(rx_subdev_spec); + std::cout << boost::format(" rx_subdev_spec: %s") + % usrp->get_rx_subdev_spec(0).to_string() + << std::endl; + std::cout << boost::format(" tx_subdev_spec: %s") + % usrp->get_tx_subdev_spec(0).to_string() + << std::endl; + // print out initial unconfigured state of FP GPIO std::cout << "Initial GPIO values:" << std::endl; output_reg_values(gpio, usrp, num_bits); @@ -227,6 +258,15 @@ int UHD_SAFE_MAIN(int argc, char* argv[]) ddr |= GPIO_BIT(4); } + // set GPIO driver source + if (vm.count("src")) { + std::vector gpio_src; + typedef boost::char_separator separator; + boost::tokenizer tokens(src_str, separator(" ")); + std::copy(tokens.begin(), tokens.end(), std::back_inserter(gpio_src)); + usrp->set_gpio_src(gpio, gpio_src); + } + // set data direction register (DDR) usrp->set_gpio_attr(gpio, "DDR", ddr, mask); diff --git a/host/lib/usrp/multi_usrp_python.hpp b/host/lib/usrp/multi_usrp_python.hpp index c9d89888b..8d25e26d4 100644 --- a/host/lib/usrp/multi_usrp_python.hpp +++ b/host/lib/usrp/multi_usrp_python.hpp @@ -24,6 +24,7 @@ void export_multi_usrp(py::module& m) // Factory .def(py::init(&multi_usrp::make)) + // clang-format off // General USRP methods .def("get_rx_freq" , &multi_usrp::get_rx_freq, py::arg("chan") = 0) .def("get_rx_num_channels" , &multi_usrp::get_rx_num_channels) @@ -170,6 +171,7 @@ void export_multi_usrp(py::module& m) .def("get_gpio_srcs" , &multi_usrp::get_gpio_srcs, py::arg("bank"), py::arg("mboard") = 0) .def("get_gpio_src" , &multi_usrp::get_gpio_src, py::arg("bank"), py::arg("mboard") = 0) .def("set_gpio_src" , &multi_usrp::set_gpio_src, py::arg("bank"), py::arg("src"), py::arg("mboard") = 0) + .def("get_gpio_src_banks" , &multi_usrp::get_gpio_src_banks, py::arg("mboard") = 0) // Filter API methods .def("get_rx_filter_names" , &multi_usrp::get_rx_filter_names) @@ -178,6 +180,7 @@ void export_multi_usrp(py::module& m) .def("get_tx_filter_names" , &multi_usrp::get_tx_filter_names) .def("get_tx_filter" , &multi_usrp::get_tx_filter) .def("set_tx_filter" , &multi_usrp::set_tx_filter) + // clang-format off ; } diff --git a/host/lib/usrp/x300/x300_mb_controller.cpp b/host/lib/usrp/x300/x300_mb_controller.cpp index fd70526ab..28567e62e 100644 --- a/host/lib/usrp/x300/x300_mb_controller.cpp +++ b/host/lib/usrp/x300/x300_mb_controller.cpp @@ -1,5 +1,5 @@ // -// Copyright 2019 Ettus Research, a National Instruments Brand +// Copyright 2019-2020 Ettus Research, a National Instruments Brand // // SPDX-License-Identifier: GPL-3.0-or-later // @@ -26,7 +26,7 @@ constexpr uint32_t ADC_SELF_TEST_DURATION = 100; // ms // When these regs are fixed, there is another fixme below to actually init the // timekeepers -constexpr uint32_t TK_NUM_TIMEKEEPERS = 12; //Read-only +constexpr uint32_t TK_NUM_TIMEKEEPERS = 12; // Read-only constexpr uint32_t TK_REG_BASE = 100; constexpr uint32_t TK_REG_OFFSET = 48; constexpr uint32_t TK_REG_TICKS_NOW_LO = 0x00; // Read-only @@ -41,6 +41,11 @@ constexpr uint32_t TK_REG_TICKS_PERIOD_HI = 0x20; // Read-Write constexpr char LOG_ID[] = "X300::MB_CTRL"; +constexpr char GPIO_SRC_BANK[] = "FP0"; +constexpr char GPIO_SRC_RFA[] = "RFA"; +constexpr char GPIO_SRC_RFB[] = "RFB"; +constexpr size_t GPIO_SRC_NUM_PINS = 12; + } // namespace @@ -75,7 +80,9 @@ x300_mb_controller::x300_mb_controller(const size_t hw_rev, const size_t num_tks = _zpu_ctrl->peek32(SR_ADDR(SET0_BASE, TK_NUM_TIMEKEEPERS)); for (size_t i = 0; i < num_tks; i++) { - register_timekeeper(i, std::make_shared(i, _zpu_ctrl, clock_ctrl->get_master_clock_rate())); + register_timekeeper(i, + std::make_shared( + i, _zpu_ctrl, clock_ctrl->get_master_clock_rate())); } init_gps(); @@ -107,8 +114,7 @@ void x300_mb_controller::x300_timekeeper::set_ticks_now(const uint64_t ticks) get_tk_addr(TK_REG_TICKS_EVENT_LO), narrow_cast(ticks & 0xFFFFFFFF)); _zpu_ctrl->poke32( get_tk_addr(TK_REG_TICKS_EVENT_HI), narrow_cast(ticks >> 32)); - _zpu_ctrl->poke32( - get_tk_addr(TK_REG_TICKS_CTRL), narrow_cast(0x1)); + _zpu_ctrl->poke32(get_tk_addr(TK_REG_TICKS_CTRL), narrow_cast(0x1)); } void x300_mb_controller::x300_timekeeper::set_ticks_next_pps(const uint64_t ticks) @@ -117,16 +123,15 @@ void x300_mb_controller::x300_timekeeper::set_ticks_next_pps(const uint64_t tick get_tk_addr(TK_REG_TICKS_EVENT_LO), narrow_cast(ticks & 0xFFFFFFFF)); _zpu_ctrl->poke32( get_tk_addr(TK_REG_TICKS_EVENT_HI), narrow_cast(ticks >> 32)); - _zpu_ctrl->poke32( - get_tk_addr(TK_REG_TICKS_CTRL), narrow_cast(0x2)); + _zpu_ctrl->poke32(get_tk_addr(TK_REG_TICKS_CTRL), narrow_cast(0x2)); } void x300_mb_controller::x300_timekeeper::set_period(const uint64_t period_ns) { _zpu_ctrl->poke32(get_tk_addr(TK_REG_TICKS_PERIOD_LO), narrow_cast(period_ns & 0xFFFFFFFF)); - _zpu_ctrl->poke32(get_tk_addr(TK_REG_TICKS_PERIOD_HI), - narrow_cast(period_ns >> 32)); + _zpu_ctrl->poke32( + get_tk_addr(TK_REG_TICKS_PERIOD_HI), narrow_cast(period_ns >> 32)); } uint32_t x300_mb_controller::x300_timekeeper::get_tk_addr(const uint32_t tk_addr) @@ -247,8 +252,8 @@ void x300_mb_controller::set_clock_source(const std::string& source) .str()); } else { // TODO: Re-enable this warning when we figure out a reliable lock time - // UHD_LOGGER_WARNING("X300::MB_CTRL") << "Reference clock failed to lock to " + - // source + " during device initialization. " << + // UHD_LOGGER_WARNING("X300::MB_CTRL") << "Reference clock failed to lock + // to " + source + " during device initialization. " << // "Check for the lock before operation or ignore this warning if using // another clock source." ; } @@ -311,7 +316,8 @@ void x300_mb_controller::set_sync_source( set_sync_source(sync_args); } -void x300_mb_controller::set_sync_source(const device_addr_t& sync_source) { +void x300_mb_controller::set_sync_source(const device_addr_t& sync_source) +{ if (sync_source.has_key("clock_source")) { set_clock_source(sync_source["clock_source"]); } @@ -338,8 +344,7 @@ std::vector x300_mb_controller::get_sync_sources() {"external", "internal"}, {"external", "external"}, {"gpsdo", "gpsdo"}, - {"gpsdo", "internal"} - }; + {"gpsdo", "internal"}}; // Now convert to vector of device_addr_t std::vector sync_sources; @@ -484,6 +489,78 @@ bool x300_mb_controller::synchronize(std::vector& mb_contro throw uhd::runtime_error(err_str); } +std::vector x300_mb_controller::get_gpio_banks() const +{ + return {GPIO_SRC_BANK}; +} + +std::vector x300_mb_controller::get_gpio_srcs(const std::string& bank) const +{ + if (bank != GPIO_SRC_BANK) { + UHD_LOG_ERROR(LOG_ID, + "Invalid GPIO source bank: " << bank << ". Only supported bank is " + << GPIO_SRC_BANK); + throw uhd::runtime_error( + std::string("Invalid GPIO source bank: ") + GPIO_SRC_BANK); + } + return {GPIO_SRC_RFA, GPIO_SRC_RFB}; +} + +std::vector x300_mb_controller::get_gpio_src(const std::string& bank) +{ + if (bank != GPIO_SRC_BANK) { + UHD_LOG_ERROR(LOG_ID, + "Invalid GPIO source bank: " << bank << ". Only supported bank is " + << GPIO_SRC_BANK); + throw uhd::runtime_error( + std::string("Invalid GPIO source bank: ") + GPIO_SRC_BANK); + } + uint32_t fp_gpio_src = _zpu_ctrl->peek32(SR_ADDR(SET0_BASE, ZPU_RB_FP_GPIO_SRC)); + const auto gpio_srcs = get_gpio_srcs(bank); + std::vector gpio_src; + for (size_t ii = 0; ii < GPIO_SRC_NUM_PINS; ++ii) { + const uint32_t this_src = (fp_gpio_src >> (2 * ii)) & 0x3; + if (this_src > 1) { + UHD_LOG_WARNING(LOG_ID, + "get_gpio_src() read back invalid GPIO source index: " + << this_src << ". Falling back to " << (this_src & 0x1)); + } + gpio_src.push_back(gpio_srcs[this_src & 0x1]); + } + return gpio_src; +} + +void x300_mb_controller::set_gpio_src( + const std::string& bank, const std::vector& srcs) +{ + if (srcs.size() > GPIO_SRC_NUM_PINS) { + UHD_LOG_WARNING(LOG_ID, "set_gpio_src(): Provided more sources than pins!"); + } + uint32_t fp_gpio_src = _zpu_ctrl->peek32(SR_ADDR(SET0_BASE, ZPU_RB_FP_GPIO_SRC)); + size_t pins_configured = 0; + + const auto gpio_srcs = get_gpio_srcs(bank); + for (auto src : srcs) { + const uint32_t pins = [src]() { + if (src == GPIO_SRC_RFA) { + return 0; + } + if (src == GPIO_SRC_RFB) { + return 1; + } + UHD_LOG_ERROR(LOG_ID, "Invalid GPIO source provided: " << src); + throw uhd::runtime_error("Invalid GPIO source provided!"); + }(); + uint32_t pin_mask = ~(uint32_t(0x3) << (2 * pins_configured)); + fp_gpio_src = (fp_gpio_src & pin_mask) | (pins << 2 * pins_configured); + pins_configured++; + if (pins_configured > GPIO_SRC_NUM_PINS) { + break; + } + } + _zpu_ctrl->poke32(SR_ADDR(SET0_BASE, ZPU_SR_FP_GPIO_SRC), fp_gpio_src); +} + /****************************************************************************** * Private Methods *****************************************************************************/ diff --git a/host/lib/usrp/x300/x300_mb_controller.hpp b/host/lib/usrp/x300/x300_mb_controller.hpp index 53f166a0e..92844f1b9 100644 --- a/host/lib/usrp/x300/x300_mb_controller.hpp +++ b/host/lib/usrp/x300/x300_mb_controller.hpp @@ -120,6 +120,10 @@ public: bool synchronize(std::vector& mb_controllers, const uhd::time_spec_t& time_spec = uhd::time_spec_t(0.0), const bool quiet = false); + std::vector get_gpio_banks() const; + std::vector get_gpio_srcs(const std::string&) const; + std::vector get_gpio_src(const std::string&); + void set_gpio_src(const std::string&, const std::vector&); private: //! Return a string X300::MB_CTRL#N diff --git a/host/lib/usrp/x300/x300_radio_control.cpp b/host/lib/usrp/x300/x300_radio_control.cpp index c41a19401..48b484467 100644 --- a/host/lib/usrp/x300/x300_radio_control.cpp +++ b/host/lib/usrp/x300/x300_radio_control.cpp @@ -147,27 +147,24 @@ public: _init_codecs(); _x300_mb_control->register_reset_codec_cb([this]() { this->reset_codec(); }); // FP-GPIO - if (_radio_type == PRIMARY) { - RFNOC_LOG_TRACE("Creating FP-GPIO interface..."); - _fp_gpio = gpio_atr::gpio_atr_3000::make(_wb_iface, - x300_regs::SR_FP_GPIO, - x300_regs::RB_FP_GPIO, - x300_regs::PERIPH_REG_OFFSET); - // Create the GPIO banks and attributes, and populate them with some default - // values - // TODO: Do we need this section? Since the _fp_gpio handles state now, we - // don't need to stash values here. We only need this if we want to set - // anything to a default value. - for (const gpio_atr::gpio_attr_map_t::value_type attr : - gpio_atr::gpio_attr_map) { - // TODO: Default values? - if (attr.first == usrp::gpio_atr::GPIO_SRC) { - // Don't set the SRC - // TODO: Remove from the map?? - continue; - } - set_gpio_attr("FP0", usrp::gpio_atr::gpio_attr_map.at(attr.first), 0); + RFNOC_LOG_TRACE("Creating FP-GPIO interface..."); + _fp_gpio = gpio_atr::gpio_atr_3000::make(_wb_iface, + x300_regs::SR_FP_GPIO, + x300_regs::RB_FP_GPIO, + x300_regs::PERIPH_REG_OFFSET); + // Create the GPIO banks and attributes, and populate them with some default + // values + // TODO: Do we need this section? Since the _fp_gpio handles state now, we + // don't need to stash values here. We only need this if we want to set + // anything to a default value. + for (const gpio_atr::gpio_attr_map_t::value_type attr : gpio_atr::gpio_attr_map) { + // TODO: Default values? + if (attr.first == usrp::gpio_atr::GPIO_SRC) { + // Don't set the SRC + // TODO: Remove from the map?? + continue; } + set_gpio_attr("FP0", usrp::gpio_atr::gpio_attr_map.at(attr.first), 0); } // DB Initialization _init_db(); // This does not init the dboards themselves! @@ -855,17 +852,13 @@ public: /*** GPIO API ************************************************************/ std::vector get_gpio_banks() const { - std::vector banks{"RX", "TX"}; - if (_fp_gpio) { - banks.push_back("FP0"); - } - return banks; + return {"RX", "TX", "FP0"}; } void set_gpio_attr( const std::string& bank, const std::string& attr, const uint32_t value) { - if (bank == "FP0" and _fp_gpio) { + if (bank == "FP0") { _fp_gpio->set_gpio_attr(usrp::gpio_atr::gpio_attr_rev_map.at(attr), value); return; } @@ -909,7 +902,7 @@ public: uint32_t get_gpio_attr(const std::string& bank, const std::string& attr) { - if (bank == "FP0" and _fp_gpio) { + if (bank == "FP0") { return _fp_gpio->get_attr_reg(usrp::gpio_atr::gpio_attr_rev_map.at(attr)); } if (bank.size() >= 2 and bank[1] == 'X') { diff --git a/host/lib/usrp/x300/x300_regs.hpp b/host/lib/usrp/x300/x300_regs.hpp index 64ff63d77..86ffd46c4 100644 --- a/host/lib/usrp/x300/x300_regs.hpp +++ b/host/lib/usrp/x300/x300_regs.hpp @@ -35,8 +35,7 @@ static const int ZPU_SR_REF_FREQ = 04; static const int ZPU_SR_SPI = 32; static const int ZPU_SR_ETHINT0 = 40; static const int ZPU_SR_ETHINT1 = 56; -static const int ZPU_SR_DRAM_FIFO0 = 72; -static const int ZPU_SR_DRAM_FIFO1 = 80; +static const int ZPU_SR_FP_GPIO_SRC = 72; // reset bits #define ZPU_SR_SW_RST_ETH_PHY (1 << 0) @@ -51,6 +50,7 @@ static const int ZPU_RB_NUM_CE = 7; static const int ZPU_RB_GIT_HASH = 10; static const int ZPU_RB_SFP0_TYPE = 4; static const int ZPU_RB_SFP1_TYPE = 5; +static const int ZPU_RB_FP_GPIO_SRC = 13; static const uint32_t RB_SFP_1G_ETH = 0; static const uint32_t RB_SFP_10G_ETH = 1; -- cgit v1.2.3