From 625acef8d1f3d4d28a7d5f91b81353f50e6c7e17 Mon Sep 17 00:00:00 2001 From: Michael West Date: Fri, 17 Jan 2014 17:08:21 -0800 Subject: Added hardware reference to B200 documentation. --- host/docs/usrp_b200.rst | 114 ++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 114 insertions(+) (limited to 'host') diff --git a/host/docs/usrp_b200.rst b/host/docs/usrp_b200.rst index 81e66684e..7b4e343f1 100644 --- a/host/docs/usrp_b200.rst +++ b/host/docs/usrp_b200.rst @@ -85,3 +85,117 @@ and the transmit frontends have 89 dB of available gain. Gain settings are application specific, but its recommended that users consider using at least half of the available gain to get reasonable dynamic range. + +------------------------------------------------------------------------ +Hardware Reference +------------------------------------------------------------------------ + +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +LED Indicators +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +Below is a table of the LED indicators and their meanings: + +=============== ======================== ======================================================== +Component ID Description Details +=============== ======================== ======================================================== + LED600 Power Indicator | off = no power applied + | red = power applied (external or USB) + LED800 Channel 2 RX2 Activity | off = no activity + | green = receiving* + LED801 Channel 2 TX/RX Activity | off = no activity + | green = receiving* + | red = transmitting + | orange = switching between transmitting and receiving + LED802 Channel 1 TX/RX Activity | off = no activity + | green = receiving* + | red = transmitting + | orange = switching between transmitting and receiving + LED803 Channel 1 RX2 Activity | off = no activity + | green = receiving* + LED100 GPS lock indicator | off = no lock + | green = lock +=============== ======================== ======================================================== + +\* RX activity LED indicators will blink off in a receive overflow condition, indicating that the host is not receiving samples fast enough. The host will be notified and output an "O" as well. + + +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +External Connections +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +Below is a table showing the external connections and respective power information: + +=============== ======================== ======================================================== +Component ID Description Details +=============== ======================== ======================================================== + J601 External Power | 6 V + | 3 A + J701 USB Connector + J104 External PPS Input | 3.3 V nominal + | 3.6 V recommended max + | 4.6 V absolute max + J101 GPS Antenna | GPSDO will supply nominal voltage to antenna. + J100 External 10 MHz Input | 15 dBm max (3.5 V into 50 ohms) + J800 RF B: TX/RX | TX power 10dBm max + | RX power -15dBm max + J802 RF B: RX2 | RX power -15dBm max + J803 RF A: RX2 | RX power -15dBm max + J801 RF A: TX/RX | TX power 10dBm max + | RX power -15dBm max +=============== ======================== ======================================================== + +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +On-Board Connectors and Switches +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +Below is a table showing the on-board connectors and switches: + +=============== ======================== ======================================================== +Component ID Description Details +=============== ======================== ======================================================== + J502 Mictor Connector | Interface to FPGA for I/O and inspection. + J503 JTAG Header | Interface to FPGA for programming and debugging. + J400 Debug Header | Pin 1 - serial data out (115200 8,N,1 @ 1.8V) + | Pin 2 - ground + | Pin 3 - serial data in (not connected) + S100 GPSDO ISP Enable Switch | Not supported + S700 FX3 Hard Reset Switch +=============== ======================== ======================================================== + +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +Test Points +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +Below is a table showing the test points: + +=============== ================================== =================== +Component ID Description Details +=============== ================================== =================== + J603 Upstream Voltage Regulation | 3.3 V supply + Test Point | Pin 1 - 3.7 V + | Pin 2 - gnd + J604 Catalina Supply Test Point | Pin 1 - 1.3 V + | Pin 2 - gnd + J605 FPGA Supply Test Point | Pin 1 - 1.2 V + | Pin 2 - gnd + J606 FX3 Supply Test Point | Pin 1 - 1.2V + | Pin 2 - gnd + J609 Upstream Voltage Regulation | 1.3 V supply + Test Point | Pin 1 - 1.8 V + | Pin 2 - gnd + T600 External Voltage Supply + Test Point + T601 1.3 V Catalina Power Good + Test Point + T602 1.3 V Catalina Synthesizer + Power Good Test Point + TP302 Catalina AUX DAC1 Test Point + TP303 Catalina AUX DAC2 Test Point + T700 Not connected + T701 Not connected + T702 FX3 External Clock In | Not used + T703 FX3 Charger Detect Out +=============== ================================== =================== + + -- cgit v1.2.3 From 09915aa57bc88099cbcbbe925946ae65bc0ad8f0 Mon Sep 17 00:00:00 2001 From: michael-west Date: Tue, 25 Mar 2014 15:53:34 -0700 Subject: Addressed comments from review. --- host/docs/usrp_b200.rst | 29 ++++++++++++++--------------- 1 file changed, 14 insertions(+), 15 deletions(-) (limited to 'host') diff --git a/host/docs/usrp_b200.rst b/host/docs/usrp_b200.rst index 7b4e343f1..7986e3b73 100644 --- a/host/docs/usrp_b200.rst +++ b/host/docs/usrp_b200.rst @@ -102,23 +102,22 @@ Component ID Description Details LED600 Power Indicator | off = no power applied | red = power applied (external or USB) LED800 Channel 2 RX2 Activity | off = no activity - | green = receiving* + | green = receiving LED801 Channel 2 TX/RX Activity | off = no activity - | green = receiving* + | green = receiving | red = transmitting | orange = switching between transmitting and receiving LED802 Channel 1 TX/RX Activity | off = no activity - | green = receiving* + | green = receiving | red = transmitting | orange = switching between transmitting and receiving LED803 Channel 1 RX2 Activity | off = no activity - | green = receiving* + | green = receiving LED100 GPS lock indicator | off = no lock | green = lock =============== ======================== ======================================================== -\* RX activity LED indicators will blink off in a receive overflow condition, indicating that the host is not receiving samples fast enough. The host will be notified and output an "O" as well. - +TX LED indicators are on when transimitting data and off when no samples are available to transmit. RX LED indicators are on when sending samples to the host and off when unable to do so. This means that TX/RX activity LED indicators will blink off in a temporary transmit underflow or receive overflow condition, indicating that the host is not sending or receiving samples fast enough. The host will be notified of the condition and output a "U" or "O" as well. ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ External Connections @@ -131,17 +130,15 @@ Component ID Description Details =============== ======================== ======================================================== J601 External Power | 6 V | 3 A - J701 USB Connector - J104 External PPS Input | 3.3 V nominal - | 3.6 V recommended max - | 4.6 V absolute max + J701 USB Connector | USB 3.0 + J104 External PPS Input | 1.8 V - 5 V J101 GPS Antenna | GPSDO will supply nominal voltage to antenna. - J100 External 10 MHz Input | 15 dBm max (3.5 V into 50 ohms) - J800 RF B: TX/RX | TX power 10dBm max + J100 External 10 MHz Input | +15 dBm max + J800 RF B: TX/RX | TX power +20dBm max | RX power -15dBm max J802 RF B: RX2 | RX power -15dBm max J803 RF A: RX2 | RX power -15dBm max - J801 RF A: TX/RX | TX power 10dBm max + J801 RF A: TX/RX | TX power +20dBm max | RX power -15dBm max =============== ======================== ======================================================== @@ -154,8 +151,8 @@ Below is a table showing the on-board connectors and switches: =============== ======================== ======================================================== Component ID Description Details =============== ======================== ======================================================== - J502 Mictor Connector | Interface to FPGA for I/O and inspection. - J503 JTAG Header | Interface to FPGA for programming and debugging. + J502* Mictor Connector | Interface to FPGA for I/O and inspection. + J503* JTAG Header | Interface to FPGA for programming and debugging. J400 Debug Header | Pin 1 - serial data out (115200 8,N,1 @ 1.8V) | Pin 2 - ground | Pin 3 - serial data in (not connected) @@ -163,6 +160,8 @@ Component ID Description Details S700 FX3 Hard Reset Switch =============== ======================== ======================================================== +\* B210 Only + ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ Test Points ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ -- cgit v1.2.3 From 72bcea366a866ead85f9883d06475516ac64a850 Mon Sep 17 00:00:00 2001 From: michael-west Date: Wed, 26 Mar 2014 15:59:30 -0700 Subject: Changed all references to Catalina to AD9361 --- host/docs/usrp_b200.rst | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'host') diff --git a/host/docs/usrp_b200.rst b/host/docs/usrp_b200.rst index 1b0d7b719..3fd9dacb5 100644 --- a/host/docs/usrp_b200.rst +++ b/host/docs/usrp_b200.rst @@ -165,7 +165,7 @@ Component ID Description Details J603 Upstream Voltage Regulation | 3.3 V supply Test Point | Pin 1 - 3.7 V | Pin 2 - gnd - J604 Catalina Supply Test Point | Pin 1 - 1.3 V + J604 AD9361 Supply Test Point | Pin 1 - 1.3 V | Pin 2 - gnd J605 FPGA Supply Test Point | Pin 1 - 1.2 V | Pin 2 - gnd @@ -176,12 +176,12 @@ Component ID Description Details | Pin 2 - gnd T600 External Voltage Supply Test Point - T601 1.3 V Catalina Power Good + T601 1.3 V AD9361 Power Good Test Point - T602 1.3 V Catalina Synthesizer + T602 1.3 V AD9361 Synthesizer Power Good Test Point - TP302 Catalina AUX DAC1 Test Point - TP303 Catalina AUX DAC2 Test Point + TP302 AD9361 AUX DAC1 Test Point + TP303 AD9361 AUX DAC2 Test Point T700 Not connected T701 Not connected T702 FX3 External Clock In | Not used -- cgit v1.2.3 From e748189e0ee26d8eaef3eb2663e4fe3033d57809 Mon Sep 17 00:00:00 2001 From: michael-west Date: Thu, 27 Mar 2014 16:10:30 -0700 Subject: Removed debug header, GPSDO ISP switch, and test points. --- host/docs/usrp_b200.rst | 39 --------------------------------------- 1 file changed, 39 deletions(-) (limited to 'host') diff --git a/host/docs/usrp_b200.rst b/host/docs/usrp_b200.rst index 3fd9dacb5..327bbb6df 100644 --- a/host/docs/usrp_b200.rst +++ b/host/docs/usrp_b200.rst @@ -144,48 +144,9 @@ Component ID Description Details =============== ======================== ======================================================== J502* Mictor Connector | Interface to FPGA for I/O and inspection. J503* JTAG Header | Interface to FPGA for programming and debugging. - J400 Debug Header | Pin 1 - serial data out (115200 8,N,1 @ 1.8V) - | Pin 2 - ground - | Pin 3 - serial data in (not connected) - S100 GPSDO ISP Enable Switch | Not supported S700 FX3 Hard Reset Switch =============== ======================== ======================================================== \* B210 Only -^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ -Test Points -^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ - -Below is a table showing the test points: - -=============== ================================== =================== -Component ID Description Details -=============== ================================== =================== - J603 Upstream Voltage Regulation | 3.3 V supply - Test Point | Pin 1 - 3.7 V - | Pin 2 - gnd - J604 AD9361 Supply Test Point | Pin 1 - 1.3 V - | Pin 2 - gnd - J605 FPGA Supply Test Point | Pin 1 - 1.2 V - | Pin 2 - gnd - J606 FX3 Supply Test Point | Pin 1 - 1.2V - | Pin 2 - gnd - J609 Upstream Voltage Regulation | 1.3 V supply - Test Point | Pin 1 - 1.8 V - | Pin 2 - gnd - T600 External Voltage Supply - Test Point - T601 1.3 V AD9361 Power Good - Test Point - T602 1.3 V AD9361 Synthesizer - Power Good Test Point - TP302 AD9361 AUX DAC1 Test Point - TP303 AD9361 AUX DAC2 Test Point - T700 Not connected - T701 Not connected - T702 FX3 External Clock In | Not used - T703 FX3 Charger Detect Out -=============== ================================== =================== - -- cgit v1.2.3