From 15b0f5feef3e30f762ded1d27235bd167e3e5c28 Mon Sep 17 00:00:00 2001 From: Josh Blum Date: Thu, 29 Apr 2010 16:08:10 -0700 Subject: added reg map for ad9862 --- host/lib/CMakeLists.txt | 5 + host/lib/ic_reg_maps/common.py | 13 +- host/lib/ic_reg_maps/gen_ad9510_regs.py | 18 +- host/lib/ic_reg_maps/gen_ad9777_regs.py | 8 +- host/lib/ic_reg_maps/gen_ad9862_regs.py | 285 +++++++++++++++++++++++++++++++ host/lib/ic_reg_maps/gen_max2829_regs.py | 12 +- host/lib/transport/gen_vrt.py | 4 - 7 files changed, 319 insertions(+), 26 deletions(-) create mode 100755 host/lib/ic_reg_maps/gen_ad9862_regs.py (limited to 'host') diff --git a/host/lib/CMakeLists.txt b/host/lib/CMakeLists.txt index 5252eda8f..a4e492b49 100644 --- a/host/lib/CMakeLists.txt +++ b/host/lib/CMakeLists.txt @@ -118,6 +118,11 @@ UHD_PYTHON_GEN_SOURCE_FILE( ${CMAKE_CURRENT_BINARY_DIR}/ic_reg_maps/max2829_regs.hpp ) +UHD_PYTHON_GEN_SOURCE_FILE( + ${CMAKE_CURRENT_SOURCE_DIR}/ic_reg_maps/gen_ad9862_regs.py + ${CMAKE_CURRENT_BINARY_DIR}/ic_reg_maps/ad9862_regs.hpp +) + ######################################################################## # Add dboard sources ######################################################################## diff --git a/host/lib/ic_reg_maps/common.py b/host/lib/ic_reg_maps/common.py index d05470706..b33961b03 100644 --- a/host/lib/ic_reg_maps/common.py +++ b/host/lib/ic_reg_maps/common.py @@ -22,17 +22,24 @@ from Cheetah.Template import Template def parse_tmpl(_tmpl_text, **kwargs): return str(Template(_tmpl_text, kwargs)) +def to_num(arg): return eval(arg) + class reg: def __init__(self, reg_des): + try: self.parse(reg_des) + except Exception, e: + raise Exception, 'Error parsing register description: "%s"\nWhat: %s'%(reg_des, e) + + def parse(self, reg_des): x = re.match('^(\w*)\s*(\w*)\[(.*)\]\s*(\w*)\s*(.*)$', reg_des) name, addr, bit_range, default, enums = x.groups() #store variables self._name = name - self._addr = int(addr, 16) + self._addr = to_num(addr) if ':' in bit_range: self._addr_spec = sorted(map(int, bit_range.split(':'))) else: self._addr_spec = int(bit_range), int(bit_range) - self._default = int(default, 16) + self._default = to_num(default) #extract enum self._enums = list() @@ -41,7 +48,7 @@ class reg: for enum_str in map(str.strip, enums.split(',')): if '=' in enum_str: enum_name, enum_val = enum_str.split('=') - enum_val = int(enum_val) + enum_val = to_num(enum_val) else: enum_name = enum_str self._enums.append((enum_name, enum_val)) enum_val += 1 diff --git a/host/lib/ic_reg_maps/gen_ad9510_regs.py b/host/lib/ic_reg_maps/gen_ad9510_regs.py index 2dc19c691..17cc141fc 100755 --- a/host/lib/ic_reg_maps/gen_ad9510_regs.py +++ b/host/lib/ic_reg_maps/gen_ad9510_regs.py @@ -46,14 +46,14 @@ reset_all_counters 9[0] 0 ncounter_reset 9[1] 0 rcounter_reset 9[2] 0 cp_current_setting 9[4:6] 0 0_60ma, 1_2ma, 1_8ma, 2_4ma, 3_0ma, 3_6ma, 4_2ma, 4_8ma -pll_power_down A[0:1] 0 normal=0, async_pd=1, sync_pd=3 -prescaler_value A[2:4] 0 div1, div2, 2_3, 4_5, 8_9, 16_17, 32_33, div3 -b_counter_bypass A[6] 0 -ref_counter_msb B[0:5] 0 -ref_counter_lsb C[0:7] 0 -antibacklash_pw D[0:1] 0 1_3ns, 2_9ns, 6_0ns -dld_window D[5] 0 9_5ns, 3_5ns -lock_detect_disable D[6] 0 enb, dis +pll_power_down 0xA[0:1] 0 normal=0, async_pd=1, sync_pd=3 +prescaler_value 0xA[2:4] 0 div1, div2, 2_3, 4_5, 8_9, 16_17, 32_33, div3 +b_counter_bypass 0xA[6] 0 +ref_counter_msb 0xB[0:5] 0 +ref_counter_lsb 0xC[0:7] 0 +antibacklash_pw 0xD[0:1] 0 1_3ns, 2_9ns, 6_0ns +dld_window 0xD[5] 0 9_5ns, 3_5ns +lock_detect_disable 0xD[6] 0 enb, dis ######################################################################## ## fine delay adjust ######################################################################## @@ -103,7 +103,7 @@ soft_sync 58[2] 0 dist_power_down 58[3] 0 sync_power_down 58[4] 0 function_pin_select 58[5:6] 0 resetb, syncb, test, pdb -update_registers 5A[0] 0 +update_registers 0x5A[0] 0 """ ######################################################################## diff --git a/host/lib/ic_reg_maps/gen_ad9777_regs.py b/host/lib/ic_reg_maps/gen_ad9777_regs.py index 2ac73efcf..6ff212b4d 100755 --- a/host/lib/ic_reg_maps/gen_ad9777_regs.py +++ b/host/lib/ic_reg_maps/gen_ad9777_regs.py @@ -73,16 +73,16 @@ qdac_fine_gain_adjust 9[0:7] 0 ## address 6 and A ######################################################################## idac_coarse_gain_adjust 6[0:3] 0 -qdac_coarse_gain_adjust A[0:3] 0 +qdac_coarse_gain_adjust 0xA[0:3] 0 ######################################################################## ## address 7, 8 and B, C ######################################################################## idac_offset_adjust_msb 7[0:7] 0 idac_offset_adjust_lsb 8[0:1] 0 idac_ioffset_direction 8[7] 0 out_a, out_b -qdac_offset_adjust_msb B[0:7] 0 -qdac_offset_adjust_lsb C[0:1] 0 -qdac_ioffset_direction C[7] 0 out_a, out_b +qdac_offset_adjust_msb 0xB[0:7] 0 +qdac_offset_adjust_lsb 0xC[0:1] 0 +qdac_ioffset_direction 0xC[7] 0 out_a, out_b """ ######################################################################## diff --git a/host/lib/ic_reg_maps/gen_ad9862_regs.py b/host/lib/ic_reg_maps/gen_ad9862_regs.py new file mode 100755 index 000000000..0d03c7bb6 --- /dev/null +++ b/host/lib/ic_reg_maps/gen_ad9862_regs.py @@ -0,0 +1,285 @@ +#!/usr/bin/env python +# +# Copyright 2010 Ettus Research LLC +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . +# + +import sys +from common import * + +######################################################################## +# Template for raw text data describing registers +# name addr[bit range inclusive] default optional enums +######################################################################## +REGS_DATA_TMPL="""\ +######################################################################## +## General +######################################################################## +sdio_bidir 0[7] 0 sdio_sdo, sdio +lsb_first 0[6] 0 msb, lsb +soft_reset 0[5] 0 +######################################################################## +## Rx Power Down +######################################################################## +pd_vref_diff 1[7] 0 +pd_vref 1[6] 0 +pd_rx_digital 1[5] 0 +pd_rx_channel_b 1[4] 0 +pd_rx_channel_a 1[3] 0 +pd_buffer_b 1[2] 0 +pd_buffer_a 1[1] 0 +pd_all_rx 1[0] 0 +######################################################################## +## Rx A and B +######################################################################## +#for $x, $i in (('a', 2), ('b', 3)) +byp_buffer_$x $(i)[7] 0 +rx_pga_$x $(i)[0:4] 0 +#end for +######################################################################## +## Rx Misc +######################################################################## +hs_duty_cycle 4[2] 0 +shared_ref 4[1] 0 +clk_duty 4[0] 0 +######################################################################## +## RX I/F (INTERFACE) +######################################################################## +three_state 5[4] 0 +rx_retime 5[3] 0 clkout1, clkout2 +rx_twos_comp 5[2] 0 +inv_rxsync 5[1] 0 +mux_out 5[0] 0 rx_mux_mode=1, dual_port_mode=0 +######################################################################## +## RX Digital +######################################################################## +two_channel 6[3] 1 rx_b_dis, both_enb +rx_keep_ve 6[2] 0 pass_pos, pass_neg +rx_hilbert 6[1] 0 dis, enb +decimate 6[0] 0 dis, enb +######################################################################## +## TX Power Down +######################################################################## +alt_timing_mode 8[5] 0 +txoff_enable 8[4] 0 +tx_digital_pd 8[3] 0 +tx_analog_pd 8[0:2] 0 none=0, txb=4, txa=2, both=7 +######################################################################## +## Tx Offset and Gain +######################################################################## +#for $x, $i, $j, $k in (('a', 10, 11, 14), ('b', 12, 13, 15)) +dac_$(x)_offset_1_0 $(i)[6:7] 0 +dac_$(x)_offset_dir $(i)[0] 0 neg_diff, pos_dif +dac_$(x)_offset_9_2 $(j)[0:7] 0 +dac_$(x)_coarse_gain $(k)[6:7] 0 +dac_$(x)_fine_gain $(k)[0:5] 0 +#end for +tx_pga_gain 16[0:7] 0 +######################################################################## +## Tx Misc +######################################################################## +tx_slave_enable 17[1] 0 +tx_pga_mode 17[0] 0 normal, fast +######################################################################## +## Tx IF (INTERFACE) +######################################################################## +tx_retime 18[6] 1 clkout1=1, clkout2=0 +qi_order 18[5] 0 iq, qi +inv_txsync 18[4] 0 +tx_twos_comp 18[3] 0 +inverse_samp 18[2] 0 rise, fall +edges 18[1] 0 normal, both +interleaved 18[0] 0 single, interleaved +######################################################################## +## TX Digital +######################################################################## +two_data_paths 19[4] 0 single, both +tx_keep_ve 19[3] 0 pass_pos, pass_neg +tx_hilbert 19[2] 0 dis, enb +interp 19[0:1] 0 1, 2, 4 +######################################################################## +## TX Modulator +######################################################################## +neg_fine_tune 20[5] 0 pos_shift, neg_shift +fine_mode 20[4] 0 bypass, nco +real_mix_mode 20[3] 0 complex, real +neg_coarse_tune 20[2] 0 pos_shift, neg_shift +coarse_mod 20[0:1] 0 bypass, fdac_4, fdac_8 +######################################################################## +## NCO Tuning Word +######################################################################## +ftw_7_0 21[0:7] 0 +ftw_15_8 22[0:7] 0 +ftw_23_16 23[0:7] 0 +######################################################################## +## DLL +######################################################################## +input_clk_ctrl 24[6] 0 external, internal +adc_div2 24[5] 0 normal, div2 +dll_mult 24[3:4] 0 1, 2, 4 +dll_pd 24[2] 0 +dll_mode 24[0] 0 slow, fast +######################################################################## +## Clock Out +######################################################################## +clkout2_div_factor 25[6:7] 0 1, 2, 4, 8 +inv2 25[5] 0 normal, inverted +inv1 25[1] 0 normal, inverted +dis2 25[4] 0 enb, dis +dis1 25[0] 0 enb, dis +######################################################################## +## Aux ADC +######################################################################## +#for $x, $i in (('a2', 26), ('a1', 28), ('b2', 30), ('b1', 32)) +aux_adc_$(x)_1_0 $(i)[6:7] 0 +aux_adc_$(x)_9_2 $int(1+$i)[0:7] 0 +#end for +######################################################################## +## Aux ADC Control +######################################################################## +aux_spi 34[7] 0 dis, enb +sel_bnota 34[6] 0 adc_a, adc_b +#for $x, $i in (('b', 5), ('a', 2)) +refsel_$(x) 34[$i] 0 external, internal +select_$(x) 34[$int($i-1)] 0 aux_adc2, aux_adc1 +start_$(x) 34[$int($i-2)] 0 +#end for +######################################################################## +## Aux ADC Clock +######################################################################## +clk_4 35[0] 0 1_2, 1_4 +######################################################################## +## Aux DAC +######################################################################## +#for $x, $i in (('a', 36), ('b', 37), ('c', 38)) +aux_dac_$x $(i)[0:7] 0 +#end for +######################################################################## +## Aux DAC Update +######################################################################## +aux_dac_slave_enable 39[7] 0 +aux_dacupdate_c 39[2] 0 +aux_dacupdate_b 39[1] 0 +aux_dacupdate_a 39[0] 0 +######################################################################## +## AUX DAC Power Down +######################################################################## +aux_dac_pd_a 40[2] 0 +aux_dac_pd_b 40[1] 0 +aux_dac_pd_c 40[0] 0 +######################################################################## +## AUX DAC Control +######################################################################## +aux_dac_invert_a 41[2] 0 +aux_dac_invert_b 41[1] 0 +aux_dac_invert_c 41[0] 0 +######################################################################## +## Sig Delt +######################################################################## +sig_delt_3_0 42[4:7] 0 +sig_delt_11_4 43[0:7] 0 +######################################################################## +## ADC Low Power +######################################################################## +rx_low_power_mode_r49 49[0:7] 0 +rx_low_power_mode_r50 50[0:7] 0 +######################################################################## +## Chip ID +######################################################################## +chip_id 63[0:7] 0 +""" + +######################################################################## +# Header and Source templates below +######################################################################## +HEADER_TEXT=""" +#import time + +/*********************************************************************** + * This file was generated by $file on $time.strftime("%c") + **********************************************************************/ + +\#ifndef INCLUDED_AD9862_REGS_HPP +\#define INCLUDED_AD9862_REGS_HPP + +\#include + +struct ad9862_regs_t{ +#for $reg in $regs + #if $reg.get_enums() + enum $(reg.get_name())_t{ + #for $i, $enum in enumerate($reg.get_enums()) + #set $end_comma = ',' if $i < len($reg.get_enums())-1 else '' + $(reg.get_name().upper())_$(enum[0].upper()) = $enum[1]$end_comma + #end for + } $reg.get_name(); + #else + boost::$reg.get_stdint_type() $reg.get_name(); + #end if +#end for + + ad9862_regs_t(void){ +#for $reg in $regs + $reg.get_name() = $reg.get_default(); +#end for + } + + boost::uint8_t get_reg(boost::uint8_t addr){ + boost::uint8_t reg = 0; + switch(addr){ + #for $addr in range(0, 63+1) + case $addr: + #for $reg in filter(lambda r: r.get_addr() == addr, $regs) + reg |= (boost::uint16_t($reg.get_name()) & $reg.get_mask()) << $reg.get_shift(); + #end for + break; + #end for + } + return reg; + } + + void set_reg(boost::uint16_t reg_word){ + boost::uint8_t addr = (reg_word >> 8) & 0x1f; + boost::uint8_t reg = (reg_word >> 0) & 0xff; + switch(addr){ + #for $addr in range(0, 63+1) + case $addr: + #for $reg in filter(lambda r: r.get_addr() == addr, $regs) + #if $reg.get_enums() + $reg.get_name() = $(reg.get_name())_t((reg >> $reg.get_shift()) & $reg.get_mask()); + #else + $reg.get_name() = (reg >> $reg.get_shift()) & $reg.get_mask(); + #end if + #end for + break; + #end for + } + } + + boost::uint16_t get_write_reg(boost::uint8_t addr){ + return (boost::uint16_t(addr) << 8) | get_reg(addr); + } + + boost::uint16_t get_read_reg(boost::uint8_t addr){ + return (boost::uint16_t(addr) << 8) | (1 << 7); + } +}; + +\#endif /* INCLUDED_AD9862_REGS_HPP */ +""" + +if __name__ == '__main__': + regs = map(reg, parse_tmpl(REGS_DATA_TMPL).splitlines()) + open(sys.argv[1], 'w').write(parse_tmpl(HEADER_TEXT, regs=regs, file=__file__)) diff --git a/host/lib/ic_reg_maps/gen_max2829_regs.py b/host/lib/ic_reg_maps/gen_max2829_regs.py index 7fef302a8..6c6958707 100755 --- a/host/lib/ic_reg_maps/gen_max2829_regs.py +++ b/host/lib/ic_reg_maps/gen_max2829_regs.py @@ -41,7 +41,7 @@ mimo_select 2[13] 0 normal, mimo ######################################################################## ## Integer Divider Ratio (3) ######################################################################## -int_div_ratio_word 3[0:7] a2 +int_div_ratio_word 3[0:7] 0xa2 frac_div_ratio_lsb 3[12:13] 0 ######################################################################## ## Fractional Divider Ratio (4) @@ -95,17 +95,17 @@ tx_vga_gain_spi 9[10] 0 io, spi ######################################################################## ## PA Bias DAC (10) ######################################################################## -pa_bias_dac_out_curr a[0:5] 0 -pa_bias_dac_delay a[6:9] f +pa_bias_dac_out_curr 10[0:5] 0 +pa_bias_dac_delay 10[6:9] 0xf ######################################################################## ## Rx Gain (11) ######################################################################## -rx_vga_gain b[0:4] 1f -rx_lna_gain b[5:6] 3 +rx_vga_gain 11[0:4] 0x1f +rx_lna_gain 11[5:6] 3 ######################################################################## ## Tx VGA Gain (12) ######################################################################## -tx_vga_gain c[0:5] 0 +tx_vga_gain 12[0:5] 0 """ ######################################################################## diff --git a/host/lib/transport/gen_vrt.py b/host/lib/transport/gen_vrt.py index 38a394dee..9a57c83c3 100755 --- a/host/lib/transport/gen_vrt.py +++ b/host/lib/transport/gen_vrt.py @@ -200,15 +200,11 @@ void vrt::unpack( } """ -import os import sys from Cheetah.Template import Template def parse_tmpl(_tmpl_text, **kwargs): return str(Template(_tmpl_text, kwargs)) -def safe_makedirs(path): - not os.path.isdir(path) and os.makedirs(path) if __name__ == '__main__': - safe_makedirs(os.path.dirname(sys.argv[1])) open(sys.argv[1], 'w').write(parse_tmpl(TMPL_TEXT, file=__file__)) -- cgit v1.2.3 From 2bba9ca0831ecc40ac2e02ed66e615778a1bd17f Mon Sep 17 00:00:00 2001 From: Josh Blum Date: Thu, 29 Apr 2010 18:11:26 -0700 Subject: Moved a bunch of register map code into common. --- host/lib/ic_reg_maps/common.py | 55 ++++++++++++++- host/lib/ic_reg_maps/gen_ad5624_regs.py | 66 +++++------------- host/lib/ic_reg_maps/gen_ad7922_regs.py | 78 ++++++--------------- host/lib/ic_reg_maps/gen_ad9510_regs.py | 86 +++++++---------------- host/lib/ic_reg_maps/gen_ad9777_regs.py | 85 +++++++---------------- host/lib/ic_reg_maps/gen_ad9862_regs.py | 113 +++++++++++-------------------- host/lib/ic_reg_maps/gen_adf4360_regs.py | 83 +++++++---------------- host/lib/ic_reg_maps/gen_max2829_regs.py | 73 ++++++-------------- 8 files changed, 228 insertions(+), 411 deletions(-) (limited to 'host') diff --git a/host/lib/ic_reg_maps/common.py b/host/lib/ic_reg_maps/common.py index b33961b03..4aa1ef35e 100644 --- a/host/lib/ic_reg_maps/common.py +++ b/host/lib/ic_reg_maps/common.py @@ -16,9 +16,48 @@ # import re +import sys import math from Cheetah.Template import Template +COMMON_TMPL = """\ +#import time +/*********************************************************************** + * This file was generated by $file on $time.strftime("%c") + **********************************************************************/ + +\#ifndef INCLUDED_$(name.upper())_HPP +\#define INCLUDED_$(name.upper())_HPP + +\#include + +struct $(name)_t{ + + #for $reg in $regs + #if $reg.get_enums() + enum $reg.get_type(){ + #for $i, $enum in enumerate($reg.get_enums()) + #set $end_comma = ',' if $i < len($reg.get_enums())-1 else '' + $(reg.get_name().upper())_$(enum[0].upper()) = $enum[1]$end_comma + #end for + }; + #end if + $reg.get_type() $reg.get_name(); + #end for + + $(name)_t(void){ + #for $reg in $regs + $reg.get_name() = $reg.get_default(); + #end for + } + +$body + +}; + +\#endif /* INCLUDED_$(name.upper())_HPP */ +""" + def parse_tmpl(_tmpl_text, **kwargs): return str(Template(_tmpl_text, kwargs)) @@ -60,8 +99,20 @@ class reg: for key, val in self.get_enums(): if val == self._default: return str.upper('%s_%s'%(self.get_name(), key)) return self._default - def get_stdint_type(self):\ - return 'uint%d_t'%max(2**math.ceil(math.log(self.get_bit_width(), 2)), 8) + def get_type(self): + if self.get_enums(): return '%s_t'%self.get_name() + return 'boost::uint%d_t'%max(2**math.ceil(math.log(self.get_bit_width(), 2)), 8) def get_shift(self): return self._addr_spec[0] def get_mask(self): return hex(int('1'*self.get_bit_width(), 2)) def get_bit_width(self): return self._addr_spec[1] - self._addr_spec[0] + 1 + +def generate(name, regs_tmpl, body_tmpl='', file=__file__): + regs = map(reg, parse_tmpl(regs_tmpl).splitlines()) + body = parse_tmpl(body_tmpl, regs=regs).replace('\n', '\n ').strip() + code = parse_tmpl(COMMON_TMPL, + name=name, + regs=regs, + body=body, + file=file, + ) + open(sys.argv[1], 'w').write(code) diff --git a/host/lib/ic_reg_maps/gen_ad5624_regs.py b/host/lib/ic_reg_maps/gen_ad5624_regs.py index 9e8ae5be5..24401b878 100755 --- a/host/lib/ic_reg_maps/gen_ad5624_regs.py +++ b/host/lib/ic_reg_maps/gen_ad5624_regs.py @@ -16,67 +16,33 @@ # along with this program. If not, see . # -import sys -from common import * - ######################################################################## # Template for raw text data describing registers # name addr[bit range inclusive] default optional enums ######################################################################## -REGS_DATA_TMPL="""\ +REGS_TMPL="""\ data 0[4:15] 0 addr 0[16:18] 0 DAC_A=0, DAC_B=1, DAC_C=2, DAC_D=3, ALL=7 cmd 0[19:21] 0 wr_input_n, up_dac_n, wr_input_n_up_all, wr_up_dac_chan_n, power_down, reset, load_ldac """ ######################################################################## -# Header and Source templates below +# Template for methods in the body of the struct ######################################################################## -HEADER_TEXT=""" -#import time - -/*********************************************************************** - * This file was generated by $file on $time.strftime("%c") - **********************************************************************/ - -\#ifndef INCLUDED_AD5624_REGS_HPP -\#define INCLUDED_AD5624_REGS_HPP - -\#include - -struct ad5624_regs_t{ -#for $reg in $regs - #if $reg.get_enums() - enum $(reg.get_name())_t{ - #for $i, $enum in enumerate($reg.get_enums()) - #set $end_comma = ',' if $i < len($reg.get_enums())-1 else '' - $(reg.get_name().upper())_$(enum[0].upper()) = $enum[1]$end_comma - #end for - } $reg.get_name(); - #else - boost::$reg.get_stdint_type() $reg.get_name(); - #end if -#end for - - ad5624_regs_t(void){ -#for $reg in $regs - $reg.get_name() = $reg.get_default(); -#end for - } - - boost::uint32_t get_reg(void){ - boost::uint32_t reg = 0; - #for $reg in filter(lambda r: r.get_addr() == 0, $regs) - reg |= (boost::uint32_t($reg.get_name()) & $reg.get_mask()) << $reg.get_shift(); - #end for - return reg; - } - -}; - -\#endif /* INCLUDED_AD5624_REGS_HPP */ +BODY_TMPL="""\ +boost::uint32_t get_reg(void){ + boost::uint32_t reg = 0; + #for $reg in filter(lambda r: r.get_addr() == 0, $regs) + reg |= (boost::uint32_t($reg.get_name()) & $reg.get_mask()) << $reg.get_shift(); + #end for + return reg; +} """ if __name__ == '__main__': - regs = map(reg, parse_tmpl(REGS_DATA_TMPL).splitlines()) - open(sys.argv[1], 'w').write(parse_tmpl(HEADER_TEXT, regs=regs, file=__file__)) + import common; common.generate( + name='ad5624_regs', + regs_tmpl=REGS_TMPL, + body_tmpl=BODY_TMPL, + file=__file__, + ) diff --git a/host/lib/ic_reg_maps/gen_ad7922_regs.py b/host/lib/ic_reg_maps/gen_ad7922_regs.py index 23f28c0da..842d40430 100755 --- a/host/lib/ic_reg_maps/gen_ad7922_regs.py +++ b/host/lib/ic_reg_maps/gen_ad7922_regs.py @@ -16,73 +16,39 @@ # along with this program. If not, see . # -import sys -from common import * - ######################################################################## # Template for raw text data describing registers # name addr[bit range inclusive] default optional enums ######################################################################## -REGS_DATA_TMPL="""\ +REGS_TMPL="""\ result 0[0:11] 0 mod 0[12] 0 chn 0[13] 0 """ ######################################################################## -# Header and Source templates below +# Template for methods in the body of the struct ######################################################################## -HEADER_TEXT=""" -#import time - -/*********************************************************************** - * This file was generated by $file on $time.strftime("%c") - **********************************************************************/ - -\#ifndef INCLUDED_AD7922_REGS_HPP -\#define INCLUDED_AD7922_REGS_HPP - -\#include - -struct ad7922_regs_t{ -#for $reg in $regs - #if $reg.get_enums() - enum $(reg.get_name())_t{ - #for $i, $enum in enumerate($reg.get_enums()) - #set $end_comma = ',' if $i < len($reg.get_enums())-1 else '' - $(reg.get_name().upper())_$(enum[0].upper()) = $enum[1]$end_comma - #end for - } $reg.get_name(); - #else - boost::$reg.get_stdint_type() $reg.get_name(); - #end if -#end for - - ad7922_regs_t(void){ -#for $reg in $regs - $reg.get_name() = $reg.get_default(); -#end for - } - - boost::uint16_t get_reg(void){ - boost::uint16_t reg = 0; - #for $reg in filter(lambda r: r.get_addr() == 0, $regs) - reg |= (boost::uint32_t($reg.get_name()) & $reg.get_mask()) << $reg.get_shift(); - #end for - return reg; - } - - void set_reg(boost::uint16_t reg){ - #for $reg in filter(lambda r: r.get_addr() == 0, $regs) - $reg.get_name() = (reg >> $reg.get_shift()) & $reg.get_mask(); - #end for - } - -}; - -\#endif /* INCLUDED_AD7922_REGS_HPP */ +BODY_TMPL="""\ +boost::uint16_t get_reg(void){ + boost::uint16_t reg = 0; + #for $reg in filter(lambda r: r.get_addr() == 0, $regs) + reg |= (boost::uint32_t($reg.get_name()) & $reg.get_mask()) << $reg.get_shift(); + #end for + return reg; +} + +void set_reg(boost::uint16_t reg){ + #for $reg in filter(lambda r: r.get_addr() == 0, $regs) + $reg.get_name() = (reg >> $reg.get_shift()) & $reg.get_mask(); + #end for +} """ if __name__ == '__main__': - regs = map(reg, parse_tmpl(REGS_DATA_TMPL).splitlines()) - open(sys.argv[1], 'w').write(parse_tmpl(HEADER_TEXT, regs=regs, file=__file__)) + import common; common.generate( + name='ad7922_regs', + regs_tmpl=REGS_TMPL, + body_tmpl=BODY_TMPL, + file=__file__, + ) diff --git a/host/lib/ic_reg_maps/gen_ad9510_regs.py b/host/lib/ic_reg_maps/gen_ad9510_regs.py index 17cc141fc..903063df1 100755 --- a/host/lib/ic_reg_maps/gen_ad9510_regs.py +++ b/host/lib/ic_reg_maps/gen_ad9510_regs.py @@ -16,14 +16,11 @@ # along with this program. If not, see . # -import sys -from common import * - ######################################################################## # Template for raw text data describing registers # name addr[bit range inclusive] default optional enums ######################################################################## -REGS_DATA_TMPL="""\ +REGS_TMPL="""\ ######################################################################## ## serial control port config ######################################################################## @@ -107,67 +104,36 @@ update_registers 0x5A[0] 0 """ ######################################################################## -# Header and Source templates below +# Template for methods in the body of the struct ######################################################################## -HEADER_TEXT=""" -#import time - -/*********************************************************************** - * This file was generated by $file on $time.strftime("%c") - **********************************************************************/ - -\#ifndef INCLUDED_AD9510_REGS_HPP -\#define INCLUDED_AD9510_REGS_HPP - -\#include - -struct ad9510_regs_t{ -#for $reg in $regs - #if $reg.get_enums() - enum $(reg.get_name())_t{ - #for $i, $enum in enumerate($reg.get_enums()) - #set $end_comma = ',' if $i < len($reg.get_enums())-1 else '' - $(reg.get_name().upper())_$(enum[0].upper()) = $enum[1]$end_comma +BODY_TMPL="""\ +boost::uint8_t get_reg(boost::uint16_t addr){ + boost::uint8_t reg = 0; + switch(addr){ + #for $addr in sorted(set(map(lambda r: r.get_addr(), $regs))) + case $addr: + #for $reg in filter(lambda r: r.get_addr() == addr, $regs) + reg |= (boost::uint32_t($reg.get_name()) & $reg.get_mask()) << $reg.get_shift(); #end for - } $reg.get_name(); - #else - boost::$reg.get_stdint_type() $reg.get_name(); - #end if -#end for - - ad9510_regs_t(void){ -#for $reg in $regs - $reg.get_name() = $reg.get_default(); -#end for - } - - boost::uint8_t get_reg(boost::uint16_t addr){ - boost::uint8_t reg = 0; - switch(addr){ - #for $addr in sorted(set(map(lambda r: r.get_addr(), $regs))) - case $addr: - #for $reg in filter(lambda r: r.get_addr() == addr, $regs) - reg |= (boost::uint32_t($reg.get_name()) & $reg.get_mask()) << $reg.get_shift(); - #end for - break; - #end for - } - return reg; - } - - boost::uint32_t get_write_reg(boost::uint16_t addr){ - return (boost::uint32_t(addr) << 8) | get_reg(addr); - } - - boost::uint32_t get_read_reg(boost::uint16_t addr){ - return (boost::uint32_t(addr) << 8) | (1 << 15); + break; + #end for } + return reg; +} -}; +boost::uint32_t get_write_reg(boost::uint16_t addr){ + return (boost::uint32_t(addr) << 8) | get_reg(addr); +} -\#endif /* INCLUDED_AD9510_REGS_HPP */ +boost::uint32_t get_read_reg(boost::uint16_t addr){ + return (boost::uint32_t(addr) << 8) | (1 << 15); +} """ if __name__ == '__main__': - regs = map(reg, parse_tmpl(REGS_DATA_TMPL).splitlines()) - open(sys.argv[1], 'w').write(parse_tmpl(HEADER_TEXT, regs=regs, file=__file__)) + import common; common.generate( + name='ad9510_regs', + regs_tmpl=REGS_TMPL, + body_tmpl=BODY_TMPL, + file=__file__, + ) diff --git a/host/lib/ic_reg_maps/gen_ad9777_regs.py b/host/lib/ic_reg_maps/gen_ad9777_regs.py index 6ff212b4d..abb839f0f 100755 --- a/host/lib/ic_reg_maps/gen_ad9777_regs.py +++ b/host/lib/ic_reg_maps/gen_ad9777_regs.py @@ -16,14 +16,11 @@ # along with this program. If not, see . # -import sys -from common import * - ######################################################################## # Template for raw text data describing registers # name addr[bit range inclusive] default optional enums ######################################################################## -REGS_DATA_TMPL="""\ +REGS_TMPL="""\ ######################################################################## ## address 0 ######################################################################## @@ -86,66 +83,36 @@ qdac_ioffset_direction 0xC[7] 0 out_a, out_b """ ######################################################################## -# Header and Source templates below +# Template for methods in the body of the struct ######################################################################## -HEADER_TEXT=""" -#import time - -/*********************************************************************** - * This file was generated by $file on $time.strftime("%c") - **********************************************************************/ - -\#ifndef INCLUDED_AD9777_REGS_HPP -\#define INCLUDED_AD9777_REGS_HPP - -\#include - -struct ad9777_regs_t{ -#for $reg in $regs - #if $reg.get_enums() - enum $(reg.get_name())_t{ - #for $i, $enum in enumerate($reg.get_enums()) - #set $end_comma = ',' if $i < len($reg.get_enums())-1 else '' - $(reg.get_name().upper())_$(enum[0].upper()) = $enum[1]$end_comma - #end for - } $reg.get_name(); - #else - boost::$reg.get_stdint_type() $reg.get_name(); - #end if -#end for - - ad9777_regs_t(void){ -#for $reg in $regs - $reg.get_name() = $reg.get_default(); -#end for - } - - boost::uint8_t get_reg(boost::uint8_t addr){ - boost::uint8_t reg = 0; - switch(addr){ - #for $addr in sorted(set(map(lambda r: r.get_addr(), $regs))) - case $addr: - #for $reg in filter(lambda r: r.get_addr() == addr, $regs) - reg |= (boost::uint8_t($reg.get_name()) & $reg.get_mask()) << $reg.get_shift(); - #end for - break; +BODY_TMPL="""\ +boost::uint8_t get_reg(boost::uint8_t addr){ + boost::uint8_t reg = 0; + switch(addr){ + #for $addr in sorted(set(map(lambda r: r.get_addr(), $regs))) + case $addr: + #for $reg in filter(lambda r: r.get_addr() == addr, $regs) + reg |= (boost::uint8_t($reg.get_name()) & $reg.get_mask()) << $reg.get_shift(); #end for - } - return reg; + break; + #end for } + return reg; +} - boost::uint16_t get_write_reg(boost::uint8_t addr){ - return (boost::uint16_t(addr) << 8) | get_reg(addr); - } - - boost::uint16_t get_read_reg(boost::uint8_t addr){ - return (boost::uint16_t(addr) << 8) | (1 << 7); - } -}; +boost::uint16_t get_write_reg(boost::uint8_t addr){ + return (boost::uint16_t(addr) << 8) | get_reg(addr); +} -\#endif /* INCLUDED_AD9777_REGS_HPP */ +boost::uint16_t get_read_reg(boost::uint8_t addr){ + return (boost::uint16_t(addr) << 8) | (1 << 7); +} """ if __name__ == '__main__': - regs = map(reg, parse_tmpl(REGS_DATA_TMPL).splitlines()) - open(sys.argv[1], 'w').write(parse_tmpl(HEADER_TEXT, regs=regs, file=__file__)) + import common; common.generate( + name='ad9777_regs', + regs_tmpl=REGS_TMPL, + body_tmpl=BODY_TMPL, + file=__file__, + ) diff --git a/host/lib/ic_reg_maps/gen_ad9862_regs.py b/host/lib/ic_reg_maps/gen_ad9862_regs.py index 0d03c7bb6..c912403ef 100755 --- a/host/lib/ic_reg_maps/gen_ad9862_regs.py +++ b/host/lib/ic_reg_maps/gen_ad9862_regs.py @@ -16,14 +16,11 @@ # along with this program. If not, see . # -import sys -from common import * - ######################################################################## # Template for raw text data describing registers # name addr[bit range inclusive] default optional enums ######################################################################## -REGS_DATA_TMPL="""\ +REGS_TMPL="""\ ######################################################################## ## General ######################################################################## @@ -204,82 +201,52 @@ chip_id 63[0:7] 0 ######################################################################## # Header and Source templates below ######################################################################## -HEADER_TEXT=""" -#import time - -/*********************************************************************** - * This file was generated by $file on $time.strftime("%c") - **********************************************************************/ - -\#ifndef INCLUDED_AD9862_REGS_HPP -\#define INCLUDED_AD9862_REGS_HPP - -\#include - -struct ad9862_regs_t{ -#for $reg in $regs - #if $reg.get_enums() - enum $(reg.get_name())_t{ - #for $i, $enum in enumerate($reg.get_enums()) - #set $end_comma = ',' if $i < len($reg.get_enums())-1 else '' - $(reg.get_name().upper())_$(enum[0].upper()) = $enum[1]$end_comma - #end for - } $reg.get_name(); - #else - boost::$reg.get_stdint_type() $reg.get_name(); - #end if -#end for - - ad9862_regs_t(void){ -#for $reg in $regs - $reg.get_name() = $reg.get_default(); -#end for - } - - boost::uint8_t get_reg(boost::uint8_t addr){ - boost::uint8_t reg = 0; - switch(addr){ - #for $addr in range(0, 63+1) - case $addr: - #for $reg in filter(lambda r: r.get_addr() == addr, $regs) - reg |= (boost::uint16_t($reg.get_name()) & $reg.get_mask()) << $reg.get_shift(); - #end for - break; +BODY_TMPL=""" +boost::uint8_t get_reg(boost::uint8_t addr){ + boost::uint8_t reg = 0; + switch(addr){ + #for $addr in range(0, 63+1) + case $addr: + #for $reg in filter(lambda r: r.get_addr() == addr, $regs) + reg |= (boost::uint16_t($reg.get_name()) & $reg.get_mask()) << $reg.get_shift(); #end for - } - return reg; + break; + #end for } + return reg; +} - void set_reg(boost::uint16_t reg_word){ - boost::uint8_t addr = (reg_word >> 8) & 0x1f; - boost::uint8_t reg = (reg_word >> 0) & 0xff; - switch(addr){ - #for $addr in range(0, 63+1) - case $addr: - #for $reg in filter(lambda r: r.get_addr() == addr, $regs) - #if $reg.get_enums() - $reg.get_name() = $(reg.get_name())_t((reg >> $reg.get_shift()) & $reg.get_mask()); - #else - $reg.get_name() = (reg >> $reg.get_shift()) & $reg.get_mask(); - #end if - #end for - break; +void set_reg(boost::uint16_t reg_word){ + boost::uint8_t addr = (reg_word >> 8) & 0x1f; + boost::uint8_t reg = (reg_word >> 0) & 0xff; + switch(addr){ + #for $addr in range(0, 63+1) + case $addr: + #for $reg in filter(lambda r: r.get_addr() == addr, $regs) + #if $reg.get_enums() + $reg.get_name() = $(reg.get_type())((reg >> $reg.get_shift()) & $reg.get_mask()); + #else + $reg.get_name() = (reg >> $reg.get_shift()) & $reg.get_mask(); + #end if #end for - } + break; + #end for } +} - boost::uint16_t get_write_reg(boost::uint8_t addr){ - return (boost::uint16_t(addr) << 8) | get_reg(addr); - } - - boost::uint16_t get_read_reg(boost::uint8_t addr){ - return (boost::uint16_t(addr) << 8) | (1 << 7); - } -}; +boost::uint16_t get_write_reg(boost::uint8_t addr){ + return (boost::uint16_t(addr) << 8) | get_reg(addr); +} -\#endif /* INCLUDED_AD9862_REGS_HPP */ +boost::uint16_t get_read_reg(boost::uint8_t addr){ + return (boost::uint16_t(addr) << 8) | (1 << 7); +} """ if __name__ == '__main__': - regs = map(reg, parse_tmpl(REGS_DATA_TMPL).splitlines()) - open(sys.argv[1], 'w').write(parse_tmpl(HEADER_TEXT, regs=regs, file=__file__)) + import common; common.generate( + name='ad9862_regs', + regs_tmpl=REGS_TMPL, + body_tmpl=BODY_TMPL, + file=__file__, + ) diff --git a/host/lib/ic_reg_maps/gen_adf4360_regs.py b/host/lib/ic_reg_maps/gen_adf4360_regs.py index 478e471a3..2a88dad8a 100755 --- a/host/lib/ic_reg_maps/gen_adf4360_regs.py +++ b/host/lib/ic_reg_maps/gen_adf4360_regs.py @@ -16,14 +16,11 @@ # along with this program. If not, see . # -import sys -from common import * - ######################################################################## # Template for raw text data describing registers # name addr[bit range inclusive] default optional enums ######################################################################## -REGS_DATA_TMPL="""\ +REGS_TMPL="""\ ######################################################################## ## address 0 ######################################################################## @@ -59,64 +56,34 @@ band_select_clock_div 1[20:21] 0 1, 2, 4, 8 """ ######################################################################## -# Header and Source templates below +# Template for methods in the body of the struct ######################################################################## -HEADER_TEXT=""" -#import time - -/*********************************************************************** - * This file was generated by $file on $time.strftime("%c") - **********************************************************************/ - -\#ifndef INCLUDED_ADF4360_REGS_HPP -\#define INCLUDED_ADF4360_REGS_HPP - -\#include - -struct adf4360_regs_t{ -#for $reg in $regs - #if $reg.get_enums() - enum $(reg.get_name())_t{ - #for $i, $enum in enumerate($reg.get_enums()) - #set $end_comma = ',' if $i < len($reg.get_enums())-1 else '' - $(reg.get_name().upper())_$(enum[0].upper()) = $enum[1]$end_comma - #end for - } $reg.get_name(); - #else - boost::$reg.get_stdint_type() $reg.get_name(); - #end if -#end for - - adf4360_regs_t(void){ -#for $reg in $regs - $reg.get_name() = $reg.get_default(); -#end for - } - - enum addr_t{ - ADDR_CONTROL = 0, - ADDR_NCOUNTER = 2, - ADDR_RCOUNTER = 1 - }; +BODY_TMPL="""\ +enum addr_t{ + ADDR_CONTROL = 0, + ADDR_NCOUNTER = 2, + ADDR_RCOUNTER = 1 +}; - boost::uint32_t get_reg(addr_t addr){ - boost::uint32_t reg = addr & 0x3; - switch(addr){ - #for $addr in (0, 1, 2) - case $addr: - #for $reg in filter(lambda r: r.get_addr() == addr, $regs) - reg |= (boost::uint32_t($reg.get_name()) & $reg.get_mask()) << $reg.get_shift(); - #end for - break; +boost::uint32_t get_reg(addr_t addr){ + boost::uint32_t reg = addr & 0x3; + switch(addr){ + #for $addr in (0, 1, 2) + case $addr: + #for $reg in filter(lambda r: r.get_addr() == addr, $regs) + reg |= (boost::uint32_t($reg.get_name()) & $reg.get_mask()) << $reg.get_shift(); #end for - } - return reg; + break; + #end for } -}; - -\#endif /* INCLUDED_ADF4360_REGS_HPP */ + return reg; +} """ if __name__ == '__main__': - regs = map(reg, parse_tmpl(REGS_DATA_TMPL).splitlines()) - open(sys.argv[1], 'w').write(parse_tmpl(HEADER_TEXT, regs=regs, file=__file__)) + import common; common.generate( + name='adf4360_regs', + regs_tmpl=REGS_TMPL, + body_tmpl=BODY_TMPL, + file=__file__, + ) diff --git a/host/lib/ic_reg_maps/gen_max2829_regs.py b/host/lib/ic_reg_maps/gen_max2829_regs.py index 6c6958707..7f9f08daa 100755 --- a/host/lib/ic_reg_maps/gen_max2829_regs.py +++ b/host/lib/ic_reg_maps/gen_max2829_regs.py @@ -16,14 +16,11 @@ # along with this program. If not, see . # -import sys -from common import * - ######################################################################## # Template for raw text data describing registers # name addr[bit range inclusive] default optional enums ######################################################################## -REGS_DATA_TMPL="""\ +REGS_TMPL="""\ ######################################################################## ## Note: offsets given from perspective of data bits (excludes address) ######################################################################## @@ -109,58 +106,28 @@ tx_vga_gain 12[0:5] 0 """ ######################################################################## -# Header and Source templates below +# Template for methods in the body of the struct ######################################################################## -HEADER_TEXT=""" -#import time - -/*********************************************************************** - * This file was generated by $file on $time.strftime("%c") - **********************************************************************/ - -\#ifndef INCLUDED_MAX2829_REGS_HPP -\#define INCLUDED_MAX2829_REGS_HPP - -\#include - -struct max2829_regs_t{ -#for $reg in $regs - #if $reg.get_enums() - enum $(reg.get_name())_t{ - #for $i, $enum in enumerate($reg.get_enums()) - #set $end_comma = ',' if $i < len($reg.get_enums())-1 else '' - $(reg.get_name().upper())_$(enum[0].upper()) = $enum[1]$end_comma +BODY_TMPL="""\ +boost::uint32_t get_reg(boost::uint8_t addr){ + boost::uint16_t reg = 0; + switch(addr){ + #for $addr in range(2, 12+1) + case $addr: + #for $reg in filter(lambda r: r.get_addr() == addr, $regs) + reg |= (boost::uint16_t($reg.get_name()) & $reg.get_mask()) << $reg.get_shift(); #end for - } $reg.get_name(); - #else - boost::$reg.get_stdint_type() $reg.get_name(); - #end if -#end for - - max2829_regs_t(void){ -#for $reg in $regs - $reg.get_name() = $reg.get_default(); -#end for + break; + #end for } - - boost::uint32_t get_reg(boost::uint8_t addr){ - boost::uint16_t reg = 0; - switch(addr){ - #for $addr in range(2, 12+1) - case $addr: - #for $reg in filter(lambda r: r.get_addr() == addr, $regs) - reg |= (boost::uint16_t($reg.get_name()) & $reg.get_mask()) << $reg.get_shift(); - #end for - break; - #end for - } - return (boost::uint32_t(reg) << 4) | (addr & 0xf); - } -}; - -\#endif /* INCLUDED_MAX2829_REGS_HPP */ + return (boost::uint32_t(reg) << 4) | (addr & 0xf); +} """ if __name__ == '__main__': - regs = map(reg, parse_tmpl(REGS_DATA_TMPL).splitlines()) - open(sys.argv[1], 'w').write(parse_tmpl(HEADER_TEXT, regs=regs, file=__file__)) + import common; common.generate( + name='max2829_regs', + regs_tmpl=REGS_TMPL, + body_tmpl=BODY_TMPL, + file=__file__, + ) -- cgit v1.2.3 From 333937760305f9c7c8dfb1db95f4821a800ce043 Mon Sep 17 00:00:00 2001 From: Josh Blum Date: Thu, 29 Apr 2010 18:39:52 -0700 Subject: added ad9522 reg map, minor fixes --- host/lib/CMakeLists.txt | 5 + host/lib/ic_reg_maps/gen_ad7922_regs.py | 2 +- host/lib/ic_reg_maps/gen_ad9510_regs.py | 2 +- host/lib/ic_reg_maps/gen_ad9522_regs.py | 177 +++++++++++++++++++++++++++++++ host/lib/ic_reg_maps/gen_ad9862_regs.py | 10 +- host/lib/ic_reg_maps/gen_adf4360_regs.py | 2 +- host/lib/ic_reg_maps/gen_max2829_regs.py | 2 +- 7 files changed, 188 insertions(+), 12 deletions(-) create mode 100755 host/lib/ic_reg_maps/gen_ad9522_regs.py (limited to 'host') diff --git a/host/lib/CMakeLists.txt b/host/lib/CMakeLists.txt index a4e492b49..d11ecf13b 100644 --- a/host/lib/CMakeLists.txt +++ b/host/lib/CMakeLists.txt @@ -123,6 +123,11 @@ UHD_PYTHON_GEN_SOURCE_FILE( ${CMAKE_CURRENT_BINARY_DIR}/ic_reg_maps/ad9862_regs.hpp ) +UHD_PYTHON_GEN_SOURCE_FILE( + ${CMAKE_CURRENT_SOURCE_DIR}/ic_reg_maps/gen_ad9522_regs.py + ${CMAKE_CURRENT_BINARY_DIR}/ic_reg_maps/ad9522_regs.hpp +) + ######################################################################## # Add dboard sources ######################################################################## diff --git a/host/lib/ic_reg_maps/gen_ad7922_regs.py b/host/lib/ic_reg_maps/gen_ad7922_regs.py index 842d40430..5cec1924a 100755 --- a/host/lib/ic_reg_maps/gen_ad7922_regs.py +++ b/host/lib/ic_reg_maps/gen_ad7922_regs.py @@ -40,7 +40,7 @@ boost::uint16_t get_reg(void){ void set_reg(boost::uint16_t reg){ #for $reg in filter(lambda r: r.get_addr() == 0, $regs) - $reg.get_name() = (reg >> $reg.get_shift()) & $reg.get_mask(); + $reg.get_name() = $(reg.get_type())((reg >> $reg.get_shift()) & $reg.get_mask()); #end for } """ diff --git a/host/lib/ic_reg_maps/gen_ad9510_regs.py b/host/lib/ic_reg_maps/gen_ad9510_regs.py index 903063df1..83236c921 100755 --- a/host/lib/ic_reg_maps/gen_ad9510_regs.py +++ b/host/lib/ic_reg_maps/gen_ad9510_regs.py @@ -126,7 +126,7 @@ boost::uint32_t get_write_reg(boost::uint16_t addr){ } boost::uint32_t get_read_reg(boost::uint16_t addr){ - return (boost::uint32_t(addr) << 8) | (1 << 15); + return (boost::uint32_t(addr) << 8) | (1 << 23); } """ diff --git a/host/lib/ic_reg_maps/gen_ad9522_regs.py b/host/lib/ic_reg_maps/gen_ad9522_regs.py new file mode 100755 index 000000000..85c3e9f2b --- /dev/null +++ b/host/lib/ic_reg_maps/gen_ad9522_regs.py @@ -0,0 +1,177 @@ +#!/usr/bin/env python +# +# Copyright 2010 Ettus Research LLC +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . +# + +######################################################################## +# Template for raw text data describing registers +# name addr[bit range inclusive] default optional enums +######################################################################## +REGS_TMPL="""\ +sdo_active 0x000[7] 0 +lsb_first_addr_incr 0x000[6] 0 +soft_reset 0x000[5] 0 +mirror 0x000[3:0] 0 +readback_active_registers 0x004[0] 0 +pfd_polarity 0x010[7] 0 +cp_current 0x010[6:4] 7 +cp_mode 0x010[3:2] 3 +pll_power_down 0x010[1:0] 1 +r_counter_lsb 0x011[7:0] 1 +r_counter_msb 0x012[5:0] 0 +a_counter 0x013[5:0] 0 +b_counter_lsb 0x014[7:0] 3 +b_counter_msb 0x015[4:0] 0 +set_cp_pin_to_vcp_2 0x016[7] 0 +reset_r_counter 0x016[6] 0 +reset_a_and_b_counters 0x016[5] 0 +reset_all_counters 0x016[4] 0 +b_counter_bypass 0x016[3] 0 +prescaler_p 0x016[2:0] 6 +status_pin_control 0x017[7:2] 0 +antibacklash_pulse_width 0x017[1:0] 0 +enb_cmos_ref_input_dc_off 0x018[7] 0 +lock_detect_counter 0x018[6:5] 0 +digital_lock_detect_window 0x018[4] 0 +disable_digital_lock_detect 0x018[3] 0 +vco_calibration_divider 0x018[2:1] 3 +vco_calibration_now 0x018[0] 0 +r_a_b_counters_sync_pin_rst 0x019[7:6] 0 +r_path_delay 0x019[5:3] 0 +n_path_delay 0x019[2:0] 0 +enable_status_pin_divider 0x01A[7] 0 +ref_freq_monitor_threshold 0x01A[6] 0 +ld_pin_control 0x01A[5:0] 0 +enable_vco_freq_monitor 0x01B[7] 0 +enable_ref2_freq_monitor 0x01B[6] 0 +enable_ref1_freq_monitor 0x01B[5] 0 +refmon_pin_control 0x01B[4:0] 0 +disable_switchover_deglitch 0x01C[7] 0 +select_ref2 0x01C[6] 0 +use_ref_sel_pin 0x01C[5] 0 +enb_auto_ref_switchover 0x01C[4] 0 +stay_on_ref2 0x01C[3] 0 +enable_ref2 0x01C[2] 0 +enable_ref1 0x01C[1] 0 +enable_differential_ref 0x01C[0] 0 +enb_stat_eeprom_at_stat_pin 0x01D[7] 1 +enable_xtal_osc 0x01D[6] 0 +enable_clock_doubler 0x01D[5] 0 +disable_pll_status_reg 0x01D[4] 0 +enable_ld_pin_comparator 0x01D[3] 0 +enable_external_holdover 0x01D[1] 0 +enable_holdover 0x01D[0] 0 +external_zero_delay_fcds 0x01E[4:3] 0 +enable_external_zero_delay 0x01E[2] 0 +enable_zero_delay 0x01E[1] 0 +######################################################################## +#for $i in range(12) +#set $addr = ($i + 0x0F0) +out$(i)_format $(addr)[7] 0 +out$(i)_cmos_configuration $(addr)[6:5] 3 +out$(i)_polarity $(addr)[4:3] 0 +out$(i)_lvds_diff_voltage $(addr)[2:1] 1 +out$(i)_lvds_power_down $(addr)[0] 0 +#end for +######################################################################## +#for $i in reversed(range(8)) +csdld_en_out_$i 0x0FC[$i] 0 +#end for +######################################################################## +#for $i in reversed(range(4)) +csdld_en_out_$(8 + $i) 0x0FD[$i] 0 +#end for +######################################################################## +#set $default_val = 0x7 +#for $i in range(4) +#set $addr0 = hex($i*3 + 0x190) +#set $addr1 = hex($i*3 + 0x191) +#set $addr2 = hex($i*3 + 0x192) +divider$(i)_low_cycles $(addr0)[7:4] $default_val +divider$(i)_high_cycles $(addr0)[3:0] $default_val +divider$(i)_bypass $(addr1)[7] 0 +divider$(i)_ignore_sync $(addr1)[6] 0 +divider$(i)_force_high $(addr1)[5] 0 +divider$(i)_start_high $(addr1)[4] 0 +divider$(i)_phase_offset $(addr1)[3:0] 0 +channel$(i)_power_down $(addr2)[2] 0 +disable_divider$(i)_ddc $(addr2)[0] 0 +#set $default_val /= 2 +#end for +######################################################################## +vco_divider 0x1E0[2:0] 2 +power_down_clock_input_sel 0x1E1[4] 0 +power_down_vco_clock_ifc 0x1E1[3] 0 +power_down_vco_and_clock 0x1E1[2] 0 +select_vco_or_clock 0x1E1[1] 0 +bypass_vco_divider 0x1E1[0] 0 +disable_power_on_sync 0x230[3] 0 +power_down_sync 0x230[2] 0 +power_down_dist_ref 0x230[1] 0 +soft_sync 0x230[0] 0 +io_update 0x232[0] 0 +soft_eeprom 0xB02[1] 0 +enable_eeprom_write 0xB02[0] 0 +reg2eeprom 0xB03[0] 0 +""" + +######################################################################## +# Template for methods in the body of the struct +######################################################################## +BODY_TMPL="""\ +boost::uint8_t get_reg(boost::uint16_t addr){ + boost::uint8_t reg = 0; + switch(addr){ + #for $addr in sorted(set(map(lambda r: r.get_addr(), $regs))) + case $addr: + #for $reg in filter(lambda r: r.get_addr() == addr, $regs) + reg |= (boost::uint8_t($reg.get_name()) & $reg.get_mask()) << $reg.get_shift(); + #end for + break; + #end for + } + return reg; +} + +void set_reg(boost::uint8_t addr, boost::uint32_t reg){ + switch(addr){ + #for $addr in sorted(set(map(lambda r: r.get_addr(), $regs))) + case $addr: + #for $reg in filter(lambda r: r.get_addr() == addr, $regs) + $reg.get_name() = $(reg.get_type())((reg >> $reg.get_shift()) & $reg.get_mask()); + #end for + break; + #end for + } +} + +boost::uint32_t get_write_reg(boost::uint16_t addr){ + return (boost::uint32_t(addr) << 8) | get_reg(addr); +} + +boost::uint32_t get_read_reg(boost::uint16_t addr){ + return (boost::uint32_t(addr) << 8) | (1 << 23); +} + +""" + +if __name__ == '__main__': + import common; common.generate( + name='ad9522_regs', + regs_tmpl=REGS_TMPL, + body_tmpl=BODY_TMPL, + file=__file__, + ) diff --git a/host/lib/ic_reg_maps/gen_ad9862_regs.py b/host/lib/ic_reg_maps/gen_ad9862_regs.py index c912403ef..fdbea5828 100755 --- a/host/lib/ic_reg_maps/gen_ad9862_regs.py +++ b/host/lib/ic_reg_maps/gen_ad9862_regs.py @@ -216,18 +216,12 @@ boost::uint8_t get_reg(boost::uint8_t addr){ return reg; } -void set_reg(boost::uint16_t reg_word){ - boost::uint8_t addr = (reg_word >> 8) & 0x1f; - boost::uint8_t reg = (reg_word >> 0) & 0xff; +void set_reg(boost::uint8_t addr, boost::uint16_t reg){ switch(addr){ - #for $addr in range(0, 63+1) + #for $addr in sorted(set(map(lambda r: r.get_addr(), $regs))) case $addr: #for $reg in filter(lambda r: r.get_addr() == addr, $regs) - #if $reg.get_enums() $reg.get_name() = $(reg.get_type())((reg >> $reg.get_shift()) & $reg.get_mask()); - #else - $reg.get_name() = (reg >> $reg.get_shift()) & $reg.get_mask(); - #end if #end for break; #end for diff --git a/host/lib/ic_reg_maps/gen_adf4360_regs.py b/host/lib/ic_reg_maps/gen_adf4360_regs.py index 2a88dad8a..3fd8707a7 100755 --- a/host/lib/ic_reg_maps/gen_adf4360_regs.py +++ b/host/lib/ic_reg_maps/gen_adf4360_regs.py @@ -68,7 +68,7 @@ enum addr_t{ boost::uint32_t get_reg(addr_t addr){ boost::uint32_t reg = addr & 0x3; switch(addr){ - #for $addr in (0, 1, 2) + #for $addr in sorted(set(map(lambda r: r.get_addr(), $regs))) case $addr: #for $reg in filter(lambda r: r.get_addr() == addr, $regs) reg |= (boost::uint32_t($reg.get_name()) & $reg.get_mask()) << $reg.get_shift(); diff --git a/host/lib/ic_reg_maps/gen_max2829_regs.py b/host/lib/ic_reg_maps/gen_max2829_regs.py index 7f9f08daa..383131c18 100755 --- a/host/lib/ic_reg_maps/gen_max2829_regs.py +++ b/host/lib/ic_reg_maps/gen_max2829_regs.py @@ -112,7 +112,7 @@ BODY_TMPL="""\ boost::uint32_t get_reg(boost::uint8_t addr){ boost::uint16_t reg = 0; switch(addr){ - #for $addr in range(2, 12+1) + #for $addr in sorted(set(map(lambda r: r.get_addr(), $regs))) case $addr: #for $reg in filter(lambda r: r.get_addr() == addr, $regs) reg |= (boost::uint16_t($reg.get_name()) & $reg.get_mask()) << $reg.get_shift(); -- cgit v1.2.3