From 2cb6092ddfcf5f3881faa455566d4f332b01d0ac Mon Sep 17 00:00:00 2001 From: Josh Blum Date: Mon, 31 Jan 2011 20:26:45 +0000 Subject: usrp-e100: combined clkconfig and fpga downloader into usrp-e-utility, simplified code --- host/usrp_e_utils/usrp-e-utility.cpp | 72 ++++++++++++++++++++++++++++++++++++ 1 file changed, 72 insertions(+) create mode 100644 host/usrp_e_utils/usrp-e-utility.cpp (limited to 'host/usrp_e_utils/usrp-e-utility.cpp') diff --git a/host/usrp_e_utils/usrp-e-utility.cpp b/host/usrp_e_utils/usrp-e-utility.cpp new file mode 100644 index 000000000..139aabc30 --- /dev/null +++ b/host/usrp_e_utils/usrp-e-utility.cpp @@ -0,0 +1,72 @@ +// +// Copyright 2011 Ettus Research LLC +// +// This program is free software: you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation, either version 3 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see . +// + +#include +#include +#include +#include + +#include "fpga_downloader.cpp" +#include "clkgen_config.hpp" + +namespace po = boost::program_options; + +static const std::string default_passthrough_path = "/usr/share/uhd/images/usrp_e1xx_passthrough.bin"; + +int UHD_SAFE_MAIN(int argc, char *argv[]){ + + //variables to be set by po + std::string fpga_path; + + //setup the program options + po::options_description desc("Allowed options"); + desc.add_options() + ("help", "help message") + ("fpga", po::value(&fpga_path)->default_value(""), "loads the specified FPGA file") + ("reclk", "runs the clock recovery") + ; + po::variables_map vm; + po::store(po::parse_command_line(argc, argv, desc), vm); + po::notify(vm); + + //print the help message + if (vm.count("help")){ + std::cout << boost::format("UHD USRP-E Utility %s") % desc << std::endl; + return ~0; + } + + bool loaded_fpga_image = false; + if (vm.count("fpga")){ + std::cout << "USRP-E Utility loading the FPGA..." << std::endl << std::endl; + usrp_e100_load_fpga(fpga_path); + loaded_fpga_image = true; + sleep(1); + } + + if (vm.count("reclk")){ + std::cout << "USRP-E Utility running the clock recovery..." << std::endl << std::endl; + //if an image was not loaded or specified, we load pass-through + if (fpga_path.empty()) fpga_path = default_passthrough_path; + if (not loaded_fpga_image) usrp_e100_load_fpga(fpga_path); + clock_genconfig_main(); + std::system("rm /tmp/usrp*hash"); //clear hash so driver must reload + } + + std::cout << "Done!" << std::endl; + + return 0; +} -- cgit v1.2.3 From 5b4d90582d827d7ba2483d7916b2f0400a5bd9fa Mon Sep 17 00:00:00 2001 From: Josh Blum Date: Thu, 3 Feb 2011 11:20:37 -0800 Subject: usrp-e100: added passthrough to images makefile, tweaks to usrp-e-utility --- host/lib/usrp/usrp_e100/fpga_downloader.cpp | 2 +- host/usrp_e_utils/usrp-e-utility.cpp | 21 ++++++++++++--------- images/Makefile | 16 ++++++++++++++++ 3 files changed, 29 insertions(+), 10 deletions(-) (limited to 'host/usrp_e_utils/usrp-e-utility.cpp') diff --git a/host/lib/usrp/usrp_e100/fpga_downloader.cpp b/host/lib/usrp/usrp_e100/fpga_downloader.cpp index 926e6fcaf..c0013fcbd 100644 --- a/host/lib/usrp/usrp_e100/fpga_downloader.cpp +++ b/host/lib/usrp/usrp_e100/fpga_downloader.cpp @@ -1,5 +1,5 @@ // -// Copyright 2010 Ettus Research LLC +// Copyright 2010-2011 Ettus Research LLC // // This program is free software: you can redistribute it and/or modify // it under the terms of the GNU General Public License as published by diff --git a/host/usrp_e_utils/usrp-e-utility.cpp b/host/usrp_e_utils/usrp-e-utility.cpp index 139aabc30..4b4fc0178 100644 --- a/host/usrp_e_utils/usrp-e-utility.cpp +++ b/host/usrp_e_utils/usrp-e-utility.cpp @@ -18,6 +18,7 @@ #include #include #include +#include #include #include "fpga_downloader.cpp" @@ -25,8 +26,6 @@ namespace po = boost::program_options; -static const std::string default_passthrough_path = "/usr/share/uhd/images/usrp_e1xx_passthrough.bin"; - int UHD_SAFE_MAIN(int argc, char *argv[]){ //variables to be set by po @@ -36,8 +35,8 @@ int UHD_SAFE_MAIN(int argc, char *argv[]){ po::options_description desc("Allowed options"); desc.add_options() ("help", "help message") - ("fpga", po::value(&fpga_path)->default_value(""), "loads the specified FPGA file") - ("reclk", "runs the clock recovery") + ("fpga", po::value(&fpga_path), "loads the specified FPGA file") + ("reclk", "runs the clock recovery") ; po::variables_map vm; po::store(po::parse_command_line(argc, argv, desc), vm); @@ -50,20 +49,24 @@ int UHD_SAFE_MAIN(int argc, char *argv[]){ } bool loaded_fpga_image = false; - if (vm.count("fpga")){ + if (vm.count("fpga") != 0){ std::cout << "USRP-E Utility loading the FPGA..." << std::endl << std::endl; usrp_e100_load_fpga(fpga_path); loaded_fpga_image = true; sleep(1); } - if (vm.count("reclk")){ + if (vm.count("reclk") != 0){ std::cout << "USRP-E Utility running the clock recovery..." << std::endl << std::endl; //if an image was not loaded or specified, we load pass-through - if (fpga_path.empty()) fpga_path = default_passthrough_path; - if (not loaded_fpga_image) usrp_e100_load_fpga(fpga_path); + if (fpga_path.empty()) throw std::runtime_error( + "Please specify the path to the pass-though FPGA image for your device.\n" + " usrp-e-utility --reclk --fpga=/usr/share/uhd/images/usrp_e1xx_pt_fpga.bin" + ); clock_genconfig_main(); - std::system("rm /tmp/usrp*hash"); //clear hash so driver must reload + if (std::system("rm /tmp/usrp*hash") != 0){ //clear hash so driver must reload + std::cerr << "No hash to remove! Don't worry, its not a problem." << std::endl; + } } std::cout << "Done!" << std::endl; diff --git a/images/Makefile b/images/Makefile index 34c18cdc2..cfc783ee4 100644 --- a/images/Makefile +++ b/images/Makefile @@ -151,6 +151,22 @@ $(_usrp_e100_fpga_bin): $(GLOBAL_DEPS) endif +######################################################################## +# USRP-E100 pass-through fpga +######################################################################## +ifdef HAS_XTCLSH + +_usrp_e100_pt_fpga_dir = $(TOP_FPGA_DIR)/usrp2/top/u1e_passthru +_usrp_e100_pt_fpga_bin = $(BUILT_IMAGES_DIR)/usrp_e100_pt_fpga.bin +IMAGES_LIST += $(_usrp_e100_pt_fpga_bin) + +$(_usrp_e100_pt_fpga_bin): $(GLOBAL_DEPS) + cd $(_usrp_e100_pt_fpga_dir) && make clean + cd $(_usrp_e100_pt_fpga_dir) && make bin + cp $(_usrp_e100_pt_fpga_dir)/build/passthru.bin $@ + +endif + ######################################################################## # Build rules ######################################################################## -- cgit v1.2.3 From c8eed953d74186049ba94432334771724d1a8070 Mon Sep 17 00:00:00 2001 From: Josh Blum Date: Thu, 27 Jan 2011 00:40:18 +0000 Subject: usrp-e100: reverted clockgen config + tweaks, its working --- host/usrp_e_utils/clkgen_config.hpp | 213 +++++++++++++++++------------------ host/usrp_e_utils/usrp-e-utility.cpp | 2 +- 2 files changed, 105 insertions(+), 110 deletions(-) (limited to 'host/usrp_e_utils/usrp-e-utility.cpp') diff --git a/host/usrp_e_utils/clkgen_config.hpp b/host/usrp_e_utils/clkgen_config.hpp index 0c9dc8de2..f39f8bb19 100644 --- a/host/usrp_e_utils/clkgen_config.hpp +++ b/host/usrp_e_utils/clkgen_config.hpp @@ -28,14 +28,98 @@ #include #include #include -#include "ad9522_regs.hpp" #include namespace usrp_e_clkgen_config_utility{ +// Programming data for clock gen chip +static const unsigned int config_data[] = { + 0x000024, + 0x023201, + 0x000081, + 0x000400, + 0x00104c, + 0x001101, + 0x001200, + 0x001300, + 0x001414, + 0x001500, + 0x001604, + 0x001704, + 0x001807, + 0x001900, + //0x001a00,//for debug + 0x001a32, + 0x001b12, + 0x001c44, + 0x001d00, + 0x001e00, + 0x00f062, + 0x00f162, + 0x00f262, + 0x00f362, + 0x00f462, + 0x00f562, + 0x00f662, + 0x00f762, + 0x00f862, + 0x00f962, + 0x00fa62, + 0x00fb62, + 0x00fc00, + 0x00fd00, + 0x019021, + 0x019100, + 0x019200, + 0x019321, + 0x019400, + 0x019500, + 0x019611, + 0x019700, + 0x019800, + 0x019900, + 0x019a00, + 0x019b00, + 0x01e003, + 0x01e102, + 0x023000, + 0x023201, + 0x0b0201, + 0x0b0300, + 0x001fff, + 0x0a0000, + 0x0a0100, + 0x0a0200, + 0x0a0302, + 0x0a0400, + 0x0a0504, + 0x0a060e, + 0x0a0700, + 0x0a0810, + 0x0a090e, + 0x0a0a00, + 0x0a0bf0, + 0x0a0c0b, + 0x0a0d01, + 0x0a0e90, + 0x0a0f01, + 0x0a1001, + 0x0a11e0, + 0x0a1201, + 0x0a1302, + 0x0a1430, + 0x0a1580, + 0x0a16ff, + 0x023201, + 0x0b0301, + 0x023201, +}; + + const unsigned int CLKGEN_SELECT = 145; + enum gpio_direction {IN, OUT}; class gpio { @@ -180,120 +264,31 @@ void spidev::send(char *buf, char *rbuf, unsigned int nbytes) tr.rx_buf = (unsigned long) rbuf; tr.len = nbytes; tr.delay_usecs = 0; - tr.speed_hz = 12000000; + tr.speed_hz = 12000; tr.bits_per_word = 24; - ret = ioctl(fd, SPI_IOC_MESSAGE(1), &tr); + ret = ioctl(fd, SPI_IOC_MESSAGE(1), &tr); } -static void spi_write_word(spidev spi, gpio &chip_select, const unsigned int addr, const unsigned char data) { - unsigned char out_data[3], in_data[3]; - unsigned char rw_w1_w0 = 0; //write one byte - out_data[0] = (rw_w1_w0 << 5) | (addr >> 8); - out_data[1] = addr & 0xff; - out_data[2] = data; - - chip_select.set_value(0); - spi.send((char *)out_data, (char *)in_data, 4); - chip_select.set_value(1); -} - -static void send_config_to_clkgen(gpio &chip_select) +static void send_config_to_clkgen(gpio &chip_select, const unsigned int data[], unsigned int data_size) { spidev spi("/dev/spidev1.0"); - - //do a soft reset - spi_write_word(spi, chip_select, 0x000, 1 << 5 | 1 << 2); - spi_write_word(spi, chip_select, 0x232, 0x1); - - // init some registers; - ad9522_regs_t ad9522_regs; - ad9522_regs.sdo_active = ad9522_regs_t::SDO_ACTIVE_SDO_SDIO; //use sdo and sdi - ad9522_regs.mirror = 1; //mirror sdo active - ad9522_regs.io_update = 1; //latch the registers - ad9522_regs.status_pin_control = 0x1; //n divider - ad9522_regs.ld_pin_control = 0x32; //show ref2 - ad9522_regs.refmon_pin_control = 0x12; //show ref2 - ad9522_regs.enb_stat_eeprom_at_stat_pin = 0; //use status pin as debug - - ad9522_regs.enable_ref2 = 0x1; - ad9522_regs.enable_ref1 = 0x0; - ad9522_regs.select_ref = ad9522_regs_t::SELECT_REF_REF2; - - ad9522_regs.set_r_counter(1); - ad9522_regs.a_counter = 0; - ad9522_regs.set_b_counter(20); - ad9522_regs.prescaler_p = ad9522_regs_t::PRESCALER_P_DIV8_9; - - ad9522_regs.pll_power_down = ad9522_regs_t::PLL_POWER_DOWN_NORMAL; //normal mode - ad9522_regs.cp_current = ad9522_regs_t::CP_CURRENT_1_2MA; - - ad9522_regs.vco_calibration_now = 1; //calibrate it! - ad9522_regs.vco_divider = ad9522_regs_t::VCO_DIVIDER_DIV5; - ad9522_regs.select_vco_or_clock = ad9522_regs_t::SELECT_VCO_OR_CLOCK_VCO; - - ad9522_regs.out0_format = ad9522_regs_t::OUT0_FORMAT_LVDS; - ad9522_regs.divider0_low_cycles = 2; //3 low - ad9522_regs.divider0_high_cycles = 1; //2 high - ad9522_regs.divider1_low_cycles = 2; //3 low - ad9522_regs.divider1_high_cycles = 1; //2 high - - ad9522_regs.enable_eeprom_write = 1; - - //write the registers - int reg_list[] = {0, 4, 16, 17, 18, 19, 20, 21, 22, 23, 24, - 25, 26, 27, 28, 29, 30, 240, 241, 242, 243, - 244, 245, 246, 247, 248, 249, 250, 251, 252, - 253, 400, 401, 402, 403, 404, 405, 406, 407, - 408, 409, 410, 411, 480, 481, 560, 562, 2818, - 2819}; - - for(int i=0; i<49; i++) { //blame std::vector for this (no static initialization bs) - spi_write_word(spi, chip_select, reg_list[i], ad9522_regs.get_reg(reg_list[i])); - } - - sleep(1); - - if (1){//write settings to eeprom - - //load the register buffs - spi_write_word(spi, chip_select, 0xa00, 0x0); - spi_write_word(spi, chip_select, 0xa01, 0x0); - spi_write_word(spi, chip_select, 0xa02, 0x0); - spi_write_word(spi, chip_select, 0xa03, 0x2); - spi_write_word(spi, chip_select, 0xa04, 0x0); - spi_write_word(spi, chip_select, 0xa05, 0x4); - spi_write_word(spi, chip_select, 0xa06, 0xe); - spi_write_word(spi, chip_select, 0xa07, 0x0); - spi_write_word(spi, chip_select, 0xa08, 0x10); - spi_write_word(spi, chip_select, 0xa09, 0xe); - spi_write_word(spi, chip_select, 0xa0a, 0x0); - spi_write_word(spi, chip_select, 0xa0b, 0xf0); - spi_write_word(spi, chip_select, 0xa0c, 0xb); - spi_write_word(spi, chip_select, 0xa0d, 0x1); - spi_write_word(spi, chip_select, 0xa0e, 0x90); - spi_write_word(spi, chip_select, 0xa0f, 0x1); - spi_write_word(spi, chip_select, 0xa10, 0x1); - spi_write_word(spi, chip_select, 0xa11, 0xe0); - spi_write_word(spi, chip_select, 0xa12, 0x1); - spi_write_word(spi, chip_select, 0xa13, 0x2); - spi_write_word(spi, chip_select, 0xa14, 0x30); - spi_write_word(spi, chip_select, 0xa15, 0x80); - spi_write_word(spi, chip_select, 0xa16, 0xff); - - spi_write_word(spi, chip_select, 0x232, 0x01); //latch - sleep(1); - //////////////////////////////////////////////////////////////// - - ad9522_regs.reg2eeprom = 1; - //write to eeprom - spi_write_word(spi, chip_select, 0xB03, ad9522_regs.get_reg(0xB03)); - //io update - spi_write_word(spi, chip_select, 0x232, ad9522_regs.get_reg(0x232)); //latch - sleep(1); - } - + unsigned int rbuf; + + for (unsigned int i = 0; i < data_size; i++) { + + //std::cout << "sending " << std::hex << data[i] << std::endl; + chip_select.set_value(0); + spi.send((char *)&data[i], (char *)&rbuf, 4); + chip_select.set_value(1); + unsigned int addr = (data[i] >> 8) & 0xfff; + if (addr == 0x232 || addr == 0x000){ + std::cout << "." << std::flush; + sleep(1); + } + }; + std::cout << std::endl; } }//namespace usrp_e_clkgen_config_utility @@ -304,7 +299,7 @@ static void clock_genconfig_main(void) using namespace usrp_e_clkgen_config_utility; gpio clkgen_select(CLKGEN_SELECT, OUT, true); - send_config_to_clkgen(clkgen_select); + send_config_to_clkgen(clkgen_select, config_data, sizeof(config_data)/sizeof(config_data[0])); } #endif /*USRP_E_UTILS_CLKGEN_CONFIG_HPP*/ diff --git a/host/usrp_e_utils/usrp-e-utility.cpp b/host/usrp_e_utils/usrp-e-utility.cpp index 4b4fc0178..b926cf49d 100644 --- a/host/usrp_e_utils/usrp-e-utility.cpp +++ b/host/usrp_e_utils/usrp-e-utility.cpp @@ -57,7 +57,7 @@ int UHD_SAFE_MAIN(int argc, char *argv[]){ } if (vm.count("reclk") != 0){ - std::cout << "USRP-E Utility running the clock recovery..." << std::endl << std::endl; + std::cout << "USRP-E Utility running the clock recovery..." << std::flush; //if an image was not loaded or specified, we load pass-through if (fpga_path.empty()) throw std::runtime_error( "Please specify the path to the pass-though FPGA image for your device.\n" -- cgit v1.2.3