From c23dc3b0122a46353810d1ccbe98c08b080850e8 Mon Sep 17 00:00:00 2001 From: Lane Kolbly Date: Mon, 18 Oct 2021 16:45:46 -0500 Subject: host: x4xx: Implement GPIO API This implements the GPIO API for X410 through get_gpio_attr and set_gpio_attr. In ATR mode, which channel's ATR state is chosen by the set_gpio_src call, setting e.g. DB0_RF0 for channel 0 or DB0_RF1 for channel 1. In manual mode, all 24 bits (for both ports) are set in a single register write. Although the front panel of the device has two ports, labelled GPIO0 and GPIO1, this API exposes them as though they were a single 24-bit GPIO port. --- host/tests/CMakeLists.txt | 2 ++ 1 file changed, 2 insertions(+) (limited to 'host/tests') diff --git a/host/tests/CMakeLists.txt b/host/tests/CMakeLists.txt index d3e44a518..a049c7e2e 100644 --- a/host/tests/CMakeLists.txt +++ b/host/tests/CMakeLists.txt @@ -370,6 +370,7 @@ UHD_ADD_RFNOC_BLOCK_TEST( EXTRA_SOURCES ${UHD_SOURCE_DIR}/lib/usrp/common/lmx2572.cpp ${UHD_SOURCE_DIR}/lib/usrp/common/pwr_cal_mgr.cpp + ${UHD_SOURCE_DIR}/lib/usrp/x400/x400_gpio_control.cpp ${UHD_SOURCE_DIR}/lib/usrp/x400/x400_radio_control.cpp ${UHD_SOURCE_DIR}/lib/usrp/x400/x400_rfdc_control.cpp ${UHD_SOURCE_DIR}/lib/usrp/x400/adc_self_calibration.cpp @@ -383,6 +384,7 @@ UHD_ADD_RFNOC_BLOCK_TEST( ${UHD_SOURCE_DIR}/lib/usrp/dboard/zbx/zbx_expert.cpp ${UHD_SOURCE_DIR}/lib/utils/compat_check.cpp ${UHD_SOURCE_DIR}/lib/features/discoverable_feature_registry.cpp + ${UHD_SOURCE_DIR}/lib/usrp/cores/gpio_atr_3000.cpp $ INCLUDE_DIRS ${UHD_SOURCE_DIR}/lib/deps/rpclib/include INCLUDE_DIRS ${UHD_SOURCE_DIR}/lib/deps/flatbuffers/include -- cgit v1.2.3