From 23f8854b398b92b34d520720abb239fa41b04254 Mon Sep 17 00:00:00 2001 From: Nicholas Corgan Date: Wed, 4 Jul 2012 06:30:53 -0700 Subject: lib: FW/FPGA compatibility error prompts user to use regular card/net burner instead of gui --- host/lib/usrp/usrp2/usrp2_iface.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'host/lib') diff --git a/host/lib/usrp/usrp2/usrp2_iface.cpp b/host/lib/usrp/usrp2/usrp2_iface.cpp index 316e38da8..f0b2a90a6 100644 --- a/host/lib/usrp/usrp2/usrp2_iface.cpp +++ b/host/lib/usrp/usrp2/usrp2_iface.cpp @@ -413,13 +413,13 @@ public: //create the images downloader and burner commands const std::string images_downloader_cmd = str(boost::format("%s\"%s\"") % sudo % find_images_downloader()); if (this->get_rev() == USRP2_REV3 or this->get_rev() == USRP2_REV4){ - const std::string card_burner = (fs::path(fw_image_path).branch_path().branch_path() / "utils" / "usrp2_card_burner_gui.py").string(); + const std::string card_burner = (fs::path(fw_image_path).branch_path().branch_path() / "utils" / "usrp2_card_burner.py").string(); const std::string card_burner_cmd = str(boost::format("\"%s%s\" %s--fpga=\"%s\" %s--fw=\"%s\"") % sudo % card_burner % ml % fpga_image_path % ml % fw_image_path); return str(boost::format("%s\n%s") % print_images_error() % card_burner_cmd); } else{ const std::string addr = _ctrl_transport->get_recv_addr(); - const std::string net_burner = (fs::path(fw_image_path).branch_path().branch_path() / "utils" / "usrp_n2xx_net_burner_gui.py").string(); + const std::string net_burner = (fs::path(fw_image_path).branch_path().branch_path() / "utils" / "usrp_n2xx_net_burner.py").string(); const std::string net_burner_cmd = str(boost::format("\"%s\" %s--fpga=\"%s\" %s--fw=\"%s\" %s--addr=\"%s\"") % net_burner % ml % fpga_image_path % ml % fw_image_path % ml % addr); return str(boost::format("%s\n%s") % print_images_error() % net_burner_cmd); } -- cgit v1.2.3 From 7c8fef85c070ad582d16d5782e7421700b714918 Mon Sep 17 00:00:00 2001 From: Josh Blum Date: Tue, 3 Jul 2012 17:40:52 -0700 Subject: usrp: cache writes to gpio pins (avoids overhead) --- host/lib/usrp/cores/gpio_core_200.cpp | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) (limited to 'host/lib') diff --git a/host/lib/usrp/cores/gpio_core_200.cpp b/host/lib/usrp/cores/gpio_core_200.cpp index d756097ff..cdab70b8d 100644 --- a/host/lib/usrp/cores/gpio_core_200.cpp +++ b/host/lib/usrp/cores/gpio_core_200.cpp @@ -63,6 +63,7 @@ private: wb_iface::sptr _iface; const size_t _base; const size_t _rb_addr; + uhd::dict _update_cache; uhd::dict _pin_ctrl, _gpio_out, _gpio_ddr; uhd::dict > _atr_regs; @@ -90,7 +91,12 @@ private: const boost::uint32_t ctrl = (boost::uint32_t(_pin_ctrl[dboard_iface::UNIT_RX]) << unit2shit(dboard_iface::UNIT_RX)) | (boost::uint32_t(_pin_ctrl[dboard_iface::UNIT_TX]) << unit2shit(dboard_iface::UNIT_TX)); - _iface->poke32(addr, (ctrl & atr_val) | ((~ctrl) & gpio_val)); + const boost::uint32_t val = (ctrl & atr_val) | ((~ctrl) & gpio_val); + if (not _update_cache.has_key(addr) or _update_cache[addr] != val) + { + _iface->poke32(addr, val); + } + _update_cache[addr] = val; } }; -- cgit v1.2.3 From eb0833008f38a5b9d33ed9282042bd4ca3fd3ff9 Mon Sep 17 00:00:00 2001 From: Josh Blum Date: Mon, 16 Jul 2012 17:51:41 -0700 Subject: e100: set vita header offset for previous FPGA changeset --- host/lib/usrp/e100/io_impl.cpp | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'host/lib') diff --git a/host/lib/usrp/e100/io_impl.cpp b/host/lib/usrp/e100/io_impl.cpp index e9608125f..332fe76ae 100644 --- a/host/lib/usrp/e100/io_impl.cpp +++ b/host/lib/usrp/e100/io_impl.cpp @@ -42,6 +42,8 @@ using namespace uhd; using namespace uhd::usrp; using namespace uhd::transport; +static const size_t vrt_send_header_offset_words32 = 1; + /*********************************************************************** * io impl details (internal to this file) * - pirate crew of 1 @@ -324,6 +326,7 @@ tx_streamer::sptr e100_impl::get_tx_stream(const uhd::stream_args_t &args_){ //calculate packet size static const size_t hdr_size = 0 + + vrt_send_header_offset_words32*sizeof(boost::uint32_t) + vrt::max_if_hdr_words32*sizeof(boost::uint32_t) + sizeof(vrt::if_packet_info_t().tlr) //forced to have trailer - sizeof(vrt::if_packet_info_t().sid) //no stream id ever used @@ -338,7 +341,7 @@ tx_streamer::sptr e100_impl::get_tx_stream(const uhd::stream_args_t &args_){ //init some streamer stuff my_streamer->resize(args.channels.size()); - my_streamer->set_vrt_packer(&vrt::if_hdr_pack_le); + my_streamer->set_vrt_packer(&vrt::if_hdr_pack_le, vrt_send_header_offset_words32); //set the converter uhd::convert::id_type id; -- cgit v1.2.3