From 929571756901c96a984bbb4e415478ac3deb1784 Mon Sep 17 00:00:00 2001 From: Josh Blum Date: Thu, 13 Oct 2011 13:26:07 -0700 Subject: uhd: added converter for item32 as cpu type --- host/lib/convert/gen_convert_general.py | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) (limited to 'host/lib') diff --git a/host/lib/convert/gen_convert_general.py b/host/lib/convert/gen_convert_general.py index be5a65130..eafb145e6 100644 --- a/host/lib/convert/gen_convert_general.py +++ b/host/lib/convert/gen_convert_general.py @@ -28,6 +28,30 @@ TMPL_HEADER = """ using namespace uhd::convert; """ +TMPL_CONV_GEN2_ITEM32 = """ +DECLARE_CONVERTER(item32, 1, sc16_item32_$(end), 1, PRIORITY_GENERAL){ + const item32_t *input = reinterpret_cast(inputs[0]); + item32_t *output = reinterpret_cast(outputs[0]); + + if (scale_factor == 0){} //avoids unused warning + + for (size_t i = 0; i < nsamps; i++){ + output[i] = $(to_wire)(input[i]); + } +} + +DECLARE_CONVERTER(sc16_item32_$(end), 1, item32, 1, PRIORITY_GENERAL){ + const item32_t *input = reinterpret_cast(inputs[0]); + item32_t *output = reinterpret_cast(outputs[0]); + + if (scale_factor == 0){} //avoids unused warning + + for (size_t i = 0; i < nsamps; i++){ + output[i] = $(to_host)(input[i]); + } +} +""" + TMPL_CONV_GEN2_COMPLEX = """ DECLARE_CONVERTER($(cpu_type), 1, sc16_item32_$(end), 1, PRIORITY_GENERAL){ const $(cpu_type)_t *input = reinterpret_cast(inputs[0]); @@ -150,6 +174,10 @@ if __name__ == '__main__': TMPL_CONV_GEN2_COMPLEX, end=end, to_host=to_host, to_wire=to_wire, cpu_type=cpu_type ) + output += parse_tmpl( + TMPL_CONV_GEN2_ITEM32, + end=end, to_host=to_host, to_wire=to_wire + ) #generate complex converters for usrp1 format for width in 1, 2, 4: -- cgit v1.2.3