From 4a731f6c1d6b71a501c98d745f4e2721e5f3e5c5 Mon Sep 17 00:00:00 2001 From: Ashish Chaudhari Date: Mon, 13 Jul 2015 15:19:04 -0700 Subject: b200: Bumped FPGA compat number to 8 for release --- host/lib/usrp/b200/b200_impl.hpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'host/lib') diff --git a/host/lib/usrp/b200/b200_impl.hpp b/host/lib/usrp/b200/b200_impl.hpp index 7ed94284d..65796d1a4 100644 --- a/host/lib/usrp/b200/b200_impl.hpp +++ b/host/lib/usrp/b200/b200_impl.hpp @@ -47,7 +47,7 @@ #include "recv_packet_demuxer_3000.hpp" static const boost::uint8_t B200_FW_COMPAT_NUM_MAJOR = 7; static const boost::uint8_t B200_FW_COMPAT_NUM_MINOR = 0; -static const boost::uint16_t B200_FPGA_COMPAT_NUM = 6; +static const boost::uint16_t B200_FPGA_COMPAT_NUM = 8; static const double B200_BUS_CLOCK_RATE = 100e6; static const double B200_DEFAULT_TICK_RATE = 32e6; static const double B200_DEFAULT_FREQ = 100e6; // Hz -- cgit v1.2.3 From 850251d4ec31f515b99e2f5f2c128c3ce78c2b76 Mon Sep 17 00:00:00 2001 From: Moritz Fischer Date: Tue, 7 Jul 2015 14:28:20 -0700 Subject: e3xx: Load idle image on shutdown. This commit will have UHD load the idle fpga image on destruction of e300_impl. Note: This requires usrp_e310_idle_fpga.bit to be present in the UHD images directory. Signed-off-by: Moritz Fischer --- host/lib/usrp/e300/e300_impl.cpp | 51 ++++++++++++++++++++++------------------ host/lib/usrp/e300/e300_impl.hpp | 5 ++++ 2 files changed, 33 insertions(+), 23 deletions(-) (limited to 'host/lib') diff --git a/host/lib/usrp/e300/e300_impl.cpp b/host/lib/usrp/e300/e300_impl.cpp index 41e8eacf3..515fccc08 100644 --- a/host/lib/usrp/e300/e300_impl.cpp +++ b/host/lib/usrp/e300/e300_impl.cpp @@ -284,32 +284,36 @@ e300_impl::e300_impl(const uhd::device_addr_t &device_addr) // load the fpga image //////////////////////////////////////////////////////////////////// if (_xport_path == AXI) { - if (not device_addr.has_key("no_reload_fpga")) { + _do_not_reload = device_addr.has_key("no_reload_fpga"); + if (not _do_not_reload) { // Load FPGA image if provided via args - if (device_addr.has_key("fpga")) { - common::load_fpga_image(device_addr["fpga"]); - // Else load the FPGA image based on the product ID - } else { - //extract the FPGA path for the e300 - const boost::uint16_t pid = boost::lexical_cast( + const boost::uint16_t pid = boost::lexical_cast( device_addr["product"]); - std::string fpga_image; - switch(e300_eeprom_manager::get_mb_type(pid)) { - case e300_eeprom_manager::USRP_E310_MB: - fpga_image = find_image_path(E310_FPGA_FILE_NAME); - break; - case e300_eeprom_manager::USRP_E300_MB: - fpga_image = find_image_path(E300_FPGA_FILE_NAME); - break; - case e300_eeprom_manager::UNKNOWN: - default: - UHD_MSG(warning) << "Unknown motherboard type, loading e300 image." + + std::string fpga_image; + + //extract the FPGA path for the e300 + switch(e300_eeprom_manager::get_mb_type(pid)) { + case e300_eeprom_manager::USRP_E310_MB: + fpga_image = device_addr.cast("fpga", + find_image_path(E310_FPGA_FILE_NAME)); + _idle_image = find_image_path(E310_FPGA_IDLE_FILE_NAME); + break; + case e300_eeprom_manager::USRP_E300_MB: + fpga_image = device_addr.cast("fpga", + find_image_path(E300_FPGA_FILE_NAME)); + _idle_image = find_image_path(E300_FPGA_IDLE_FILE_NAME); + break; + case e300_eeprom_manager::UNKNOWN: + default: + UHD_MSG(warning) << "Unknown motherboard type, loading e300 image." << std::endl; - fpga_image = find_image_path(E300_FPGA_FILE_NAME); - break; - } - common::load_fpga_image(fpga_image); + fpga_image = device_addr.cast("fpga", + find_image_path(E300_FPGA_FILE_NAME)); + _idle_image = find_image_path(E300_FPGA_IDLE_FILE_NAME); + break; } + common::load_fpga_image(fpga_image); } } @@ -621,7 +625,8 @@ uhd::sensor_value_t e300_impl::_get_fe_pll_lock(const bool is_tx) e300_impl::~e300_impl(void) { - /* NOP */ + if (_xport_path == AXI and not _do_not_reload) + common::load_fpga_image(_idle_image); } void e300_impl::_enforce_tick_rate_limits( diff --git a/host/lib/usrp/e300/e300_impl.hpp b/host/lib/usrp/e300/e300_impl.hpp index c7d683f58..196c5fdd8 100644 --- a/host/lib/usrp/e300/e300_impl.hpp +++ b/host/lib/usrp/e300/e300_impl.hpp @@ -51,6 +51,9 @@ namespace uhd { namespace usrp { namespace e300 { static const std::string E300_FPGA_FILE_NAME = "usrp_e300_fpga.bit"; static const std::string E310_FPGA_FILE_NAME = "usrp_e310_fpga.bit"; +static const std::string E300_FPGA_IDLE_FILE_NAME = "usrp_e300_idle_fpga.bit"; +static const std::string E310_FPGA_IDLE_FILE_NAME = "usrp_e310_idle_fpga.bit"; + static const std::string E300_TEMP_SYSFS = "iio:device0"; static const std::string E300_SPIDEV_DEVICE = "/dev/spidev0.1"; static const std::string E300_I2CDEV_DEVICE = "/dev/i2c-0"; @@ -287,6 +290,8 @@ private: // members e300_eeprom_manager::sptr _eeprom_manager; uhd::transport::zero_copy_xport_params _data_xport_params; uhd::transport::zero_copy_xport_params _ctrl_xport_params; + std::string _idle_image; + bool _do_not_reload; gpio_t _misc; gps::ublox::ubx::control::sptr _gps; }; -- cgit v1.2.3 From 3cb995e3a60e940e5b23c6ca43712ab51b27c97e Mon Sep 17 00:00:00 2001 From: Moritz Fischer Date: Tue, 7 Jul 2015 14:29:30 -0700 Subject: e3xx: Increase TX buffer size to PAGE_SIZE. This was originally limited because it performed poor, however, with refactoring that has been done since release, this now gives better performance. Signed-off-by: Moritz Fischer --- host/lib/usrp/e300/e300_defaults.hpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'host/lib') diff --git a/host/lib/usrp/e300/e300_defaults.hpp b/host/lib/usrp/e300/e300_defaults.hpp index 8fe8c3a05..89afcb256 100644 --- a/host/lib/usrp/e300/e300_defaults.hpp +++ b/host/lib/usrp/e300/e300_defaults.hpp @@ -41,7 +41,7 @@ static const std::string DEFAULT_CLOCK_SRC = "internal"; static const size_t DEFAULT_RX_DATA_FRAME_SIZE = 4096; static const size_t DEFAULT_RX_DATA_NUM_FRAMES = 32; -static const size_t DEFAULT_TX_DATA_FRAME_SIZE = 2048; +static const size_t DEFAULT_TX_DATA_FRAME_SIZE = 4096; static const size_t DEFAULT_TX_DATA_NUM_FRAMES = 32; static const size_t DEFAULT_CTRL_FRAME_SIZE = 64; -- cgit v1.2.3 From 5f11aee12dc90baac56a803ce462255bc8026f71 Mon Sep 17 00:00:00 2001 From: Moritz Fischer Date: Thu, 9 Jul 2015 12:36:08 -0700 Subject: e3xx: Bump compat number from 6 -> 8. Signed-off-by: Moritz Fischer --- host/lib/usrp/e300/e300_fpga_defs.hpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'host/lib') diff --git a/host/lib/usrp/e300/e300_fpga_defs.hpp b/host/lib/usrp/e300/e300_fpga_defs.hpp index c038efbae..eea4d7f63 100644 --- a/host/lib/usrp/e300/e300_fpga_defs.hpp +++ b/host/lib/usrp/e300/e300_fpga_defs.hpp @@ -21,7 +21,7 @@ namespace uhd { namespace usrp { namespace e300 { namespace fpga { static const size_t NUM_RADIOS = 2; -static const boost::uint32_t COMPAT_MAJOR = 6; +static const boost::uint32_t COMPAT_MAJOR = 8; static const boost::uint32_t COMPAT_MINOR = 0; }}}} // namespace -- cgit v1.2.3 From 6091e8759a9291f4a2134cf726683c24983eebf7 Mon Sep 17 00:00:00 2001 From: Moritz Fischer Date: Mon, 13 Jul 2015 17:00:32 -0700 Subject: e3xx: Fixup for idle image to follow naming convention. Signed-off-by: Moritz Fischer --- host/lib/usrp/e300/e300_impl.hpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'host/lib') diff --git a/host/lib/usrp/e300/e300_impl.hpp b/host/lib/usrp/e300/e300_impl.hpp index 196c5fdd8..7f83c16ed 100644 --- a/host/lib/usrp/e300/e300_impl.hpp +++ b/host/lib/usrp/e300/e300_impl.hpp @@ -51,8 +51,8 @@ namespace uhd { namespace usrp { namespace e300 { static const std::string E300_FPGA_FILE_NAME = "usrp_e300_fpga.bit"; static const std::string E310_FPGA_FILE_NAME = "usrp_e310_fpga.bit"; -static const std::string E300_FPGA_IDLE_FILE_NAME = "usrp_e300_idle_fpga.bit"; -static const std::string E310_FPGA_IDLE_FILE_NAME = "usrp_e310_idle_fpga.bit"; +static const std::string E300_FPGA_IDLE_FILE_NAME = "usrp_e300_fpga_idle.bit"; +static const std::string E310_FPGA_IDLE_FILE_NAME = "usrp_e310_fpga_idle.bit"; static const std::string E300_TEMP_SYSFS = "iio:device0"; static const std::string E300_SPIDEV_DEVICE = "/dev/spidev0.1"; -- cgit v1.2.3 From 8f47d5b898d7b60f5139fed242309597834c0c52 Mon Sep 17 00:00:00 2001 From: Martin Braun Date: Tue, 14 Jul 2015 12:51:08 -0700 Subject: x300: Added max hw rev checking --- host/lib/usrp/x300/x300_fw_common.h | 1 + host/lib/usrp/x300/x300_impl.cpp | 10 ++++++++++ 2 files changed, 11 insertions(+) (limited to 'host/lib') diff --git a/host/lib/usrp/x300/x300_fw_common.h b/host/lib/usrp/x300/x300_fw_common.h index 42583f7f0..76531f921 100644 --- a/host/lib/usrp/x300/x300_fw_common.h +++ b/host/lib/usrp/x300/x300_fw_common.h @@ -29,6 +29,7 @@ extern "C" { #endif +#define X300_MAX_HW_REV 6 #define X300_FW_COMPAT_MAJOR 3 #define X300_FW_COMPAT_MINOR 0 #define X300_FPGA_COMPAT_MAJOR 9 diff --git a/host/lib/usrp/x300/x300_impl.cpp b/host/lib/usrp/x300/x300_impl.cpp index 809a56765..58914c02b 100644 --- a/host/lib/usrp/x300/x300_impl.cpp +++ b/host/lib/usrp/x300/x300_impl.cpp @@ -622,6 +622,16 @@ void x300_impl::setup_mb(const size_t mb_i, const uhd::device_addr_t &dev_addr) mb.hw_rev = X300_REV("D"); } + UHD_VAR(mb.hw_rev) + if (mb.hw_rev > X300_MAX_HW_REV) { + throw uhd::runtime_error(str( + boost::format("Unsupported board revision number: %d.\n" + "The maximum board revision number supported in this version is %d.\n" + "Please update your UHD version.") + % mb.hw_rev % X300_MAX_HW_REV + )); + } + //Create clock control. NOTE: This does not configure the LMK yet. initialize_clock_control(mb); mb.clock = x300_clock_ctrl::make(mb.zpu_spi, -- cgit v1.2.3