From 61774a09613eed51a42496f8689b707417b360f2 Mon Sep 17 00:00:00 2001 From: Trung N Tran Date: Wed, 29 Nov 2017 10:01:01 -0800 Subject: mg: fix TX dsa bug DSA value was set at wrong value since it is at upper 6 bits of DSA register. Added comment. --- host/lib/usrp/dboard/magnesium/magnesium_radio_ctrl_gain.cpp | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'host/lib') diff --git a/host/lib/usrp/dboard/magnesium/magnesium_radio_ctrl_gain.cpp b/host/lib/usrp/dboard/magnesium/magnesium_radio_ctrl_gain.cpp index b3d01df2c..ff4683fe5 100644 --- a/host/lib/usrp/dboard/magnesium/magnesium_radio_ctrl_gain.cpp +++ b/host/lib/usrp/dboard/magnesium/magnesium_radio_ctrl_gain.cpp @@ -107,6 +107,8 @@ void magnesium_radio_ctrl_impl::_set_dsa_val( const direction_t dir, const uint32_t dsa_val ) { + // The DSA register holds 12 bits. The lower 6 bits are for RX, the upper + // 6 bits are for TX. if (dir == RX_DIRECTION or dir == DX_DIRECTION){ UHD_LOG_TRACE(unique_id(), __func__ << "(chan=" << chan << ", dir=RX" @@ -117,7 +119,7 @@ void magnesium_radio_ctrl_impl::_set_dsa_val( UHD_LOG_TRACE(unique_id(), __func__ << "(chan=" << chan << ", dir=TX" << ", dsa_val=" << dsa_val << ")") - _gpio[chan]->set_gpio_out(dsa_val, 0x0FC0); + _gpio[chan]->set_gpio_out(dsa_val<<6, 0x0FC0); } } -- cgit v1.2.3