From 572a64f0acb459583abfccbc8288158822fa2f77 Mon Sep 17 00:00:00 2001 From: Josh Blum Date: Sat, 29 Jan 2011 21:03:29 +0000 Subject: usrp-e100: clock control use boost math gcd for divider calculation --- host/lib/usrp/usrp_e100/clock_ctrl.cpp | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) (limited to 'host/lib') diff --git a/host/lib/usrp/usrp_e100/clock_ctrl.cpp b/host/lib/usrp/usrp_e100/clock_ctrl.cpp index e2c4889bc..dd7f8507b 100644 --- a/host/lib/usrp/usrp_e100/clock_ctrl.cpp +++ b/host/lib/usrp/usrp_e100/clock_ctrl.cpp @@ -24,6 +24,7 @@ #include #include #include +#include //gcd #include #include #include @@ -216,12 +217,14 @@ public: _chan_rate = rate; _out_rate = rate; - _ad9522_regs.enable_clock_doubler = 1; + _ad9522_regs.enable_clock_doubler = 1; //doubler always on + const double ref_rate = REFERENCE_INPUT_RATE*2; - //bypass prescalers and counters == 1 - _ad9522_regs.set_r_counter(125); + //bypass prescaler such that N = B + long gcd = boost::math::gcd(long(ref_rate), long(rate)); + _ad9522_regs.set_r_counter(int(ref_rate/gcd)); _ad9522_regs.a_counter = 0; - _ad9522_regs.set_b_counter(384); + _ad9522_regs.set_b_counter(int(rate/gcd)); _ad9522_regs.prescaler_p = ad9522_regs_t::PRESCALER_P_DIV1; //setup external vcxo -- cgit v1.2.3