From 1fe6a3a8aa4ae6af023552786a190f2d98de8a87 Mon Sep 17 00:00:00 2001 From: Neel Pandeya Date: Mon, 23 Mar 2015 16:10:04 -0700 Subject: x300: Fix for Bug #714: Phase wobble across four channels on two devices - Increased filter loop bandwith on clock control chip --- host/lib/usrp/x300/x300_clock_ctrl.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'host/lib') diff --git a/host/lib/usrp/x300/x300_clock_ctrl.cpp b/host/lib/usrp/x300/x300_clock_ctrl.cpp index 247c10ac4..b59247d53 100644 --- a/host/lib/usrp/x300/x300_clock_ctrl.cpp +++ b/host/lib/usrp/x300/x300_clock_ctrl.cpp @@ -190,7 +190,7 @@ void set_master_clock_rate(double clock_rate) { // PLL1 - 2 MHz compare frequency _lmk04816_regs.PLL1_N_28 = 100; _lmk04816_regs.PLL1_R_27 = 5; - _lmk04816_regs.PLL1_CP_GAIN_27 = lmk04816_regs_t::PLL1_CP_GAIN_27_100UA; + _lmk04816_regs.PLL1_CP_GAIN_27 = lmk04816_regs_t::PLL1_CP_GAIN_27_1600UA; // PLL2 - 96 MHz compare frequency _lmk04816_regs.PLL2_N_30 = 5; -- cgit v1.2.3