From dee55b030e0056cdaac5bc595818bddad0ed680e Mon Sep 17 00:00:00 2001 From: Johannes Demel Date: Wed, 20 Nov 2013 16:15:03 -0800 Subject: stall-bug: fixed call by value instead of call by reference --- host/lib/usrp/cores/radio_ctrl_core_3000.cpp | 24 ++++++++++++++++-------- 1 file changed, 16 insertions(+), 8 deletions(-) (limited to 'host/lib/usrp') diff --git a/host/lib/usrp/cores/radio_ctrl_core_3000.cpp b/host/lib/usrp/cores/radio_ctrl_core_3000.cpp index 0d6e1c665..3e8de2657 100644 --- a/host/lib/usrp/cores/radio_ctrl_core_3000.cpp +++ b/host/lib/usrp/cores/radio_ctrl_core_3000.cpp @@ -189,6 +189,7 @@ private: //parse the packet vrt::if_packet_info_t packet_info; resp_buff_type resp_buff; + memset(&resp_buff, 0x00, sizeof(resp_buff)); boost::uint32_t const *pkt = NULL; managed_recv_buffer::sptr buff; @@ -221,9 +222,9 @@ private: */ double accum_timeout = 0.0; const double short_timeout = 0.005; // == 5ms - while(not (_resp_queue.pop_with_haste(resp_buff) - || check_dump_queue(resp_buff) - || _resp_queue.pop_with_timed_wait(resp_buff, short_timeout) + while(not ((_resp_queue.pop_with_haste(resp_buff)) + || (check_dump_queue(resp_buff)) + || (_resp_queue.pop_with_timed_wait(resp_buff, short_timeout)) )){ /* * If a message couldn't be received within a given timeout @@ -247,7 +248,12 @@ private: catch(const std::exception &ex) { UHD_MSG(error) << "Radio ctrl bad VITA packet: " << ex.what() << std::endl; - UHD_VAR(buff->size()); + if (buff){ + UHD_VAR(buff->size()); + } + else{ + UHD_MSG(status) << "buff is NULL" << std::endl; + } UHD_MSG(status) << std::hex << pkt[0] << std::dec << std::endl; UHD_MSG(status) << std::hex << pkt[1] << std::dec << std::endl; UHD_MSG(status) << std::hex << pkt[2] << std::dec << std::endl; @@ -288,16 +294,18 @@ private: * With check_dump_queue we can check if a message we are waiting for got stranded there. * If a message got stuck we get it here and push it onto our own message_queue. */ - bool check_dump_queue(resp_buff_type b) { + bool check_dump_queue(resp_buff_type& b) { + const size_t min_buff_size = 8; // Same value as in b200_io_impl->handle_async_task boost::uint32_t recv_sid = (((_sid)<<16)|((_sid)>>16)); uhd::msg_task::msg_payload_t msg; do{ msg = _async_task->get_msg_from_dump_queue(recv_sid); } - while(msg.size() < 8 && msg.size() != 0); + while(msg.size() < min_buff_size && msg.size() != 0); - if(msg.size() >= 8) { - memcpy(b.data, &msg.front(), 8); + if(msg.size() >= min_buff_size) { + UHD_ASSERT_THROW(min_buff_size <= sizeof(b.data)); + memcpy(b.data, &msg.front(), min_buff_size); return true; } return false; -- cgit v1.2.3 From 8c79e285b0f4b6b80f8ae1fe69a5288d2b4d0194 Mon Sep 17 00:00:00 2001 From: Johannes Demel Date: Wed, 20 Nov 2013 16:30:37 -0800 Subject: stall-bug: generalized message size handling --- host/lib/usrp/cores/radio_ctrl_core_3000.cpp | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'host/lib/usrp') diff --git a/host/lib/usrp/cores/radio_ctrl_core_3000.cpp b/host/lib/usrp/cores/radio_ctrl_core_3000.cpp index 3e8de2657..27fac3471 100644 --- a/host/lib/usrp/cores/radio_ctrl_core_3000.cpp +++ b/host/lib/usrp/cores/radio_ctrl_core_3000.cpp @@ -304,8 +304,7 @@ private: while(msg.size() < min_buff_size && msg.size() != 0); if(msg.size() >= min_buff_size) { - UHD_ASSERT_THROW(min_buff_size <= sizeof(b.data)); - memcpy(b.data, &msg.front(), min_buff_size); + memcpy(b.data, &msg.front(), std::min(msg.size(), sizeof(b.data))); return true; } return false; -- cgit v1.2.3 From 7788c69225f68f67b95a5f778c7b45adf9cc046f Mon Sep 17 00:00:00 2001 From: Balint Seeber Date: Wed, 20 Nov 2013 20:10:14 -0800 Subject: b200: fix loopback transfer timeout when operating at USB2 --- host/lib/usrp/b200/b200_iface.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'host/lib/usrp') diff --git a/host/lib/usrp/b200/b200_iface.cpp b/host/lib/usrp/b200/b200_iface.cpp index a8e96f4ac..bb46fbfce 100644 --- a/host/lib/usrp/b200/b200_iface.cpp +++ b/host/lib/usrp/b200/b200_iface.cpp @@ -505,7 +505,8 @@ public: unsigned char out_buff[VREQ_MAX_SIZE]; // Request loopback read, which will indicate the firmware's current control request buffer size - int nread = fx3_control_read(B200_VREQ_LOOP, 0, 0, out_buff, sizeof(out_buff), 1000); + // Make sure that if operating as USB2, requested length is within spec + int nread = fx3_control_read(B200_VREQ_LOOP, 0, 0, out_buff, std::min(transfer_size, (int)sizeof(out_buff)), 1000); if (nread <= 0) throw uhd::io_error("load_fpga: unable to complete firmware loopback request."); transfer_size = std::min(transfer_size, nread); // Select the smaller value -- cgit v1.2.3 From 0e3912767266473e08386c910954450d16d33664 Mon Sep 17 00:00:00 2001 From: Ben Hilburn Date: Wed, 27 Nov 2013 11:53:38 -0800 Subject: Squashed commit uhd/cleanup. --- CHANGELOG | 343 ++++++++++++ README.md | 71 +++ README.txt | 19 - firmware/README.md | 48 ++ firmware/README.txt | 31 -- firmware/fx2/AUTHORS | 4 - firmware/octoclock/Makefile | 16 +- firmware/octoclock/OctoClock-io.h | 70 --- firmware/octoclock/OctoClock.c | 1103 ++++++++++++++----------------------- firmware/zpu/AUTHORS | 4 - firmware/zpu/README | 16 - host/AUTHORS.txt | 40 -- host/LICENSE | 12 + host/LICENSE.txt | 12 - host/README.txt | 43 -- host/apps/omap_debug/README | 1 - host/cmake/Modules/FindUSB1.cmake | 3 +- host/docs/uhd_find_devices.1 | 3 - host/docs/uhd_images_downloader.1 | 3 - host/docs/uhd_usrp_probe.1 | 2 +- host/lib/usrp/README | 15 - images/Makefile | 16 +- images/README.md | 35 ++ images/README.txt | 25 - 24 files changed, 958 insertions(+), 977 deletions(-) create mode 100644 CHANGELOG create mode 100644 README.md delete mode 100644 README.txt create mode 100644 firmware/README.md delete mode 100644 firmware/README.txt delete mode 100644 firmware/fx2/AUTHORS delete mode 100644 firmware/octoclock/OctoClock-io.h delete mode 100644 firmware/zpu/AUTHORS delete mode 100644 firmware/zpu/README delete mode 100644 host/AUTHORS.txt create mode 100644 host/LICENSE delete mode 100644 host/LICENSE.txt delete mode 100644 host/README.txt delete mode 100644 host/apps/omap_debug/README delete mode 100644 host/lib/usrp/README create mode 100644 images/README.md delete mode 100644 images/README.txt (limited to 'host/lib/usrp') diff --git a/CHANGELOG b/CHANGELOG new file mode 100644 index 000000000..8965ae3b4 --- /dev/null +++ b/CHANGELOG @@ -0,0 +1,343 @@ +Change Log for Releases +============================== + +## 003.005.003 + +* E110: +** Fix FPGA Makefile build typo +* UHD: +** Fixed timespec irrational rate rounding +** Multichan streamer CPU utilization + +## 003.005.002 + +* B100: +** Fix get send buffer timeout +* E1x0: +** Changes to bus timings for S issue +* USRP1: +** Restore broken EEPROM writing + + +## 003.005.001 + +* Misc: +** Fixes to images downloader +** Fixes to C++ net burner +** Added sleep(1) to query_gpsdo_sensors +* OSX: +** Fix for socket send code newer OS versions +* Changes from 3.4.5 + +## 003.005.000 + +* B100: +** Added timed commands feature +** Incremented FPGA compat number to 11.1 +** Incremented firmware compat number to 3 +* E1x0: +** Added timed commands feature +** Incremented FPGA compat number to 11.1 +* USRP2/N2x0: +** Alternative stream destination on TX +** Incremented FPGA compat number to 10 +* N2x0: +** Implemented timed-commands feature +** Implemented fast-commands feature +* SBX/WBX +** Tune with phase sync using timed-commands +* RFX series +** Added calibration utilities support +* General: +** SSE2 conversions for sc8 RX samples +** Added multi-threading to packet converters +** Added automatic images fetcher application + +## 003.004.005 + +* XCVR2450: +** Added XCVR2450 rev2 support +* WBX: +** Added WBX rev4 support +* Misc: +** Fix to rx_samples_to_udp byte count +** stream command enums easy on SWIG + +## 003.004.004 + +* Gen2 +** Fix RX and TX DSP scalar adjustments +* B100/E1x0 +** Fixed RX ADC IQ inversion swap +** Incremented FPGA compat number to 9.4 + +## 003.004.003 + +* USRP2/N2x0: +** Net burner parser fix (windows) +* XCVR2450: +** Fix to disable automatic LO offset on TX +* N2x0: +** Deal with misc exceptions in net burner +* E1x0: +** Changes to add reliability to bus state machine +* USRP1: +** Shutoff the DAC on transmit EOB flags +** Revert 1st nyquist zone DAC calculation + +## 003.004.002 + +* USRP2/N2x0: +** Card and net burner language fixes +** Net burner python v3 code fix +** Net burner IPv6 interface fix +* E1x0: +** Fix for FPGA timing issue with GPMC input +** Incremented FPGA compat number to 9.2 +* B100: +** Fix USB wrapper/buffer release race condition +* USRP1: +** Fix DAC calculation for tune out of 1st nyquist zone +* General: +** Fix for recv packet handler time error check +** SIMD conversion routines priority over table look-up +** Fix undefined GCC float conversion behaviour for sc8 + +## 003.004.001 + +* USRP2/N2x0: +** Filter out invalid broadcast replies +** Incremented FPGA compat number to 9.1 +* E1x0: +** Incremented FPGA compat number to 9.1 +* B100: +** FPGA fixes for USB slave FIFO interface +** Incremented FPGA compat number to 9.3 +* USRP1: +** Stop thread in deconstructor for race condition +** Fixed DBSRX + USRP1 i2c lockup condition +* Gen2: +** Fix for unintentional clear in deprecated recv() call +** Fix RX DC offset call to handle negative values +* FreeBSD: +** Fixed network relay example compilation + +## 003.004.000 + +* USRP2/N2x0: +** 50 Msps RX/TX with sc8 mode over the wire +* B100: +** 16 Msps RX/TX with sc8 mode over the wire +* SBX/WBX: +** Added self-calibration utilities +* Gen2: +** Control RX/TX DC offset correction via API +** Control RX/TX IQ balance correction via API +** Incremented FPGA compat number to 9 +* USRP1: +** Support 16Msps RX with sc8 mode over the wire +** Control RX DC offset correction via API +* Misc: +** Multiple streamers/heterogeneous rates +** Alternative host and wire data types +** Added API calls for DC offset correction +** Added API calls for IQ balance correction + +## Release 003.003.002 + +* N2x0: +** Fixed TX daughterboard clocking mode +* B100: +** Tweaks for ordering of FPGA resets +* Misc: +** Device adder can parse empty values +** Updated syntax in udev rules file +** Corrections to images documentation +** Performance tweak for tx_waveforms example +** Handle EINTR on select() w/ udp transport +** Minor fixes for compiling on FreeBSD + +## Release 003.003.001 + +* B100/E1x0: +** Fixed VCO bounds checking on flexible clocking +* B100: +** Fixed discovery throwing when device claimed + +## Release 003.003.000 + +* USRP2/N2x0: +** Incremented firmware image compat number to 11.0 +** Re-implement internal GPSDO UART control +* E1x0: +** New GPMC/FPGA bus implementation +** Incremented FPGA compat number to 6 +** Incremented module compat number to 3 +** Added support for E110 +** Added support for E100r4 +* B100: +** Added support for B100 +* USRP1: +** Re-implement LibUSB data transport +* Misc: +** Normalise time_spec for negative fractional seconds +* Gen2: +** Fix DSP rate selection clipping for very low rates + +## Release 003.002.004 + +* USRP2/N2x0: +** Resize all socket buffers (multi-channel) +* N2x0: +** Gracefully handle missing GPSDO +* USRP1: +** Fix bug with order of deconstructors +** Fix zero length send padding on commit +* XCVR2450: +** Fix LO locking at marginal frequencies +* WBX: +** Fix TX gain readback value on v3 board +* Gen2: +** Fix bounds checking on stream num samps +** Fix error using PPS_NEG in clock config + +## Release 003.002.003 + +* USRP2/N2x0: +** Fix uninitialized variable for multi-board case +** Fix deconstructor throwing on device disconnect +** Incremented FPGA image compat number to 7.3 +* TVRX: +** Populated sensors property (fixed error in init) +* FPGA (gen2): +** Adjust RX DC offset correction time constant +** Restore calibration path in RX/TX frontend +* Misc: +** MB EEPROM burner workaround for compiler bugs +** Clip the reported tune range to the dboard bandwidth +** Preserve bands when calculating overall tune range + +## Release 003.002.002 + +* USRP2/N2x0: +** Always resize socket send buffer to SRAM size +** Incremented FPGA image compat number to 7.2 +** Incremented firmware image compat number to 10.4 +* N2x0: +** GPSDO control tweak for some Firefly devices +** Fix for erasure logic in rare bricking cases +* E100: +** Fix RX run state for GPIOs controlled by ATR +* USRP1: +** Fix for multi-channel streaming +** Fix to support 0 RX or 0 TX DSPs +* SBX: +** Corrected lower limit on frequency range +* FPGA (gen2): +** Reset CIC decimator on start of burst +* Misc: +** Fix send to return zero on empty packets +** Perform version check on liborc + +## Release 003.002.001 + +* USRP2/N-Series: +** Firmware fix to shutoff streaming when socket unreachable +** Incremented firmware image compat number to 10.3 + +## Release 003.002.000 + +* USRP2/N-Series: +** Incremented FPGA image compat number to 7.1 +** Incremented firmware image compat number to 10.2 +** Removed mimo_mode device addr argument +** Support for rev4 N2XX motherboards +* USRP-E100: +** Removed the need for clock recovery +** Incremented FPGA image compat number to 5 +** Incremented kernel module compat number to 2 +** Added support for dual receive DSPs +** Async messages independent from RX path +* WBX: +** Support for rev3 daughterboards +* DBSRX2: +** Rounding fix for LO tuning error +* Packet handler: +** Overall performance improvements +** Timestamps for packet fragments +** Overflow message on dropped packets +* Conversion: +** Optional liborc conversion support +** SSE2 conversion alignment performance +** SSE2 conversion for complex doubles +* Windows: +** Performance improvements for UDP send +* Misc: +** Code reorganization with property tree +** Calibration support in gen2 FPGAs + +## Release 003.001.002 + +* N-Series: +** Fix UART communication for GPSDO +* XCVR2450: +** Fix for descontructor throwing on hardware disconnect + +## Release 003.001.001 + +* USRP1: +** Fixed lock up in logging facility under MSVC +* USRP2/N-Series: +** Handle exceptions thrown in device locker loop +** Connected internal GPSDO PPS signal in FPGA +* WBX +** Keep mixers on between bursts to maintain phase offsets + +## Release 003.001.000 + +* USRP2/N-Series: +** Incremented FPGA compat number to 6 +** Incremented firmware compat number to 10 +** Created all-in-one bootloader for N-series +** Lock open devices per process +** USRP N-Series internal GPSDO Support +** Discovery works with out-of-date images +** Net and card burner: python 3.0 support +** Net burner: tkinter + windows thread fix +** Card burner: device selection validation +* USRP-E100: +** Incremented FPGA compat number to 4 +** FPGA VRT packet framer correct length +** Fix auxiliary ADC read back for AD9862 +** Sync TX and RX daughterbord clocks +** Fix daughterboard clock rates after re-clock event +* USRP1: +** Fix TX under remainder conditions +** Fixed RX multi-channel mapping +* Daughterboards: +** Added support for TVRX2 daughterboard +** Added support for SBX daughterboard +** Added support for WBX granddaughterboards +** Application notes for sensors and IF +* Windows: +** MinGW and Cygwin support (thanks Don) +** Fix calling convention on libusb callbacks +* Misc: +** Added logging and messaging facilities +** Deprecated API in utils/warning.hpp +** Fixed race condition in device discovery/factory + +## Release 003.000.001 + +* RFX400: fix for transmit capability +* USRP1: fix for axillary ADC read +* Windows: statically link libusb +* Windows: install dll into runtime path +* Linux: automatically set LIB_SUFFIX on rh-64 systems +* USRP-E100: fix - set FPGA tick rate on re-clock event +* build: various work on build system +* build: include FPGA and firmware images in installers + +## Release 003.000.000 + +Initial (formal) release, no changes to mention. diff --git a/README.md b/README.md new file mode 100644 index 000000000..8d78c4f10 --- /dev/null +++ b/README.md @@ -0,0 +1,71 @@ +USRP Hardware Driver (UHDâ„¢) Software +======================================== + +Welcome to the UHDâ„¢ software distribution! UHD is the free & open-source +software driver and API for the Universal Software Radio Peripheral (USRPâ„¢) SDR +platform, created and sold by Ettus Research, LLC. + +UHD supports all Ettus Research USRPâ„¢ hardware, including all motherboards and +daughterboards, and the combinations thereof. + +## Documentation + +The [UHD Homepage](http://code.ettus.com/redmine/ettus/projects/uhd/wiki), +through which you can find installation instructions, documentation, and further +information, is the primary source of UHD documentation and "Getting +Started"-type guides. + +For technical documentation related to USRPâ„¢ hardware or UHD system +design, check out the [UHD Manual](http://files.ettus.com/uhd_docs/manual/html/). + +If you are looking for API documentation, check out the following resources: + +* [Doxygen](http://files.ettus.com/uhd_docs/doxygen/html/index.html) +* [Coding to the API](http://files.ettus.com/uhd_docs/manual/html/coding.html) +* [Device Streaming](http://files.ettus.com/uhd_docs/manual/html/stream.html) + +Additionally, be sure to check out the Ettus Research +[FAQ](http://www.ettus.com/kb/detail/frequently-asked-questions), and the +[Knowledge Base](http://www.ettus.com/kb) for useful application notes and +tutorials. + +## OS Support + +UHD is primarily developed on Linux, but we also test and support the following +operating systems. + +* Linux (any distribution) +* Mac OSX (PPC and Intel) +* Windows 7/Vista/XP/2000 + +## Applications + +UHD can be used to build stand-alone applications with USRPâ„¢ hardware, or with +third-party applications. Some common toolkits / frameworks are: + +* [GNURadio](http://code.ettus.com/redmine/ettus/projects/uhd/wiki/GNU_Radio_UHD) +* [LabVIEW](http://joule.ni.com/nidu/cds/view/p/id/2679/lang/en) +* [Simulink](http://www.mathworks.com/discovery/sdr/usrp.html) +* [OpenBTS](http://wush.net/trac/rangepublic/wiki/BuildInstallRun) +* [Iris](http://www.softwareradiosystems.com/redmine/projects/iris/wiki) +* [Redhawk](https://github.com/redhawksdr) +* [Amarisoft LTE eNodeB](http://www.amarisoft.com/?p=amarilte) + +## Directories + +__host/__ + +The source code for the user-space driver. + +__firmware/__ + +The source code for all microprocessors in USRP hardware. + +__fpga/__ + +The source code for the UHD FPGA images. + +__images/__ + +This contains the package builder for FPGA and firmware images. + diff --git a/README.txt b/README.txt deleted file mode 100644 index 64066d522..000000000 --- a/README.txt +++ /dev/null @@ -1,19 +0,0 @@ -######################################################################## -## Welcome to the USRP source code tree -######################################################################## - -host/ - - Description: source code for user-space driver - -firmware/ - - Description: source code for various micro processors - -fpga/ - - Description: source code for FPGA designs - -images/ - - Description: package builder for FPGA and firmware images diff --git a/firmware/README.md b/firmware/README.md new file mode 100644 index 000000000..08340603d --- /dev/null +++ b/firmware/README.md @@ -0,0 +1,48 @@ +Firmware for USRP Devices +======================================================== + +## fx2/ + +__Description:__ This is the firmware for the FX2 USB PHY. + +__Devices:__ USRP1 and B100 devices. + +__Tools:__ sdcc, cmake + +__Build Instructions:__ + +1. mkdir `` +2. cd `` +3. cmake `` +4. make + +## octoclock/ + +__Description:__ Firmware for the Octoclock device. + +__Devices:__ Octoclock. + +__Tools:__ avrtools, cmake + +__Build Instructions:__ Run `make` from the Octoclock source directory. + +## zpu/ + +__Description:__ Firmware for the soft CPUs in the UHD FPGA images. + +__Devices:__ USRP2 and N-Series devices. + +__Tools:__ zpu-gcc, cmake + +This code requires the gcc-zpu tool-chain which can be found here: + +http://opensource.zylin.com/zpudownload.html + +zpu-elf-gcc should be in your `$PATH` + +__Build Instructions:__ + +1. mkdir `` +2. cd `` +3. cmake `` +4. make diff --git a/firmware/README.txt b/firmware/README.txt deleted file mode 100644 index 1c233de1d..000000000 --- a/firmware/README.txt +++ /dev/null @@ -1,31 +0,0 @@ -######################################################################## -# Firmware for USRP devices -######################################################################## - -fx2/ - - Description: firmware for FX2 device - - Devices: USRP1 and B100 - - Tools: sdcc, cmake - - Build Instructions: - 1) mkdir - 2) cd - 3) cmake - 4) make - -zpu/ - - Description: firmware for soft CPU in FPGA - - Devices: USRP2 and N Series - - Tools: zpu-gcc, cmake - - Build Instructions: - 1) mkdir - 2) cd - 3) cmake - 4) make diff --git a/firmware/fx2/AUTHORS b/firmware/fx2/AUTHORS deleted file mode 100644 index c9cd35778..000000000 --- a/firmware/fx2/AUTHORS +++ /dev/null @@ -1,4 +0,0 @@ -Eric Blossom -Josh Blum -Thomas Tsou -Nick Foster diff --git a/firmware/octoclock/Makefile b/firmware/octoclock/Makefile index 517dee4c5..acf26f617 100644 --- a/firmware/octoclock/Makefile +++ b/firmware/octoclock/Makefile @@ -1,6 +1,19 @@ # # Copyright 2009 Ettus Research LLC # +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . +# ################################################## # Compiler @@ -19,7 +32,6 @@ CFLAGS = -std=gnu99 -O2 ################################################## # Files ################################################## -HDRS = OctoClock-io.h SRCS = OctoClock.c TARGET = octoclock_fw @@ -52,5 +64,5 @@ $(TARGET).hex: $(TARGET).elf $(TARGET).elf: $(SRCS:.c=.o) $(CC) -mmcu=$(MMCU) $^ -o $@ -%.o: %.c $(HDRS) Makefile +%.o: %.c Makefile $(CC) -mmcu=$(MMCU) -c $< -o $@ $(CFLAGS) diff --git a/firmware/octoclock/OctoClock-io.h b/firmware/octoclock/OctoClock-io.h deleted file mode 100644 index 88cd1499b..000000000 --- a/firmware/octoclock/OctoClock-io.h +++ /dev/null @@ -1,70 +0,0 @@ -/* - * Copyright 2009 Ettus Research LLC - */ - -#ifndef IO_H -#define IO_H - -#include -#include - - -typedef int8_t i8; -typedef int16_t i16; -typedef int32_t i32; -typedef int64_t i64; - - -typedef uint8_t u8; -typedef uint16_t u16; -typedef uint32_t u32; -typedef uint64_t u64; - - -typedef float f32; -typedef double f64; -typedef long double f128; - -typedef int error_indicator; /* A type for functions, usually... */ -typedef unsigned int boolean; /* "natural" type */ - -typedef char c8; /* 8-bit character */ -typedef unsigned char uc8; /* 8-bit character, unsigned*/ -/* it is sometimes useful to*/ -/* make the distinction*/ - -#ifdef FALSE -#undef FALSE -#endif -#define FALSE (0) - -#ifdef TRUE -#undef TRUE -#endif -#define TRUE (!FALSE) - -#define is :{ -#define esac break;} - - -// This other crap can be deleted, below, between the #if 0 and #endif inclusive - -#if 0 - -#define IO_PX(port, pin) ((uint8_t)(((port - 'A') << 4) + pin)) -#define IO_PA(pin) IO_PX('A', pin) -#define IO_PB(pin) IO_PX('B', pin) -#define IO_PC(pin) IO_PX('C', pin) -#define IO_PD(pin) IO_PX('D', pin) - -typedef const uint8_t io_pin_t; - -void io_output_pin(io_pin_t pin); -void io_input_pin(io_pin_t pin); -void io_set_pin(io_pin_t pin); -void io_clear_pin(io_pin_t pin); -bool io_test_pin(io_pin_t pin); - -#endif //if 0 - -#endif /* IO_H */ diff --git a/firmware/octoclock/OctoClock.c b/firmware/octoclock/OctoClock.c index d81a93fc3..f73c30885 100644 --- a/firmware/octoclock/OctoClock.c +++ b/firmware/octoclock/OctoClock.c @@ -1,844 +1,589 @@ /* - * OctoClock.c - * - * V1.00 -- May 2013 - * - * - * V1.03 -- Correct the switch to be UP for Internal and DOWN for External - * This means that the bat handle "points at" (sort of) the lower-left LED, which - * is the "STATUS" LED, which gets lit up when the external 10 MHz is present - * The "10 MHz Signal Detect" code accepts a very wide range of "10 MHz" signals - * 23 April 2013 - * + * Copyright 2013 Ettus Research LLC * - * V1.02 -- Make LEDs consistent with Chassis - Top LED is INTERNAL; middle is EXTERNAL; bottom is STATUS + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. * - * STATUS is ON if the 10 MHz external input is present. 19 April 2013 + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +/* + * Welcome to the firmware code for the USRP Octoclock accessory product! * - * V1.01: Modify TI chip initialization to be in differentail mode - * which allows 10 MHz input down to 0.1 Volts according to the datasheet. + * Notes regarding this firmware: + * NOT in M103 compatibility mode + * no WDT + * CKOPT full rail-to-rail + * xtal osc + * 16K CK (16K clock cycles) + * additional delay 65ms for Crystal Oscillator + * slowly rising power * + * These settings are very conservative. If a lower power oscillator is + * required, change CKOPT to '1' (UNPROGRAMMED). * - * New Version that supports CLOCK board Version 1.0 + * M103C = [ ] + * WDTON = [ ] + * OCDEN = [ ] + * JTAGEN = [X] + * SPIEN = [X] + * EESAVE = [ ] + * BOOTSZ = 4096W_F000 + * BOOTRST = [ ] + * CKOPT = [X] + * BODLEVEL = 2V7 + * BODEN = [ ] + * SUT_CKSEL = EXTHIFXTALRES_16KCK_64MS * - * Author: Michael@Cheponis.Com with code borrowed liberally from - * previous AVR projects + * EXTENDED = 0xFF (valid) + * HIGH = 0x89 (valid) + * LOW = 0xFF (valid) * */ -/* - * Copyright 2013 Ettus Research LLC - */ - - - - - - -/* CLKSEL0 = 1 SUT1..0 is 11 CKOPT = 0 CKSEL3..1 is 111 => big output swing, long time to start up */ -/* - -NOT in M103 compatibility mode, no WDT, CKOPT full rail-to-rail xtal osc, 16K CK (16K clock cycles), -additional delay 65ms for Crystal Oscillator, slowly rising power - -Very conservative settings; if lower power osc required, change CKOPT to '1' (UNPROGRAMMED) or, if you will, -CKOPT = [ ] - - - -M103C = [ ] -WDTON = [ ] -OCDEN = [ ] -JTAGEN = [X] -SPIEN = [X] -EESAVE = [ ] -BOOTSZ = 4096W_F000 -BOOTRST = [ ] -CKOPT = [X] -BODLEVEL = 2V7 -BODEN = [ ] -SUT_CKSEL = EXTHIFXTALRES_16KCK_64MS - -EXTENDED = 0xFF (valid) -HIGH = 0x89 (valid) -LOW = 0xFF (valid) - - -*/ - -// No interrupts are required - -#include "OctoClock-io.h" - +#include +#include #include #include - #ifdef On #undef On #endif #ifdef Off -#undef OFf +#undef Off #endif -#define Off (0) -#define On (!Off) - +#define Off (0) +#define On (!Off) -// Important for the Serial Port, not used at the moment -#define FOSC (7372800) -#define BAUD (115200) +#ifdef FALSE +#undef FALSE +#endif -#define MYUBRR FOSC/16/BAUD-1 +#ifdef TRUE +#undef TRUE +#endif +#define FALSE (0) +#define TRUE (!FALSE) -#define wait() for(u16 u=14000; u; u--) asm("nop"); +// Important for the Serial Port, not used at the moment +#define FOSC (7372800) +#define BAUD (115200) +#define MYUBRR FOSC/16/BAUD-1 -enum LEDs {Top,Middle,Bottom}; // Top is 0, Mid is 1, and Bottom is 2 +#define wait() for(uint16_t u=14000; u; u--) asm("nop"); -void -led(enum LEDs which, int turn_it_on){ - - u8 LED = 0x20 << which; // selects the proper bit - - if(turn_it_on) - PORTC |= LED; - else - PORTC &= ~LED; - -} +#define CLK (PA0) // Shift by 0 bits +#define CE_ (PA1) // Is really the "Chip Disable" signal, as Hi disables SPI +#define MOSI (PA2) +#define MISO (PA3) +#define PD_ (PA4) +#define SYNC_ (PA5) +// Top is 0, Mid is 1, and Bottom is 2 +enum LEDs {Top, Middle, Bottom}; enum TI_Input_10_MHz {Primary_GPS, Secondary_Ext}; -void setup_TI_CDCE18005(enum TI_Input_10_MHz); - - +enum Levels {Lo, Hi}; +void led(enum LEDs which, int turn_it_on) { -/***************************************************************************************** + // selects the proper bit + uint8_t LED = 0x20 << which; - SPI routines + if(turn_it_on) + PORTC |= LED; + else + PORTC &= ~LED; +} -******************************************************************************************/ +/******************************************************************************* +* SPI routines +*******************************************************************************/ +/* All macros evaluate to compile-time constants */ -/* All macros evaluate to compile-time constants */ - -/* *** helper macros * * */ - /* turn a numeric literal into a hex constant - (avoids problems with leading zeros) - 8-bit constants max value 0x11111111, always fits in unsigned long + * (avoids problems with leading zeros) + * 8-bit constants max value 0x11111111, always fits in unsigned long */ - #define HEX__(n) 0x##n##LU - +#define HEX__(n) 0x##n##LU + /* 8-bit conversion function */ - #define B8__(x) ((x&0x0000000FLU)?1:0) \ - +((x&0x000000F0LU)?2:0) \ - +((x&0x00000F00LU)?4:0) \ - +((x&0x0000F000LU)?8:0) \ - +((x&0x000F0000LU)?16:0) \ - +((x&0x00F00000LU)?32:0) \ - +((x&0x0F000000LU)?64:0) \ - +((x&0xF0000000LU)?128:0) - -// Damn, that is SERIOUS magic ... ;-) Yes, I know how it works -// but it's pretty cool.... - - -/* *** user macros *** */ - -/* for upto 8-bit binary constants */ - #define Bits_8(d) ((unsigned char)B8__(HEX__(d))) - -/* for upto 16-bit binary constants, MSB first */ - #define Bits_16(dmsb,dlsb) (((unsigned short)Bits_8(dmsb)<<8) \ - + Bits_8(dlsb)) - -/* for upto 32-bit binary constants, MSB first */ - #define Bits_32(dmsb,db2,db3,dlsb) (((unsigned long)Bits_8(dmsb)<<24) \ - + ((unsigned long)Bits_8(db2)<<16) \ - + ((unsigned long)Bits_8(db3)<<8) \ - + Bits_8(dlsb)) - +#define B8__(x) ((x&0x0000000FLU)?1:0) \ + +((x&0x000000F0LU)?2:0) \ + +((x&0x00000F00LU)?4:0) \ + +((x&0x0000F000LU)?8:0) \ + +((x&0x000F0000LU)?16:0) \ + +((x&0x00F00000LU)?32:0) \ + +((x&0x0F000000LU)?64:0) \ + +((x&0xF0000000LU)?128:0) + +/* for up to 8-bit binary constants */ +#define Bits_8(d) ((unsigned char)B8__(HEX__(d))) + +/* for up to 16-bit binary constants, MSB first */ +#define Bits_16(dmsb,dlsb) (((unsigned short)Bits_8(dmsb)<<8) \ + + Bits_8(dlsb)) + +/* for up to 32-bit binary constants, MSB first */ +#define Bits_32(dmsb,db2,db3,dlsb) (((unsigned long)Bits_8(dmsb)<<24) \ + + ((unsigned long)Bits_8(db2)<<16) \ + + ((unsigned long)Bits_8(db3)<<8) \ + + Bits_8(dlsb)) + /* Sample usage: - Bits_8(01010101) = 85 - Bits_16(10101010,01010101) = 43605 - Bits_32(10000000,11111111,10101010,01010101) = 2164238933 + * Bits_8(01010101) = 85 + * Bits_16(10101010,01010101) = 43605 + * Bits_32(10000000,11111111,10101010,01010101) = 2164238933 */ - - -enum CDCE18005 {Reg0, Reg1, Reg2, Reg3, Reg4, Reg5, Reg6, Reg7, Reg8_Status_Control, - Read_Command=0xE, RAM_EEPROM_Unlock=0x1F, RAM_EEPROM_Lock=0x3f} - TI_CDCE18005; - -// Table of 32-bit constants to be written to the TI chip's registers. - -// Damn, inconsistent data sheet! Special settigns see p35 of TI datasheet +enum CDCE18005 { + Reg0, Reg1, Reg2, Reg3, Reg4, Reg5, Reg6, Reg7, + Reg8_Status_Control, + Read_Command=0xE, + RAM_EEPROM_Unlock=0x1F, + RAM_EEPROM_Lock=0x3f +} TI_CDCE18005; +// Table of 32-bit constants to be written to the TI chip's registers. These are +// from the "Special Settings" on Page 35 of the datasheet. // For the GPS's 10 MHz output -u32 table_Pri_Ref[] = { - - Bits_32(1,01010100,0,0), // Reg 0 - Bits_32(1,01010100,0,0), // Outputs LVCMOS Positive&Negative Active - Non-inverted - Bits_32(1,01010100,0,0), - Bits_32(1,01010100,0,0), - Bits_32(1,01010100,0,0), // All have output divide ratio to be 1; Aux Output is OFF - - Bits_32(0,0,1001,11010100), // Reg 5 LVCMOS in; p31 of TI datasheet - - Bits_32(1,0,0010000,0), // Reg 6 // SCAS863A – NOVEMBER 2008 – REVISED JUNE 2011 - - Bits_32(1,01000000,0,0), // Reg 7 - // 76543210 - Bits_32(0,0,1,10000000) // Reg8 Status/Control +uint32_t table_Pri_Ref[] = { + Bits_32(1,01010100,0,0), // Reg 0 + Bits_32(1,01010100,0,0), // Outputs LVCMOS Positive&Negative Active - Non-inverted + Bits_32(1,01010100,0,0), + Bits_32(1,01010100,0,0), + Bits_32(1,01010100,0,0), // All have output divide ratio to be 1; Aux Output is OFF + Bits_32(0,0,1001,11010100), // Reg 5 LVCMOS in; p31 of TI datasheet + Bits_32(1,0,0010000,0), // Reg 6 // SCAS863A – NOVEMBER 2008 – REVISED JUNE 2011 + Bits_32(1,01000000,0,0), // Reg 7 + Bits_32(0,0,1,10000000) // Reg8 Status/Control }; - -// Looks like it's doing the correct thing re: SPI interface -// This is *definitely* AC coupled. I removed those resistors to +3.3 and ground -// signal looked no different with differential measurement. Added 240+470 to -// center tap of secondary side to bias up to approx 1.2V for proper LVDS -// -// For the External 10 MHz input LVDS with external termination -- Effectively DC coupled - -u32 table_Sec_Ref[] = { - Bits_32(0001,01010100,0,100000),// Reg 0 -- use Secondary Reference for all channels - Bits_32(0001,01010100,0,100000),// Outputs LVCMOS Positive&Negative Active - Non-inverted - Bits_32(0001,01010100,0,100000), - Bits_32(0001,01010100,0,100000), - Bits_32(0001,01010100,0,100000), - -// Bits_32(0,0,00001000,10010111), // Reg 5 LVDS with External Termination p32 of TI datasheet -// Bits_32(0,0,00001000,11010111), // Reg 5 LVDS with INTERNAL Termination p32 of TI datasheet - -// May 2013 -- Turn OFF the LVDS Safe Mode, as it supposedly causes input thresholds to be increased. - -// Bits_32(0,0,1001,10011011), // Reg 5, try again. Pretty soon, try new board... - - Bits_32(0,0,1,10011011), // Reg 5, Failsafe OFF b5.11 = 0 - - -// Bits_32(0,0,1001,11011011), // Reg 5, try again. Pretty soon, try new board... - // Try with DC input termination; bit 6 is a "1" 2013 March - // Seems to not work correctly. - - -// Bits_32(1,0,0000000,0), // Reg 6; note that 6.12 must be 1 for LVDS w/External Termination, 0 int -// Bits_32(1,0,0000000,0), // Reg 6; try Internal and DC coupling - Bits_32(1,0,10000,0), // Reg 6; try again - - Bits_32(1,01000000,0,0), - Bits_32(0,0,1,10000000) // Reg8 Status/Control +// For the External 10 MHz input LVDS with external termination, +// Effectively DC coupled +uint32_t table_Sec_Ref[] = { + Bits_32(0001,01010100,0,100000), // Reg 0 -- use Secondary Reference for all channels + Bits_32(0001,01010100,0,100000), // Outputs LVCMOS Positive&Negative Active - Non-inverted + Bits_32(0001,01010100,0,100000), + Bits_32(0001,01010100,0,100000), + Bits_32(0001,01010100,0,100000), + Bits_32(0,0,1,10011011), // Reg 5, Failsafe OFF b5.11 = 0 + Bits_32(1,0,10000,0), // Reg 6; try again + Bits_32(1,01000000,0,0), + Bits_32(0,0,1,10000000) // Reg8 Status/Control }; -//; Table 19 conflicts with Tables 5 thru 9 - in how LVCMOS outputs are defined +// Table 19 conflicts with Tables 5 thru 9 - in how LVCMOS outputs are defined // extra error in Table 9, for bits 24 and 25 -// -// Could combine these into just table[][] with 1st subscript being 0 or 1 for Primary or Secondary -// Maybe want to to that. +int table_size = sizeof (table_Pri_Ref) / sizeof(uint32_t); -int table_size = sizeof (table_Pri_Ref) / sizeof(u32); -//int table_size = 1; // Testing read and write of Register 0 -- don't want excess SPI transactions -//NOTE!!! Still need to shift left by 4 and OR in register, as defined in TI_CDCE18005 enum, above. +void set_bit(uint8_t bit_number, enum Levels bit_value) { - -enum Levels {Lo, Hi}; - -#define CLK (PA0) // Shift by 0 bits (PA.0) -#define CE_ (PA1) // Is really the "Chip Disable" signal, as Hi disables SPI -#define MOSI (PA2) -#define MISO (PA3) -#define PD_ (PA4) -#define SYNC_ (PA5) - -void -set_bit(u8 bit_number, enum Levels bit_value){ - - if(bit_value == Hi) - PORTA |= 1<> 4)], Control ); -// USART_Transmit( hex_table [0xf & portA], Control ); -// USART_Transmit(CR, Control); USART_Transmit(LF,Control); - - return (portA & 1<< bit_number) > 0 ? TRUE : FALSE; - //return (portA & 8) != 0; // It's always MISO, so nail it for the moment + uint8_t portA = PINA; + return (portA & 1<< bit_number) > 0 ? TRUE : FALSE; } - -void -send_SPI(u32 bits){ // Send 32 bits to TI chip, LSB first. -// Don't worry about reading any bits back at this -// time, although for production, may want to do that -// as an error-check / integrity check. +// Don't worry about reading any bits back at this time +void send_SPI(uint32_t bits) { + + // Basically, when the clock is low, one can set MOSI to anything, as it's + // ignored. + set_bit(CE_, Lo); // Start SPI transaction with TI chip + + // Send each bit, LSB first, add a bit of delay before the clock, and then + // toggle the clock line. + for (uint8_t i=0; i<32; i++) { + set_bit(MOSI, ((bits & (1UL<H on clock; (REALLY?) - set_bit(CLK, Hi); - set_bit(CLK, Lo); // Pulse the clock to clock in the bit - } -// USART_Transmit(CR, Control); USART_Transmit(LF,Control); - //set_bit(MOSI, Lo); // Not needed, but keeps all bits zeros except /CE when idle - set_bit(CE_, Hi); // OK, transaction is over -// USART_Transmit(CR, Control); USART_Transmit(LF,Control); + // OK, transaction is over + set_bit(CE_, Hi); } -// Takes about 7.6 ms to init all regs (as seen on scope) -// There is a very interesting phenomenon that is occurring --- The bit-to-bit time -// at the beginning of transmission is 15 usec. However, as the number of bits -// shifted to the left increases (as i increases in the for() loop ) -// the time between bits elongates. It's about 37 usec between bits -// 30 and 31 (the last 2 bits). It's kinda cool, because it's easy to -// know when the new word begins because the clock pulses will be -// closer together. - -// See if it checks: (15+37)/2 = 26 usec between average bits -// 32 bits * 9 words * 26 usec = 7.49 ms --- but have to add -// in the little bit of time that CE_ goes high; so 7.6 ms -// is a very reasonable number. (Assumes linear increase in -// time as the number of shifts goes up, which seems to -// work OK here.) -// -// Of course, using a table instead of doing those shifts all the -// time would fix this; but it (should not) doesn't matter for this -// SPI interface. -// -// So far, the first word looks good, and the beginning of writing -// Register 1 also looks good. -// +void reset_TI_CDCE18005() { + // First, reset the chip. Or, if you will, pull /SYNC low then high + set_bit(CE_, Hi); + set_bit(PD_, Lo); + wait(); + // Out of Power Down state + set_bit(PD_, Hi); + wait(); + set_bit(SYNC_, Lo); + wait(); + set_bit(SYNC_, Hi); - - - -// enum TI_Input_10_MHz {Primary_GPS, Secondary_Ext}; - -void -reset_TI_CDCE18005(){ -// First, reset the chip. Or, if you will, pull /SYNC low then high -set_bit(CE_, Hi); -set_bit(PD_, Lo); -wait(); // This should put the EEPROM bits into the RAM -- we don't care, but should init the chip - -set_bit(PD_, Hi); // Out of Power Down state -wait(); - -set_bit(SYNC_, Lo); -wait(); -set_bit(SYNC_, Hi); - -wait(); -// Now, by gosh, that darn chip ought to be fully enabled! -} - -void -setup_TI_CDCE18005(enum TI_Input_10_MHz which_input){ - // Send the table of data to init the clock distribution chip. Uses SPI. - u32 temp; - - //reset_TI_CDCE18005(); // This REALLY should not be necessary - - if(which_input == Primary_GPS){ - - for(u8 i=0; i>= 1; // get ready for next bit - NOTE: Only do this if we REALLY are putting in another bit - set_bit(CLK, Hi); // CPU is so slow, it easily meets setup & hold times - // 76543210 - if( get_bit(MISO) ) bits |= 0x80000000; // because we receive the LSB first - set_bit(CLK, Lo); // Pulse the clock to clock in the bit - } - set_bit(CE_, Hi); // OK, transaction is over - - return (u32)(bits >> 4); // Ditch the lower 4 bits, which only contain the address + wait(); } -u32 -get_TI_CDCE18005(enum CDCE18005 which_register){ - u32 get_reg_value; - - get_reg_value = 0; - get_reg_value = (0xf0 & which_register << 4) | Read_Command; - send_SPI(get_reg_value); // This tells the TI chip to send us the reg. value requested - return receive_SPI(); -}; +void setup_TI_CDCE18005(enum TI_Input_10_MHz which_input) { + // Send the table of data to init the clock distribution chip. Uses SPI. + uint32_t temp; + + if(which_input == Primary_GPS) { + for(uint8_t i=0; i>= 1; + set_bit(CLK, Hi); + if( get_bit(MISO) ) bits |= 0x80000000; + set_bit(CLK, Lo); + } + // OK, transaction is over + set_bit(CE_, Hi); + // Ditch the lower 4 bits, which only contain the address + return (uint32_t)(bits >> 4); +} +uint32_t get_TI_CDCE18005(enum CDCE18005 which_register){ + uint32_t get_reg_value = 0; + get_reg_value = (0xf0 & which_register << 4) | Read_Command; + // This tells the TI chip to send us the reg. value requested + send_SPI(get_reg_value); + return receive_SPI(); +} +bool check_TI_CDCE18005(enum TI_Input_10_MHz which_input, + enum CDCE18005 which_register) { + if(which_input == Primary_GPS){ + uint32_t read_value = get_TI_CDCE18005(which_register); + return read_value == table_Pri_Ref[which_register]; + } else { + uint32_t read_value = get_TI_CDCE18005(which_register); + return read_value == table_Sec_Ref[which_register]; + } +} -void -Setup_Atmel_IO_Ports(){ - - -///////////////////////////////////////////////////////////////////////////// +void Setup_Atmel_IO_Ports() { /* * PORT A - * - *pin# Sig Our Functional Name * - * p51 PA0 CLK_CDCE to U205 pin 24 -- L-->H edge latches MOSI and MISO in CDCE18005 - * p50 PA1 CE_CDCE Low = Chip Enabled for SPI comm to U205 pin 25 - * p49 PA2 MOSI_CDCE Goes to CDCE18005 - U205 pin 23 - * p48 PA3 MISO_CDCE Input Comes from U205 pin 22 - * p47 PA4 PD_CDCE Low = Chip is in Power-Down state; is Hi for normal operation U205 pin 12 - * p46 PA5 SYNC_CDCE Low = Chip is sync'd with interal dividers; Hi for normal operation U205 pin 14 - * p45 PA6 PPS_SEL Low --> PPS_EXT selected; Hi -> PPS_GPS selected; to U203 pin 1 - * p44 PA7 gps_lock Input Comes from M9107 - U206 pin 3 + * pin# Sig Our Functional Name + * + * p51 PA0 CLK_CDCE to U205 pin 24 -- L-->H edge latches MOSI and MISO in CDCE18005 + * p50 PA1 CE_CDCE Low = Chip Enabled for SPI comm to U205 pin 25 + * p49 PA2 MOSI_CDCE Goes to CDCE18005 - U205 pin 23 + * p48 PA3 MISO_CDCE Input Comes from U205 pin 22 + * p47 PA4 PD_CDCE Low = Chip is in Power-Down state; is Hi for normal operation U205 pin 12 + * p46 PA5 SYNC_CDCE Low = Chip is sync'd with interal dividers; Hi for normal operation U205 pin 14 + * p45 PA6 PPS_SEL Low --> PPS_EXT selected; Hi -> PPS_GPS selected; to U203 pin 1 + * p44 PA7 gps_lock Input Comes from M9107 - U206 pin 3 * */ -// Bit #: 76543210 -PORTA = Bits_8(00110010); // /pd_cdcd, /sync_code, /ce need to be 1 (disabled) to start -DDRA = 1< -Matt Ettus -Josh Blum -Nick Foster diff --git a/firmware/zpu/README b/firmware/zpu/README deleted file mode 100644 index ba0aa11eb..000000000 --- a/firmware/zpu/README +++ /dev/null @@ -1,16 +0,0 @@ -######################################################################## -# ZPU firmware code for USRP2 and N Series -######################################################################## -This code requires the gcc-zpu tool-chain which can be found here: - -http://opensource.zylin.com/zpudownload.html - -zpu-elf-gcc should be in your $PATH - -######################################################################## -# Run the following commands to build -######################################################################## -mkdir build -cd build -cmake ../ -make diff --git a/host/AUTHORS.txt b/host/AUTHORS.txt deleted file mode 100644 index 44b7516cd..000000000 --- a/host/AUTHORS.txt +++ /dev/null @@ -1,40 +0,0 @@ -Matt Ettus - matt@ettus.com - USRP1 FPGA code - USRP2/N200 FPGA code - USRP-E100 FPGA code - -Josh Blum - josh@ettus.com - driver framework - USRP2/N200 firmware - USRP2/N200 host code - USRP-E100 host code - Basic/LF host code - XCVR2450 host code - RFX Series host code - -Jason Abele - jason@ettus.com - RFX Series host code - WBX host code - DBSRX host code - DBSRX2 host code - -Eric Blossom - eb@comsec.com - USRP1 firmware - USRP2 firmware - -Tom Tsou - ttsou@vt.edu - UHD-USB framework - LIBUSB host code - USRP1 host code - USRP1 firmware - -Nick Foster - nick@ettus.com - LIBUSB host code - USRP1 host code - TVRX host code - USRP-N200 firmware - USRP-N200 host code - -Philip Balister - philip@opensdr.com - USRP-E100 kernel module - USRP-E100 utilities diff --git a/host/LICENSE b/host/LICENSE new file mode 100644 index 000000000..9aa03b39b --- /dev/null +++ b/host/LICENSE @@ -0,0 +1,12 @@ +This program is free software: you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation, either version 3 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . diff --git a/host/LICENSE.txt b/host/LICENSE.txt deleted file mode 100644 index 9aa03b39b..000000000 --- a/host/LICENSE.txt +++ /dev/null @@ -1,12 +0,0 @@ -This program is free software: you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation, either version 3 of the License, or -(at your option) any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this program. If not, see . diff --git a/host/README.txt b/host/README.txt deleted file mode 100644 index 0e8e62ac1..000000000 --- a/host/README.txt +++ /dev/null @@ -1,43 +0,0 @@ -############################################### -# Ettus Research - USRP Hardware Driver -############################################### -The hardware driver for Ettus Research products. - -############################################### -# Supported USRP Motherboards -############################################### -USRP1 -USRP2 -N200 -N210 -E100 -E110 -B100 -B200 - -############################################### -# Supported USRP Daughterboards -############################################### -Basic RX -Basic TX -LF RX -LF TX -RFX Series -XCVR 2450 -WBX + Simple GDB -DBSRX -DBSRX2 -TVRX -TVRX2 -SBX -CBX - -############################################### -# Documentation -############################################### -Online documentation available at: -http://code.ettus.com/redmine/ettus/projects/uhd/wiki - -The build system can generate the html for the manual and Doxygen. -Docutils and Doxygen are required to build the html docs. -See the docs directory for the manual source (reStructuredText). diff --git a/host/apps/omap_debug/README b/host/apps/omap_debug/README deleted file mode 100644 index bbe0c2cc4..000000000 --- a/host/apps/omap_debug/README +++ /dev/null @@ -1 +0,0 @@ -OMAP development tools go here diff --git a/host/cmake/Modules/FindUSB1.cmake b/host/cmake/Modules/FindUSB1.cmake index a494e1350..b2e4d118c 100644 --- a/host/cmake/Modules/FindUSB1.cmake +++ b/host/cmake/Modules/FindUSB1.cmake @@ -8,7 +8,8 @@ PKG_CHECK_MODULES(PC_LIBUSB QUIET libusb-1.0) FIND_PATH(LIBUSB_INCLUDE_DIRS NAMES libusb.h - HINTS $ENV{LIBUSB_DIR}/include ${PC_LIBUSB_INCLUDEDIR} + HINTS $ENV{LIBUSB_DIR}/include $ENV{LIBUSB_DIR}/include/libusb-1.0 + ${PC_LIBUSB_INCLUDEDIR} ${PC_LIBUSB_INCLUDEDIR}/libusb-1.0 PATHS /usr/local/include/libusb-1.0 /usr/local/include /usr/include/libusb-1.0 /usr/include /opt/local/include/libusb-1.0 diff --git a/host/docs/uhd_find_devices.1 b/host/docs/uhd_find_devices.1 index 7dc0dd470..08f9a789c 100644 --- a/host/docs/uhd_find_devices.1 +++ b/host/docs/uhd_find_devices.1 @@ -9,9 +9,6 @@ The UHD package is the universal hardware driver for Ettus Research products. The goal is to provide a host driver and API for current and future Ettus Research products. Users will be able to use the UHD driver standalone or with 3rd party applications. -.LP -Hardware supporting UHD drivers includes the Universal Software Radio -Peripheral, or USRP, available in several models. .SH SYNOPSIS .B uhd_find_devices [OPTIONS] .SH OPTIONS diff --git a/host/docs/uhd_images_downloader.1 b/host/docs/uhd_images_downloader.1 index ece826cb5..28310dd37 100644 --- a/host/docs/uhd_images_downloader.1 +++ b/host/docs/uhd_images_downloader.1 @@ -7,9 +7,6 @@ products. The goal of the UHD is to provide a host driver and API for current and future Ettus Research products. Users will be able to use the UHD driver standalone or with 3rd party applications. .LP -Hardware supporting UHD drivers includes the Universal Software Radio -Peripheral, or USRP, available in several models. -.LP This program installs the firmware and FPGA binaries from Ettus Research matching this UHD driver release onto the host system. If the uhd-images package is installed, there is no need to run this installer. diff --git a/host/docs/uhd_usrp_probe.1 b/host/docs/uhd_usrp_probe.1 index 7e82bf99a..a6c7150ee 100644 --- a/host/docs/uhd_usrp_probe.1 +++ b/host/docs/uhd_usrp_probe.1 @@ -1,6 +1,6 @@ .TH "uhd_usrp_probe" 1 "3.5.1" UHD "User Commands" .SH NAME -uhd_usrp_probe \- Universal Hardware Driver Peripheral Report Utility +uhd_usrp_probe \- USRP Hardware Driver Peripheral Report Utility .SH DESCRIPTION Report detailed information on UHD-supported Software Radio Peripherals attached by USB, network, or embedded configuration. diff --git a/host/lib/usrp/README b/host/lib/usrp/README deleted file mode 100644 index 344209179..000000000 --- a/host/lib/usrp/README +++ /dev/null @@ -1,15 +0,0 @@ -######################################################################## -# lib USRP directories: -######################################################################## - -dboard: - Daughterboard implementation code for all USRP daughterboards - -usrp1: - Implementation code for the USB-based USRP Classic motherboard. - -usrp2: - Implementation code for USRP2, USRP-N200, and USRP-N210. - -usrp_e100: - Implementation code for USRP-E100. diff --git a/images/Makefile b/images/Makefile index 2e3bcfd26..6b1cfcfc4 100644 --- a/images/Makefile +++ b/images/Makefile @@ -117,7 +117,7 @@ $(_usrp_b100_fpga_2rx_bin): $(GLOBAL_DEPS) endif ######################################################################## -# USRP2 and N Series firmware +# USRP2 and N-Series firmware ######################################################################## ifdef HAS_ZPU_GCC @@ -143,7 +143,7 @@ $(_usrp_n210_fw_bin): $(_usrp2_fw_bin) endif ######################################################################## -# USRP2 fpga +# USRP2 FPGA ######################################################################## ifdef HAS_XTCLSH @@ -159,7 +159,7 @@ $(_usrp2_fpga_bin): $(GLOBAL_DEPS) endif ######################################################################## -# USRP-N200 R2/R3 fpga +# USRP N200 R2/R3 FPGA ######################################################################## ifdef HAS_XTCLSH @@ -185,7 +185,7 @@ $(_usrp_n200_r2_fpga_bin): $(_usrp_n200_r3_fpga_bin) endif ######################################################################## -# USRP-N210 R2/R3 fpga +# USRP N210 R2/R3 FPGA ######################################################################## ifdef HAS_XTCLSH @@ -211,7 +211,7 @@ $(_usrp_n210_r2_fpga_bin): $(_usrp_n210_r3_fpga_bin) endif ######################################################################## -# USRP-N200 R4 fpga +# USRP N200 R4 FPGA ######################################################################## ifdef HAS_XTCLSH @@ -231,7 +231,7 @@ $(_usrp_n200_r4_fpga_bit): $(_usrp_n200_r4_fpga_bin) endif ######################################################################## -# USRP-N210 R4 fpga +# USRP N210 R4 FPGA ######################################################################## ifdef HAS_XTCLSH @@ -251,7 +251,7 @@ $(_usrp_n210_r4_fpga_bit): $(_usrp_n210_r4_fpga_bin) endif ######################################################################## -# USRP-E100 fpga +# USRP E100 FPGA ######################################################################## ifdef HAS_XTCLSH @@ -267,7 +267,7 @@ $(_usrp_e100_fpga_bin): $(GLOBAL_DEPS) endif ######################################################################## -# USRP-E110 fpga +# USRP E110 FPGA ######################################################################## ifdef HAS_XTCLSH diff --git a/images/README.md b/images/README.md new file mode 100644 index 000000000..b9e3232aa --- /dev/null +++ b/images/README.md @@ -0,0 +1,35 @@ +UHD Firmware and FPGA Images Builder +=============================================================== + +The images directory contains the following: +* A Makefile for building firmware and FPGA images +* A CMake file for building an images package + +This provides a clean and organized way to build all of the firmware and FPGA +images, the source code for which is in the `firmware` and `fpga` directories +one level above this. + +The Makefile and build systems for the images are *probably* Unix-specific. +It's best to build the images on a Unix system with standard build tools. The +CMake package target will create an installable images package for your system. + +__To build the images (unix):__ + +1. `make clean` +2. `make images` + +__To build the package (unix):__ + +1. `mkdir build` +2. `cd build` +3. `cmake -DCPACK_GENERATOR= ../` +4. `make package` + +The package generator types are described here: +http://www.cmake.org/Wiki/CMake:CPackPackageGenerators + +__Fedora note:__ + +The sdcc binaries are prefixed with "sdcc-" which breaks the build. +However, /usr/libexec/sdcc contains properly named sdcc binaries. +`export PATH=${PATH}:/usr/libexec/sdcc` diff --git a/images/README.txt b/images/README.txt deleted file mode 100644 index 2f9c6a95e..000000000 --- a/images/README.txt +++ /dev/null @@ -1,25 +0,0 @@ -The images directory contains the following: - - a Makefile for building firmware and fpga images - - a CMake file for building an images package - -The Makefile and build systems for the images are probably Unix specific. -Its best to build the images on a Unix system with standard build tools. -The CMake package target will create an images package for your system. - -To build the images (unix): - make clean - make images - -To build the package (unix): - mkdir build - cd build - cmake -DCPACK_GENERATOR= ../ - make package - -The package generator types are described here: - http://www.cmake.org/Wiki/CMake:CPackPackageGenerators - -Fedora note: - The sdcc binaries are prefixed with "sdcc-" which breaks the build. - However, /usr/libexec/sdcc contains properly named sdcc binaries. - export PATH=${PATH}:/usr/libexec/sdcc -- cgit v1.2.3 From 9e47ad607b597954e786db6614f5b42123184ccd Mon Sep 17 00:00:00 2001 From: Ben Hilburn Date: Wed, 27 Nov 2013 12:11:23 -0800 Subject: Squashed merge of Coverity fixes. --- host/examples/network_relay.cpp | 17 +++++----- host/examples/test_dboard_coercion.cpp | 18 +++++------ host/examples/test_messages.cpp | 5 +-- host/include/uhd/config.hpp | 3 ++ host/include/uhd/transport/zero_copy.hpp | 4 ++- host/include/uhd/utils/atomic.hpp | 4 +++ host/lib/convert/convert_fc32_item32.cpp | 17 +++++----- host/lib/convert/convert_pack_sc12.cpp | 2 +- host/lib/convert/convert_unpack_sc12.cpp | 2 +- host/lib/convert/sse2_fc32_to_sc16.cpp | 38 ++++++++++++++++------ host/lib/convert/sse2_sc16_to_fc32.cpp | 38 ++++++++++++++++------ host/lib/transport/super_recv_packet_handler.hpp | 3 +- host/lib/transport/super_send_packet_handler.hpp | 2 +- host/lib/transport/udp_zero_copy.cpp | 3 +- host/lib/types/tune.cpp | 7 +++-- host/lib/usrp/b100/usb_zero_copy_wrapper.cpp | 1 + host/lib/usrp/b200/b200_iface.cpp | 17 +++++++--- host/lib/usrp/common/fx2_ctrl.cpp | 6 ++++ host/lib/usrp/cores/rx_dsp_core_200.cpp | 5 ++- host/lib/usrp/cores/rx_dsp_core_3000.cpp | 5 ++- host/lib/usrp/cores/rx_frontend_core_200.cpp | 2 +- host/lib/usrp/cores/time64_core_200.cpp | 1 + host/lib/usrp/cores/tx_dsp_core_200.cpp | 3 ++ host/lib/usrp/cores/tx_dsp_core_3000.cpp | 3 ++ host/lib/usrp/dboard/db_dbsrx.cpp | 22 ++++++------- host/lib/usrp/dboard/db_tvrx.cpp | 2 +- host/lib/usrp/dboard/db_wbx_common.hpp | 2 +- host/lib/usrp/gps_ctrl.cpp | 2 -- host/lib/usrp/usrp1/io_impl.cpp | 2 +- host/lib/usrp/usrp1/usrp1_iface.cpp | 12 ++++--- host/lib/usrp/usrp2/usrp2_clk_regs.hpp | 14 +++++++-- host/lib/usrp/usrp2/usrp2_iface.cpp | 2 +- host/lib/utils/paths.cpp | 5 +-- host/tests/sph_recv_test.cpp | 8 ++--- host/tests/time_spec_test.cpp | 2 ++ host/utils/b2xx_fx3_utils.cpp | 40 +++++++++++++++++------- 36 files changed, 214 insertions(+), 105 deletions(-) (limited to 'host/lib/usrp') diff --git a/host/examples/network_relay.cpp b/host/examples/network_relay.cpp index bb09296b3..fc1ebd91d 100644 --- a/host/examples/network_relay.cpp +++ b/host/examples/network_relay.cpp @@ -33,8 +33,6 @@ typedef boost::shared_ptr socket_type; static const size_t insane_mtu = 9000; -boost::mutex spawn_mutex; - #if defined(UHD_PLATFORM_MACOS) //limit buffer resize on macos or it will error const size_t rx_dsp_buff_size = size_t(1e6); @@ -100,14 +98,11 @@ public: } std::cout << "spawning relay threads... " << _port << std::endl; + boost::unique_lock lock(spawn_mutex); // lock in preparation to wait for threads to spawn _thread_group.create_thread(boost::bind(&udp_relay_type::server_thread, this)); - spawn_mutex.lock(); - spawn_mutex.lock(); - spawn_mutex.unlock(); + wait_for_thread.wait(lock); // wait for thread to spin up _thread_group.create_thread(boost::bind(&udp_relay_type::client_thread, this)); - spawn_mutex.lock(); - spawn_mutex.lock(); - spawn_mutex.unlock(); + wait_for_thread.wait(lock); // wait for thread to spin up std::cout << " done!" << std::endl << std::endl; } @@ -128,7 +123,7 @@ private: void server_thread(void){ uhd::set_thread_priority_safe(); std::cout << " entering server_thread..." << std::endl; - spawn_mutex.unlock(); + wait_for_thread.notify_one(); // notify constructor that this thread has started std::vector buff(insane_mtu); while (not boost::this_thread::interruption_requested()){ if (wait_for_recv_ready(_server_socket->native())){ @@ -154,7 +149,7 @@ private: void client_thread(void){ uhd::set_thread_priority_safe(); std::cout << " entering client_thread..." << std::endl; - spawn_mutex.unlock(); + wait_for_thread.notify_one(); // notify constructor that this thread has started std::vector buff(insane_mtu); while (not boost::this_thread::interruption_requested()){ if (wait_for_recv_ready(_client_socket->native())){ @@ -172,6 +167,8 @@ private: asio::ip::udp::endpoint _endpoint; boost::mutex _endpoint_mutex; socket_type _server_socket, _client_socket; + boost::mutex spawn_mutex; + boost::condition_variable wait_for_thread; }; diff --git a/host/examples/test_dboard_coercion.cpp b/host/examples/test_dboard_coercion.cpp index cfc745147..86c59d9d7 100644 --- a/host/examples/test_dboard_coercion.cpp +++ b/host/examples/test_dboard_coercion.cpp @@ -53,7 +53,7 @@ std::string return_USRP_config_string(uhd::usrp::multi_usrp::sptr usrp, bool tes if(test_tx){ if(tx_info.get("tx_serial") != "") tx_serial = tx_info.get("tx_serial"); - else tx_serial = "no serial"; + else tx_serial = "no serial"; tx_subdev_name = tx_info.get("tx_subdev_name"); tx_subdev_spec = tx_info.get("tx_subdev_spec"); @@ -121,7 +121,7 @@ std::string tx_test(uhd::usrp::multi_usrp::sptr usrp, bool test_gain, bool verbo gains.push_back(current_gain); current_gain++; } - if(gain_end != *gains.end()) gains.push_back(gain_end); + gains.push_back(gain_end); } @@ -182,19 +182,19 @@ std::string tx_test(uhd::usrp::multi_usrp::sptr usrp, bool test_gain, bool verbo } if(test_gain){ - + //Testing for successful gain tune for(std::vector::iterator g = gains.begin(); g != gains.end(); ++g){ usrp->set_tx_gain(*g); boost::this_thread::sleep(boost::posix_time::microseconds(1000)); - + double actual_gain = usrp->get_tx_gain(); if(*g == 0.0){ if(actual_gain == 0.0){ if(verbose) std::cout << boost::format("TX gain successfully set to %5.2f at TX frequency %s.") % *g % return_MHz_string(*f) << std::endl; - } + } else{ if(verbose) std::cout << boost::format("TX gain set to %5.2f instead of %5.2f at TX frequency %s.") % actual_gain % *g % return_MHz_string(*f) << std::endl; std::vector bad_gain_freq; @@ -313,7 +313,7 @@ std::string rx_test(uhd::usrp::multi_usrp::sptr usrp, bool test_gain, bool verbo gains.push_back(current_gain); current_gain++; } - if(gain_end != *gains.end()) gains.push_back(gain_end); + gains.push_back(gain_end); } @@ -518,7 +518,7 @@ int UHD_SAFE_MAIN(int argc, char *argv[]){ std::cout << "REF must equal internal, external, or mimo." << std::endl; return ~0; } - + if(vm.count("tx") + vm.count("rx") == 0){ std::cout << desc << std::endl; std::cout << "Specify --tx to test for TX frequency coercion\n" @@ -557,12 +557,12 @@ int UHD_SAFE_MAIN(int argc, char *argv[]){ uhd::sensor_value_t mimo_locked = usrp->get_mboard_sensor("mimo_locked",0); std::cout << boost::format("Checking MIMO lock: %s ...") % mimo_locked.to_pp_string() << std::endl; UHD_ASSERT_THROW(mimo_locked.to_bool()); - } + } if ((ref == "external") and (std::find(sensor_names.begin(), sensor_names.end(), "ref_locked") != sensor_names.end())) { uhd::sensor_value_t ref_locked = usrp->get_mboard_sensor("ref_locked",0); std::cout << boost::format("Checking REF lock: %s ...") % ref_locked.to_pp_string() << std::endl; UHD_ASSERT_THROW(ref_locked.to_bool()); - } + } usrp_config = return_USRP_config_string(usrp, test_tx, test_rx); if(test_tx) tx_results = tx_test(usrp, test_tx_gain, verbose); if(test_rx) rx_results = rx_test(usrp, test_rx_gain, verbose); diff --git a/host/examples/test_messages.cpp b/host/examples/test_messages.cpp index e39a8bd30..4240e830b 100644 --- a/host/examples/test_messages.cpp +++ b/host/examples/test_messages.cpp @@ -1,5 +1,5 @@ // -// Copyright 2010-2011 Ettus Research LLC +// Copyright 2010-2013 Ettus Research LLC // // This program is free software: you can redistribute it and/or modify // it under the terms of the GNU General Public License as published by @@ -15,6 +15,7 @@ // along with this program. If not, see . // +#include #include #include #include @@ -84,7 +85,7 @@ bool test_late_command_message(uhd::usrp::multi_usrp::sptr usrp, uhd::rx_streame * Issue a stream command with num samps and more. * We expect to get an inline broken chain message. */ -bool test_broken_chain_message(uhd::usrp::multi_usrp::sptr usrp, uhd::rx_streamer::sptr rx_stream, uhd::tx_streamer::sptr){ +bool test_broken_chain_message(UHD_UNUSED(uhd::usrp::multi_usrp::sptr usrp), uhd::rx_streamer::sptr rx_stream, uhd::tx_streamer::sptr){ std::cout << "Test broken chain message... " << std::flush; uhd::stream_cmd_t stream_cmd(uhd::stream_cmd_t::STREAM_MODE_NUM_SAMPS_AND_MORE); diff --git a/host/include/uhd/config.hpp b/host/include/uhd/config.hpp index 6fd2932cf..619bd0787 100644 --- a/host/include/uhd/config.hpp +++ b/host/include/uhd/config.hpp @@ -55,18 +55,21 @@ typedef ptrdiff_t ssize_t; #define UHD_INLINE __forceinline #define UHD_DEPRECATED __declspec(deprecated) #define UHD_ALIGNED(x) __declspec(align(x)) + #define UHD_UNUSED(x) x #elif defined(__GNUG__) && __GNUG__ >= 4 #define UHD_EXPORT __attribute__((visibility("default"))) #define UHD_IMPORT __attribute__((visibility("default"))) #define UHD_INLINE inline __attribute__((always_inline)) #define UHD_DEPRECATED __attribute__((deprecated)) #define UHD_ALIGNED(x) __attribute__((aligned(x))) + #define UHD_UNUSED(x) x __attribute__((unused)) #else #define UHD_EXPORT #define UHD_IMPORT #define UHD_INLINE inline #define UHD_DEPRECATED #define UHD_ALIGNED(x) + #define UHD_UNUSED(x) x #endif // Define API declaration macro diff --git a/host/include/uhd/transport/zero_copy.hpp b/host/include/uhd/transport/zero_copy.hpp index fe2974d09..40d7b8c59 100644 --- a/host/include/uhd/transport/zero_copy.hpp +++ b/host/include/uhd/transport/zero_copy.hpp @@ -29,7 +29,9 @@ namespace uhd{ namespace transport{ //! Simple managed buffer with release interface class UHD_API managed_buffer{ public: - managed_buffer(void):_ref_count(0){} + managed_buffer(void):_ref_count(0),_buffer(NULL),_length(0){} + + virtual ~managed_buffer(void) {} /*! * Signal to the transport that we are done with the buffer. diff --git a/host/include/uhd/utils/atomic.hpp b/host/include/uhd/utils/atomic.hpp index 8ddee73ca..55769d2fd 100644 --- a/host/include/uhd/utils/atomic.hpp +++ b/host/include/uhd/utils/atomic.hpp @@ -78,6 +78,10 @@ namespace uhd{ class UHD_API reusable_barrier{ public: + reusable_barrier():_size (0) {} + + reusable_barrier(const size_t size):_size(size) {} + //! Resize the barrier for N threads void resize(const size_t size){ _size = size; diff --git a/host/lib/convert/convert_fc32_item32.cpp b/host/lib/convert/convert_fc32_item32.cpp index 29bfefd46..641fc2608 100644 --- a/host/lib/convert/convert_fc32_item32.cpp +++ b/host/lib/convert/convert_fc32_item32.cpp @@ -28,7 +28,7 @@ typedef boost::uint32_t (*to32_type)(boost::uint32_t); template struct convert_fc32_item32_1_to_star_1 : public converter { - convert_fc32_item32_1_to_star_1(void) + convert_fc32_item32_1_to_star_1(void):_scalar(0.0) { //NOP } @@ -48,9 +48,9 @@ struct convert_fc32_item32_1_to_star_1 : public converter { const item32_t i32 = tohost(input[i++]); const item32_t q32 = tohost(input[i++]); - const float i_f32 = reinterpret_cast(i32); - const float q_f32 = reinterpret_cast(q32); - output[o] = std::complex(type(i_f32*_scalar), type(q_f32*_scalar)); + const float *i_f32p = reinterpret_cast(&i32); + const float *q_f32p = reinterpret_cast(&q32); + output[o] = std::complex(type((*i_f32p)*_scalar), type((*q_f32p)*_scalar)); } } @@ -60,7 +60,7 @@ struct convert_fc32_item32_1_to_star_1 : public converter template struct convert_star_1_to_fc32_item32_1 : public converter { - convert_star_1_to_fc32_item32_1(void) + convert_star_1_to_fc32_item32_1(void):_scalar(0.0) { //NOP } @@ -80,9 +80,10 @@ struct convert_star_1_to_fc32_item32_1 : public converter { const float i_f32 = type(input[i].real()*_scalar); const float q_f32 = type(input[i].imag()*_scalar); - const item32_t i32 = towire(reinterpret_cast(i_f32)); - const item32_t q32 = towire(reinterpret_cast(q_f32)); - output[o++] = i32; output[o++] = q32; + const item32_t *i32p = reinterpret_cast(&i_f32); + const item32_t *q32p = reinterpret_cast(&q_f32); + output[o++] = towire(*i32p); + output[o++] = towire(*q32p); } } diff --git a/host/lib/convert/convert_pack_sc12.cpp b/host/lib/convert/convert_pack_sc12.cpp index 680814994..92cd5d152 100644 --- a/host/lib/convert/convert_pack_sc12.cpp +++ b/host/lib/convert/convert_pack_sc12.cpp @@ -67,7 +67,7 @@ void convert_star_4_to_sc12_item32_3 template struct convert_star_1_to_sc12_item32_1 : public converter { - convert_star_1_to_sc12_item32_1(void) + convert_star_1_to_sc12_item32_1(void):_scalar(0.0) { //NOP } diff --git a/host/lib/convert/convert_unpack_sc12.cpp b/host/lib/convert/convert_unpack_sc12.cpp index e98ab73f1..a2aec2ae5 100644 --- a/host/lib/convert/convert_unpack_sc12.cpp +++ b/host/lib/convert/convert_unpack_sc12.cpp @@ -84,7 +84,7 @@ void convert_sc12_item32_3_to_star_4 template struct convert_sc12_item32_1_to_star_1 : public converter { - convert_sc12_item32_1_to_star_1(void) + convert_sc12_item32_1_to_star_1(void):_scalar(0.0) { //NOP } diff --git a/host/lib/convert/sse2_fc32_to_sc16.cpp b/host/lib/convert/sse2_fc32_to_sc16.cpp index 90bf0ed04..a83e9b46c 100644 --- a/host/lib/convert/sse2_fc32_to_sc16.cpp +++ b/host/lib/convert/sse2_fc32_to_sc16.cpp @@ -27,6 +27,7 @@ DECLARE_CONVERTER(fc32, 1, sc16_item32_le, 1, PRIORITY_SIMD){ const __m128 scalar = _mm_set_ps1(float(scale_factor)); + // this macro converts values faster by using SSE intrinsics to convert 4 values at a time #define convert_fc32_1_to_item32_1_nswap_guts(_al_) \ for (; i+3 < nsamps; i+=4){ \ /* load from input */ \ @@ -48,17 +49,25 @@ DECLARE_CONVERTER(fc32, 1, sc16_item32_le, 1, PRIORITY_SIMD){ size_t i = 0; - //dispatch according to alignment + // need to dispatch according to alignment for fastest conversion switch (size_t(input) & 0xf){ - case 0x8: - xx_to_item32_sc16(input, output, 1, scale_factor); i++; case 0x0: + // the data is 16-byte aligned, so do the fast processing of the bulk of the samples + convert_fc32_1_to_item32_1_nswap_guts(_) + break; + case 0x8: + // the first sample is 8-byte aligned - process it to align the remainder of the samples to 16-bytes + xx_to_item32_sc16(input, output, 1, scale_factor); + i++; + // do faster processing of the bulk of the samples now that we are 16-byte aligned convert_fc32_1_to_item32_1_nswap_guts(_) break; - default: convert_fc32_1_to_item32_1_nswap_guts(u_) + default: + // we are not 8 or 16-byte aligned, so do fast processing with the unaligned load + convert_fc32_1_to_item32_1_nswap_guts(u_) } - //convert remainder + // convert any remaining samples xx_to_item32_sc16(input+i, output+i, nsamps-i, scale_factor); } @@ -68,6 +77,7 @@ DECLARE_CONVERTER(fc32, 1, sc16_item32_be, 1, PRIORITY_SIMD){ const __m128 scalar = _mm_set_ps1(float(scale_factor)); + // this macro converts values faster by using SSE intrinsics to convert 4 values at a time #define convert_fc32_1_to_item32_1_bswap_guts(_al_) \ for (; i+3 < nsamps; i+=4){ \ /* load from input */ \ @@ -88,16 +98,24 @@ DECLARE_CONVERTER(fc32, 1, sc16_item32_be, 1, PRIORITY_SIMD){ size_t i = 0; - //dispatch according to alignment + // need to dispatch according to alignment for fastest conversion switch (size_t(input) & 0xf){ - case 0x8: - xx_to_item32_sc16(input, output, 1, scale_factor); i++; case 0x0: + // the data is 16-byte aligned, so do the fast processing of the bulk of the samples + convert_fc32_1_to_item32_1_bswap_guts(_) + case 0x8: + // the first value is 8-byte aligned - process it and prepare the bulk of the data for fast conversion + xx_to_item32_sc16(input, output, 1, scale_factor); + i++; + // do faster processing of the remaining samples now that we are 16-byte aligned convert_fc32_1_to_item32_1_bswap_guts(_) break; - default: convert_fc32_1_to_item32_1_bswap_guts(u_) + break; + default: + // we are not 8 or 16-byte aligned, so do fast processing with the unaligned load + convert_fc32_1_to_item32_1_bswap_guts(u_) } - //convert remainder + // convert any remaining samples xx_to_item32_sc16(input+i, output+i, nsamps-i, scale_factor); } diff --git a/host/lib/convert/sse2_sc16_to_fc32.cpp b/host/lib/convert/sse2_sc16_to_fc32.cpp index c03e41585..0ac7f1798 100644 --- a/host/lib/convert/sse2_sc16_to_fc32.cpp +++ b/host/lib/convert/sse2_sc16_to_fc32.cpp @@ -28,6 +28,7 @@ DECLARE_CONVERTER(sc16_item32_le, 1, fc32, 1, PRIORITY_SIMD){ const __m128 scalar = _mm_set_ps1(float(scale_factor)/(1 << 16)); const __m128i zeroi = _mm_setzero_si128(); + // this macro converts values faster by using SSE intrinsics to convert 4 values at a time #define convert_item32_1_to_fc32_1_nswap_guts(_al_) \ for (; i+3 < nsamps; i+=4){ \ /* load from input */ \ @@ -50,17 +51,25 @@ DECLARE_CONVERTER(sc16_item32_le, 1, fc32, 1, PRIORITY_SIMD){ size_t i = 0; - //dispatch according to alignment + // need to dispatch according to alignment for fastest conversion switch (size_t(output) & 0xf){ - case 0x8: - item32_sc16_to_xx(input, output, 1, scale_factor); i++; case 0x0: + // the data is 16-byte aligned, so do the fast processing of the bulk of the samples + convert_item32_1_to_fc32_1_nswap_guts(_) + break; + case 0x8: + // the first sample is 8-byte aligned - process it to align the remainder of the samples to 16-bytes + item32_sc16_to_xx(input, output, 1, scale_factor); + i++; + // do faster processing of the bulk of the samples now that we are 16-byte aligned convert_item32_1_to_fc32_1_nswap_guts(_) break; - default: convert_item32_1_to_fc32_1_nswap_guts(u_) + default: + // we are not 8 or 16-byte aligned, so do fast processing with the unaligned load and store + convert_item32_1_to_fc32_1_nswap_guts(u_) } - //convert remainder + // convert any remaining samples item32_sc16_to_xx(input+i, output+i, nsamps-i, scale_factor); } @@ -71,6 +80,7 @@ DECLARE_CONVERTER(sc16_item32_be, 1, fc32, 1, PRIORITY_SIMD){ const __m128 scalar = _mm_set_ps1(float(scale_factor)/(1 << 16)); const __m128i zeroi = _mm_setzero_si128(); + // this macro converts values faster by using SSE intrinsics to convert 4 values at a time #define convert_item32_1_to_fc32_1_bswap_guts(_al_) \ for (; i+3 < nsamps; i+=4){ \ /* load from input */ \ @@ -92,16 +102,24 @@ DECLARE_CONVERTER(sc16_item32_be, 1, fc32, 1, PRIORITY_SIMD){ size_t i = 0; - //dispatch according to alignment + // need to dispatch according to alignment for fastest conversion switch (size_t(output) & 0xf){ - case 0x8: - item32_sc16_to_xx(input, output, 1, scale_factor); i++; case 0x0: + // the data is 16-byte aligned, so do the fast processing of the bulk of the samples + convert_item32_1_to_fc32_1_bswap_guts(_) + break; + case 0x8: + // the first sample is 8-byte aligned - process it to align the remainder of the samples to 16-bytes + item32_sc16_to_xx(input, output, 1, scale_factor); + i++; + // do faster processing of the bulk of the samples now that we are 16-byte aligned convert_item32_1_to_fc32_1_bswap_guts(_) break; - default: convert_item32_1_to_fc32_1_bswap_guts(u_) + default: + // we are not 8 or 16-byte aligned, so do fast processing with the unaligned load and store + convert_item32_1_to_fc32_1_bswap_guts(u_) } - //convert remainder + // convert any remaining samples item32_sc16_to_xx(input+i, output+i, nsamps-i, scale_factor); } diff --git a/host/lib/transport/super_recv_packet_handler.hpp b/host/lib/transport/super_recv_packet_handler.hpp index 688228e49..5080182d6 100644 --- a/host/lib/transport/super_recv_packet_handler.hpp +++ b/host/lib/transport/super_recv_packet_handler.hpp @@ -246,7 +246,8 @@ private: struct xport_chan_props_type{ xport_chan_props_type(void): packet_count(0), - handle_overflow(&handle_overflow_nop) + handle_overflow(&handle_overflow_nop), + fc_update_window(0) {} get_buff_type get_buff; issue_stream_cmd_type issue_stream_cmd; diff --git a/host/lib/transport/super_send_packet_handler.hpp b/host/lib/transport/super_send_packet_handler.hpp index 41f030ea6..ae483d1f3 100644 --- a/host/lib/transport/super_send_packet_handler.hpp +++ b/host/lib/transport/super_send_packet_handler.hpp @@ -239,7 +239,7 @@ private: size_t _header_offset_words32; double _tick_rate, _samp_rate; struct xport_chan_props_type{ - xport_chan_props_type(void):has_sid(false){} + xport_chan_props_type(void):has_sid(false),sid(0){} get_buff_type get_buff; bool has_sid; boost::uint32_t sid; diff --git a/host/lib/transport/udp_zero_copy.cpp b/host/lib/transport/udp_zero_copy.cpp index 166177177..7b6a476f5 100644 --- a/host/lib/transport/udp_zero_copy.cpp +++ b/host/lib/transport/udp_zero_copy.cpp @@ -68,7 +68,7 @@ static void check_registry_for_fast_send_threshold(const size_t mtu){ class udp_zero_copy_asio_mrb : public managed_recv_buffer{ public: udp_zero_copy_asio_mrb(void *mem, int sock_fd, const size_t frame_size): - _mem(mem), _sock_fd(sock_fd), _frame_size(frame_size) { /*NOP*/ } + _mem(mem), _sock_fd(sock_fd), _frame_size(frame_size), _len(0) { /*NOP*/ } void release(void){ _claimer.release(); @@ -87,6 +87,7 @@ public: if (wait_for_recv_ready(_sock_fd, timeout)){ _len = ::recv(_sock_fd, (char *)_mem, _frame_size, 0); + UHD_ASSERT_THROW(_len > 0); // TODO: Handle case of recv error index++; //advances the caller's buffer return make(this, _mem, size_t(_len)); } diff --git a/host/lib/types/tune.cpp b/host/lib/types/tune.cpp index 154f0990f..7697bd966 100644 --- a/host/lib/types/tune.cpp +++ b/host/lib/types/tune.cpp @@ -24,7 +24,9 @@ using namespace uhd; tune_request_t::tune_request_t(double target_freq): target_freq(target_freq), rf_freq_policy(POLICY_AUTO), - dsp_freq_policy(POLICY_AUTO) + rf_freq(0.0), + dsp_freq_policy(POLICY_AUTO), + dsp_freq(0.0) { /* NOP */ } @@ -33,7 +35,8 @@ tune_request_t::tune_request_t(double target_freq, double lo_off): target_freq(target_freq), rf_freq_policy(POLICY_MANUAL), rf_freq(target_freq + lo_off), - dsp_freq_policy(POLICY_AUTO) + dsp_freq_policy(POLICY_AUTO), + dsp_freq(0.0) { /* NOP */ } diff --git a/host/lib/usrp/b100/usb_zero_copy_wrapper.cpp b/host/lib/usrp/b100/usb_zero_copy_wrapper.cpp index 2096e4ef4..451cdae50 100644 --- a/host/lib/usrp/b100/usb_zero_copy_wrapper.cpp +++ b/host/lib/usrp/b100/usb_zero_copy_wrapper.cpp @@ -167,6 +167,7 @@ public: usb_zero_copy_wrapper(zero_copy_if::sptr usb_zc, const size_t frame_boundary): _internal_zc(usb_zc), _frame_boundary(frame_boundary), + _last_recv_offset(0), _next_recv_buff_index(0) { for (size_t i = 0; i < this->get_num_recv_frames(); i++){ diff --git a/host/lib/usrp/b200/b200_iface.cpp b/host/lib/usrp/b200/b200_iface.cpp index bb46fbfce..7a52f1969 100644 --- a/host/lib/usrp/b200/b200_iface.cpp +++ b/host/lib/usrp/b200/b200_iface.cpp @@ -17,6 +17,7 @@ #include "b200_iface.hpp" +#include #include #include #include @@ -163,6 +164,9 @@ bool parse_record(std::string *record, boost::uint16_t &len, \ std::istringstream(record->substr(3, 4)) >> std::hex >> addr; std::istringstream(record->substr(7, 2)) >> std::hex >> type; + if (len > (2 * (record->length() - 9))) // sanity check to prevent buffer overrun + return false; + for (i = 0; i < len; i++) { std::istringstream(record->substr(9 + 2 * i, 2)) >> std::hex >> val; data[i] = (unsigned char) val; @@ -219,13 +223,13 @@ public: } - void write_i2c(boost::uint16_t addr, const byte_vector_t &bytes) + void write_i2c(UHD_UNUSED(boost::uint16_t addr), UHD_UNUSED(const byte_vector_t &bytes)) { throw uhd::not_implemented_error("b200 write i2c"); } - byte_vector_t read_i2c(boost::uint16_t addr, size_t num_bytes) + byte_vector_t read_i2c(UHD_UNUSED(boost::uint16_t addr), UHD_UNUSED(size_t num_bytes)) { throw uhd::not_implemented_error("b200 read i2c"); } @@ -300,7 +304,7 @@ public: } - void load_firmware(const std::string filestring, bool force = false) + void load_firmware(const std::string filestring, UHD_UNUSED(bool force) = false) { const char *filename = filestring.c_str(); @@ -330,6 +334,9 @@ public: std::string record; file >> record; + if (!(record.length() > 0)) + continue; + /* Check for valid Intel HEX record. */ if (!checksum(&record) || !parse_record(&record, len, \ lower_address_bits, type, data)) { @@ -426,7 +433,9 @@ public: UHD_THROW_INVALID_CODE_PATH(); - fx3_control_write(B200_VREQ_FPGA_RESET, 0x00, 0x00, data, 4); + // Below is dead code as long as UHD_THROW_INVALID_CODE_PATH(); is declared above. + // It is preserved here in a comment in case it is needed later: + // fx3_control_write(B200_VREQ_FPGA_RESET, 0x00, 0x00, data, 4); } boost::uint8_t get_usb_speed(void) { diff --git a/host/lib/usrp/common/fx2_ctrl.cpp b/host/lib/usrp/common/fx2_ctrl.cpp index 6111efea9..d68bf6058 100644 --- a/host/lib/usrp/common/fx2_ctrl.cpp +++ b/host/lib/usrp/common/fx2_ctrl.cpp @@ -119,6 +119,9 @@ bool parse_record(std::string *record, unsigned int &len, std::istringstream(record->substr(3, 4)) >> std::hex >> addr; std::istringstream(record->substr(7, 2)) >> std::hex >> type; + if (len > (2 * (record->length() - 9))) // sanity check to prevent buffer overrun + return false; + for (i = 0; i < len; i++) { std::istringstream(record->substr(9 + 2 * i, 2)) >> std::hex >> val; data[i] = (unsigned char) val; @@ -181,6 +184,9 @@ public: std::string record; file >> record; + if (!(record.length() > 0)) + continue; + //check for valid record if (not checksum(&record) or not parse_record(&record, len, addr, type, data)) { throw uhd::io_error("usrp_load_firmware: bad record checksum"); diff --git a/host/lib/usrp/cores/rx_dsp_core_200.cpp b/host/lib/usrp/cores/rx_dsp_core_200.cpp index ef6b85de9..2fdc220b5 100644 --- a/host/lib/usrp/cores/rx_dsp_core_200.cpp +++ b/host/lib/usrp/cores/rx_dsp_core_200.cpp @@ -59,8 +59,11 @@ public: const size_t dsp_base, const size_t ctrl_base, const boost::uint32_t sid, const bool lingering_packet ): - _iface(iface), _dsp_base(dsp_base), _ctrl_base(ctrl_base), _sid(sid) + _iface(iface), _dsp_base(dsp_base), _ctrl_base(ctrl_base), _sid(sid) { + // previously uninitialized - assuming zero for all + _tick_rate = _link_rate = _host_extra_scaling = _fxpt_scalar_correction = 0.0; + //init to something so update method has reasonable defaults _scaling_adjustment = 1.0; _dsp_extra_scaling = 1.0; diff --git a/host/lib/usrp/cores/rx_dsp_core_3000.cpp b/host/lib/usrp/cores/rx_dsp_core_3000.cpp index 7b3324f74..525916032 100644 --- a/host/lib/usrp/cores/rx_dsp_core_3000.cpp +++ b/host/lib/usrp/cores/rx_dsp_core_3000.cpp @@ -50,10 +50,13 @@ public: ): _iface(iface), _dsp_base(dsp_base) { + // previously uninitialized - assuming zero for all + _link_rate = _host_extra_scaling = _fxpt_scalar_correction = 0.0; + //init to something so update method has reasonable defaults _scaling_adjustment = 1.0; _dsp_extra_scaling = 1.0; - this->set_tick_rate(1.0); + _tick_rate = 1.0; } ~rx_dsp_core_3000_impl(void) diff --git a/host/lib/usrp/cores/rx_frontend_core_200.cpp b/host/lib/usrp/cores/rx_frontend_core_200.cpp index 09b36c1a6..864b5cc53 100644 --- a/host/lib/usrp/cores/rx_frontend_core_200.cpp +++ b/host/lib/usrp/cores/rx_frontend_core_200.cpp @@ -38,7 +38,7 @@ static boost::uint32_t fs_to_bits(const double num, const size_t bits){ class rx_frontend_core_200_impl : public rx_frontend_core_200{ public: rx_frontend_core_200_impl(wb_iface::sptr iface, const size_t base): - _iface(iface), _base(base) + _i_dc_off(0), _q_dc_off(0), _iface(iface), _base(base) { //NOP } diff --git a/host/lib/usrp/cores/time64_core_200.cpp b/host/lib/usrp/cores/time64_core_200.cpp index 11b310362..ad5e6477c 100644 --- a/host/lib/usrp/cores/time64_core_200.cpp +++ b/host/lib/usrp/cores/time64_core_200.cpp @@ -48,6 +48,7 @@ public: ): _iface(iface), _base(base), _readback_bases(readback_bases), + _tick_rate(0.0), _mimo_delay_cycles(mimo_delay_cycles) { _sources.push_back("none"); diff --git a/host/lib/usrp/cores/tx_dsp_core_200.cpp b/host/lib/usrp/cores/tx_dsp_core_200.cpp index 808f13028..f8aa87aa3 100644 --- a/host/lib/usrp/cores/tx_dsp_core_200.cpp +++ b/host/lib/usrp/cores/tx_dsp_core_200.cpp @@ -60,6 +60,9 @@ public: ): _iface(iface), _dsp_base(dsp_base), _ctrl_base(ctrl_base), _sid(sid) { + // previously uninitialized - assuming zero for all + _tick_rate = _link_rate = _host_extra_scaling = _fxpt_scalar_correction = 0.0; + //init to something so update method has reasonable defaults _scaling_adjustment = 1.0; _dsp_extra_scaling = 1.0; diff --git a/host/lib/usrp/cores/tx_dsp_core_3000.cpp b/host/lib/usrp/cores/tx_dsp_core_3000.cpp index feb749cd9..93c8702bc 100644 --- a/host/lib/usrp/cores/tx_dsp_core_3000.cpp +++ b/host/lib/usrp/cores/tx_dsp_core_3000.cpp @@ -45,6 +45,9 @@ public: ): _iface(iface), _dsp_base(dsp_base) { + // previously uninitialized - assuming zero for all + _link_rate = _host_extra_scaling = _fxpt_scalar_correction = 0.0; + //init to something so update method has reasonable defaults _scaling_adjustment = 1.0; _dsp_extra_scaling = 1.0; diff --git a/host/lib/usrp/dboard/db_dbsrx.cpp b/host/lib/usrp/dboard/db_dbsrx.cpp index b1cee4aa7..9d04d8e16 100644 --- a/host/lib/usrp/dboard/db_dbsrx.cpp +++ b/host/lib/usrp/dboard/db_dbsrx.cpp @@ -179,7 +179,7 @@ dbsrx::dbsrx(ctor_args_t args) : rx_dboard_base(args){ "DBSRX: incorrect dbid\n" "Expected dbid 0x0002 and R193\n" "found dbid == %d\n" - "Please see the daughterboard app notes" + "Please see the daughterboard app notes" ) % this->get_rx_id().to_pp_string(); //warn user about incorrect DBID on non-USRP1, requires R194 populated @@ -188,7 +188,7 @@ dbsrx::dbsrx(ctor_args_t args) : rx_dboard_base(args){ "DBSRX: incorrect dbid\n" "Expected dbid 0x000D and R194\n" "found dbid == %d\n" - "Please see the daughterboard app notes" + "Please see the daughterboard app notes" ) % this->get_rx_id().to_pp_string(); //send initial register settings @@ -305,13 +305,13 @@ double dbsrx::set_lo_freq(double target_freq){ goto done_loop; } - } + } done_loop: - //Assert because we failed to find a suitable combination of ref_clock, R and N + //Assert because we failed to find a suitable combination of ref_clock, R and N UHD_ASSERT_THROW(ref_clock <= 27.0e6 and ref_clock >= 0.0); - UHD_ASSERT_THROW(ref_clock/m >= 1e6 and ref_clock/m <= 2.5e6); + UHD_ASSERT_THROW(m and ref_clock/m >= 1e6 and ref_clock/m <= 2.5e6); UHD_ASSERT_THROW((pfd_freq >= dbsrx_pfd_freq_range.start()) and (pfd_freq <= dbsrx_pfd_freq_range.stop())); UHD_ASSERT_THROW((N >= 256) and (N <= 32768)); @@ -332,7 +332,7 @@ double dbsrx::set_lo_freq(double target_freq){ _max2118_write_regs.r_divider = (max2118_write_regs_t::r_divider_t) r; _max2118_write_regs.set_n_divider(N); _max2118_write_regs.ade_vco_ade_read = max2118_write_regs_t::ADE_VCO_ADE_READ_ENABLED; - + //compute prescaler variables int scaler = actual_freq > 1125e6 ? 2 : 4; _max2118_write_regs.div2 = scaler == 4 ? max2118_write_regs_t::DIV2_DIV4 : max2118_write_regs_t::DIV2_DIV2; @@ -377,7 +377,7 @@ double dbsrx::set_lo_freq(double target_freq){ if (_max2118_read_regs.adc == 0){ if (_max2118_write_regs.osc_band == 0){ UHD_MSG(warning) << boost::format( - "DBSRX: Tuning exceeded vco range, _max2118_write_regs.osc_band == %d\n" + "DBSRX: Tuning exceeded vco range, _max2118_write_regs.osc_band == %d\n" ) % int(_max2118_write_regs.osc_band); UHD_ASSERT_THROW(_max2118_read_regs.adc != 0); //just to cause a throw } @@ -389,7 +389,7 @@ double dbsrx::set_lo_freq(double target_freq){ if (_max2118_read_regs.adc == 7){ if (_max2118_write_regs.osc_band == 7){ UHD_MSG(warning) << boost::format( - "DBSRX: Tuning exceeded vco range, _max2118_write_regs.osc_band == %d\n" + "DBSRX: Tuning exceeded vco range, _max2118_write_regs.osc_band == %d\n" ) % int(_max2118_write_regs.osc_band); UHD_ASSERT_THROW(_max2118_read_regs.adc != 7); //just to cause a throw } @@ -408,7 +408,7 @@ double dbsrx::set_lo_freq(double target_freq){ //allow for setup time before checking condition again boost::this_thread::sleep(boost::posix_time::milliseconds(10)); } - + UHD_LOGV(often) << boost::format( "DBSRX: final vco %d, vtune adc %d" ) % int(_max2118_write_regs.osc_band) % int(_max2118_read_regs.adc) << std::endl; @@ -417,7 +417,7 @@ double dbsrx::set_lo_freq(double target_freq){ if (_max2118_read_regs.adc <= 2) _max2118_write_regs.cp_current = max2118_write_regs_t::CP_CURRENT_I_CP_100UA; else if (_max2118_read_regs.adc >= 5) _max2118_write_regs.cp_current = max2118_write_regs_t::CP_CURRENT_I_CP_400UA; else _max2118_write_regs.cp_current = max2118_write_regs_t::CP_CURRENT_I_CP_200UA; - + //update charge pump bias current setting send_reg(0x2, 0x2); @@ -524,7 +524,7 @@ double dbsrx::set_bandwidth(double bandwidth){ bandwidth = dbsrx_bandwidth_range.clip(bandwidth); double ref_clock = this->get_iface()->get_clock_rate(dboard_iface::UNIT_RX); - + //NOTE: _max2118_write_regs.m_divider set in set_lo_freq //compute f_dac setting diff --git a/host/lib/usrp/dboard/db_tvrx.cpp b/host/lib/usrp/dboard/db_tvrx.cpp index edee46cd5..e9f60f765 100644 --- a/host/lib/usrp/dboard/db_tvrx.cpp +++ b/host/lib/usrp/dboard/db_tvrx.cpp @@ -267,7 +267,7 @@ static std::string get_band(double freq) { * \return a voltage to feed the TVRX analog gain */ -static double gain_interp(double gain, boost::array db_vector, boost::array volts_vector) { +static double gain_interp(double gain, const boost::array& db_vector, const boost::array& volts_vector) { double volts; gain = uhd::clip(gain, db_vector.front(), db_vector.back()); //let's not get carried away here diff --git a/host/lib/usrp/dboard/db_wbx_common.hpp b/host/lib/usrp/dboard/db_wbx_common.hpp index 9e984dce7..d1beb160e 100644 --- a/host/lib/usrp/dboard/db_wbx_common.hpp +++ b/host/lib/usrp/dboard/db_wbx_common.hpp @@ -118,7 +118,7 @@ protected: */ class wbx_versionx { public: - wbx_versionx() {} + wbx_versionx():self_base(NULL) {} ~wbx_versionx(void) {} virtual double set_tx_gain(double gain, const std::string &name) = 0; diff --git a/host/lib/usrp/gps_ctrl.cpp b/host/lib/usrp/gps_ctrl.cpp index c3af75faa..105a52b30 100644 --- a/host/lib/usrp/gps_ctrl.cpp +++ b/host/lib/usrp/gps_ctrl.cpp @@ -223,7 +223,6 @@ private: boost::this_thread::sleep(milliseconds(GPS_TIMEOUT_DELAY_MS)); } throw uhd::value_error(str(boost::format("get_nmea(): no %s message found") % msgtype)); - return std::string(); } //helper function to retrieve a field from an NMEA sentence @@ -322,7 +321,6 @@ private: boost::this_thread::sleep(milliseconds(GPS_TIMEOUT_DELAY_MS)); } throw uhd::value_error("get_stat(): no servo message found"); - return std::string(); } uart_iface::sptr _uart; diff --git a/host/lib/usrp/usrp1/io_impl.cpp b/host/lib/usrp/usrp1/io_impl.cpp index d384eb13f..e1f17e5a6 100644 --- a/host/lib/usrp/usrp1/io_impl.cpp +++ b/host/lib/usrp/usrp1/io_impl.cpp @@ -63,7 +63,7 @@ static const size_t alignment_padding = 512; * Helper struct to associate an offset with a buffer **********************************************************************/ struct offset_send_buffer{ - offset_send_buffer(void){ + offset_send_buffer(void):offset(0){ /* NOP */ } diff --git a/host/lib/usrp/usrp1/usrp1_iface.cpp b/host/lib/usrp/usrp1/usrp1_iface.cpp index 9301721aa..6eff9d3ad 100644 --- a/host/lib/usrp/usrp1/usrp1_iface.cpp +++ b/host/lib/usrp/usrp1/usrp1_iface.cpp @@ -91,11 +91,11 @@ public: return uhd::ntohx(value_out); } - + void poke16(boost::uint32_t, boost::uint16_t) { throw uhd::not_implemented_error("Unhandled command poke16()"); } - + boost::uint16_t peek16(boost::uint32_t) { throw uhd::not_implemented_error("Unhandled command peek16()"); return 0; @@ -141,8 +141,10 @@ public: if (readback) { unsigned char buff[4] = { - (bits >> 0) & 0xff, (bits >> 8) & 0xff, - (bits >> 16) & 0xff, (bits >> 24) & 0xff + (unsigned char)(bits & 0xff), + (unsigned char)((bits >> 8) & 0xff), + (unsigned char)((bits >> 16) & 0xff), + (unsigned char)((bits >> 24) & 0xff) }; //conditions where there are two header bytes if (num_bytes >= 3 and buff[num_bytes-1] != 0 and buff[num_bytes-2] != 0 and buff[num_bytes-3] == 0){ @@ -168,7 +170,7 @@ public: (((boost::uint32_t)buff[1]) << 8) | (((boost::uint32_t)buff[2]) << 16) | (((boost::uint32_t)buff[3]) << 24); - return val; + return val; } else { // Byteswap on num_bytes diff --git a/host/lib/usrp/usrp2/usrp2_clk_regs.hpp b/host/lib/usrp/usrp2/usrp2_clk_regs.hpp index 8b185eac0..d5e506d8d 100644 --- a/host/lib/usrp/usrp2/usrp2_clk_regs.hpp +++ b/host/lib/usrp/usrp2/usrp2_clk_regs.hpp @@ -22,8 +22,18 @@ class usrp2_clk_regs_t { public: - usrp2_clk_regs_t(void) { ; } + usrp2_clk_regs_t(void): + test(0), + fpga(0), + adc(0), + dac(0), + serdes(0), + exp(0), + tx_db(0), + rx_db(0) {} + usrp2_clk_regs_t(usrp2_iface::rev_type rev) { + fpga = adc = serdes = exp = tx_db = 0; test = 0; fpga = 1; dac = 3; @@ -54,7 +64,7 @@ public: //dont throw, it may be unitialized break; } - + rx_db = 7; } diff --git a/host/lib/usrp/usrp2/usrp2_iface.cpp b/host/lib/usrp/usrp2/usrp2_iface.cpp index 3b230ca69..5f97045e1 100644 --- a/host/lib/usrp/usrp2/usrp2_iface.cpp +++ b/host/lib/usrp/usrp2/usrp2_iface.cpp @@ -271,7 +271,7 @@ public: //send and recv usrp2_ctrl_data_t in_data = this->ctrl_send_and_recv(out_data, MIN_PROTO_COMPAT_I2C); UHD_ASSERT_THROW(ntohl(in_data.id) == USRP2_CTRL_ID_HERES_THE_I2C_DATA_DUDE); - UHD_ASSERT_THROW(in_data.data.i2c_args.addr = num_bytes); + UHD_ASSERT_THROW(in_data.data.i2c_args.bytes == num_bytes); //copy out the data byte_vector_t result(num_bytes); diff --git a/host/lib/utils/paths.cpp b/host/lib/utils/paths.cpp index 25cade693..3e2bea1c6 100644 --- a/host/lib/utils/paths.cpp +++ b/host/lib/utils/paths.cpp @@ -115,8 +115,8 @@ std::string uhd::get_tmp_path(void){ //try the stdio define if available #ifdef P_tmpdir - if (P_tmpdir != NULL) return P_tmpdir; - #endif + return P_tmpdir; + #else //try unix environment variables tmp_path = std::getenv("TMPDIR"); @@ -124,6 +124,7 @@ std::string uhd::get_tmp_path(void){ //give up and use the unix default return "/tmp"; + #endif } std::string uhd::get_app_path(void){ diff --git a/host/tests/sph_recv_test.cpp b/host/tests/sph_recv_test.cpp index 9339a9739..316e24779 100644 --- a/host/tests/sph_recv_test.cpp +++ b/host/tests/sph_recv_test.cpp @@ -395,7 +395,7 @@ BOOST_AUTO_TEST_CASE(test_sph_recv_multi_channel_normal){ //check the received packets size_t num_accum_samps = 0; - std::vector > mem(NUM_SAMPS_PER_BUFF*NCHANNELS); + std::complex mem[NUM_SAMPS_PER_BUFF*NCHANNELS]; std::vector *> buffs(NCHANNELS); for (size_t ch = 0; ch < NCHANNELS; ch++){ buffs[ch] = &mem[ch*NUM_SAMPS_PER_BUFF]; @@ -481,7 +481,7 @@ BOOST_AUTO_TEST_CASE(test_sph_recv_multi_channel_sequence_error){ //check the received packets size_t num_accum_samps = 0; - std::vector > mem(NUM_SAMPS_PER_BUFF*NCHANNELS); + std::complex mem[NUM_SAMPS_PER_BUFF*NCHANNELS]; std::vector *> buffs(NCHANNELS); for (size_t ch = 0; ch < NCHANNELS; ch++){ buffs[ch] = &mem[ch*NUM_SAMPS_PER_BUFF]; @@ -574,7 +574,7 @@ BOOST_AUTO_TEST_CASE(test_sph_recv_multi_channel_time_error){ //check the received packets size_t num_accum_samps = 0; - std::vector > mem(NUM_SAMPS_PER_BUFF*NCHANNELS); + std::complex mem[NUM_SAMPS_PER_BUFF*NCHANNELS]; std::vector *> buffs(NCHANNELS); for (size_t ch = 0; ch < NCHANNELS; ch++){ buffs[ch] = &mem[ch*NUM_SAMPS_PER_BUFF]; @@ -659,7 +659,7 @@ BOOST_AUTO_TEST_CASE(test_sph_recv_multi_channel_fragment){ //check the received packets size_t num_accum_samps = 0; - std::vector > mem(NUM_SAMPS_PER_BUFF*NCHANNELS); + std::complex mem[NUM_SAMPS_PER_BUFF*NCHANNELS]; std::vector *> buffs(NCHANNELS); for (size_t ch = 0; ch < NCHANNELS; ch++){ buffs[ch] = &mem[ch*NUM_SAMPS_PER_BUFF]; diff --git a/host/tests/time_spec_test.cpp b/host/tests/time_spec_test.cpp index 37a039cc5..c9b9652f9 100644 --- a/host/tests/time_spec_test.cpp +++ b/host/tests/time_spec_test.cpp @@ -117,6 +117,7 @@ BOOST_AUTO_TEST_CASE(test_time_error_irrational_rate) const uhd::time_spec_t ts = uhd::time_spec_t::from_ticks(tick_in, rate); const long long tick_out = ts.to_ticks(rate); const long long err = tick_in - tick_out; + std::streamsize precision = std::cout.precision(); std::cout << std::setprecision(18); std::cout << "time ............ " << ts.get_real_secs() << std::endl; @@ -124,6 +125,7 @@ BOOST_AUTO_TEST_CASE(test_time_error_irrational_rate) std::cout << "tick out ........ " << tick_out << std::endl; std::cout << "tick error ...... " << err << std::endl; std::cout << std::endl; + std::cout.precision(precision); BOOST_CHECK_EQUAL(err, (long long)(0)); } diff --git a/host/utils/b2xx_fx3_utils.cpp b/host/utils/b2xx_fx3_utils.cpp index c182548b7..adacff9d0 100644 --- a/host/utils/b2xx_fx3_utils.cpp +++ b/host/utils/b2xx_fx3_utils.cpp @@ -209,7 +209,9 @@ boost::int32_t main(boost::int32_t argc, char *argv[]) { po::notify(vm); if (vm.count("help")){ - std::cout << boost::format("B2xx Utility Program %s") % visible << std::endl; + try { + std::cout << boost::format("B2xx Utility Program %s") % visible << std::endl; + } catch(...) {} return ~0; } else if (vm.count("reset-usb")) { return reset_usb(); @@ -220,10 +222,15 @@ boost::int32_t main(boost::int32_t argc, char *argv[]) { vid = B200_VENDOR_ID; // Default pid = B200_PRODUCT_ID; // Default - if (vm.count("vid")) - vid = atoh(vid_str); - if (vm.count("pid")) - pid = atoh(pid_str); + try { + if (vm.count("vid")) + vid = atoh(vid_str); + if (vm.count("pid")) + pid = atoh(pid_str); + } catch (std::exception &e) { + std::cerr << "Exception while parsing VID and PID: " << e.what() << std:: endl; + return ~0; + } // open the device handle = open_device(vid, pid); @@ -243,7 +250,11 @@ boost::int32_t main(boost::int32_t argc, char *argv[]) { std::cout << "Overwriting existing firmware" << std::endl; // reset the device - b200->reset_fx3(); + try { + b200->reset_fx3(); + } catch (std::exception &e) { + std::cerr << "Exception while reseting FX3: " << e.what() << std::endl; + } // re-open device b200.reset(); @@ -264,19 +275,24 @@ boost::int32_t main(boost::int32_t argc, char *argv[]) { if (fw_file.empty()) fw_file = uhd::find_image_path(B200_FW_FILE_NAME); - + if(fw_file.empty()) { std::cerr << "Firmware image not found!" << std::endl; return -1; } - + if(!(fs::exists(fw_file))) { std::cerr << "Invalid filepath: " << fw_file << std::endl; return -1; } // load firmware - b200->load_firmware(fw_file); + try { + b200->load_firmware(fw_file); + } catch (std::exception &e) { + std::cerr << "Exception while loading firmware: " << e.what() << std::endl; + return ~0; + } // re-open device b200.reset(); @@ -403,7 +419,7 @@ boost::int32_t main(boost::int32_t argc, char *argv[]) { try { b200->reset_fx3(); } catch (const std::exception &e) { - std::cerr << "Exceptions while resetting device: " << e.what() << std::endl; + std::cerr << "Exception while resetting device: " << e.what() << std::endl; return -1; } @@ -461,7 +477,9 @@ boost::int32_t main(boost::int32_t argc, char *argv[]) { << std::endl; } else { - std::cout << boost::format("B2xx Utility Program %s") % visible << std::endl; + try { + std::cout << boost::format("B2xx Utility Program %s") % visible << std::endl; + } catch(...) {} return ~0; } -- cgit v1.2.3 From abc682eda8d84d5a366ca32ca87e81e0890e69e2 Mon Sep 17 00:00:00 2001 From: Ben Hilburn Date: Wed, 27 Nov 2013 15:12:46 -0800 Subject: Final merge of Balint's 'kitchen_sink' B200 fixes. --- host/lib/usrp/b200/b200_iface.cpp | 252 +++++++++++++++++++++++++----------- host/lib/usrp/b200/b200_impl.hpp | 4 +- host/lib/usrp/b200/b200_io_impl.cpp | 4 +- 3 files changed, 177 insertions(+), 83 deletions(-) (limited to 'host/lib/usrp') diff --git a/host/lib/usrp/b200/b200_iface.cpp b/host/lib/usrp/b200/b200_iface.cpp index 7a52f1969..b60c72fa8 100644 --- a/host/lib/usrp/b200/b200_iface.cpp +++ b/host/lib/usrp/b200/b200_iface.cpp @@ -63,6 +63,7 @@ const static boost::uint8_t B200_VREQ_FX3_RESET = 0x99; const static boost::uint8_t B200_VREQ_EEPROM_WRITE = 0xBA; const static boost::uint8_t B200_VREQ_EEPROM_READ = 0xBB; +const static boost::uint8_t FX3_STATE_UNDEFINED = 0x00; const static boost::uint8_t FX3_STATE_FPGA_READY = 0x01; const static boost::uint8_t FX3_STATE_CONFIGURING_FPGA = 0x02; const static boost::uint8_t FX3_STATE_BUSY = 0x03; @@ -89,6 +90,9 @@ typedef boost::uint32_t hash_type; */ static hash_type generate_hash(const char *filename) { + if (filename == NULL) + return hash_type(0); + std::ifstream file(filename); if (not file){ throw uhd::io_error(std::string("cannot open input file ") + filename); @@ -121,15 +125,15 @@ static hash_type generate_hash(const char *filename) * \param record a line from an Intel HEX file * \return true if record is valid, false otherwise */ -bool checksum(std::string *record) { +bool checksum(const std::string& record) { - size_t len = record->length(); + size_t len = record.length(); unsigned int i; unsigned char sum = 0; unsigned int val; for (i = 1; i < len; i += 2) { - std::istringstream(record->substr(i, 2)) >> std::hex >> val; + std::istringstream(record.substr(i, 2)) >> std::hex >> val; sum += val; } @@ -150,25 +154,25 @@ bool checksum(std::string *record) { * \param data output data * \return true if record is sucessfully read, false on error */ -bool parse_record(std::string *record, boost::uint16_t &len, \ +bool parse_record(const std::string& record, boost::uint16_t &len, \ boost::uint16_t &addr, boost::uint16_t &type, unsigned char* data) { unsigned int i; std::string _data; unsigned int val; - if (record->substr(0, 1) != ":") + if (record.substr(0, 1) != ":") return false; - std::istringstream(record->substr(1, 2)) >> std::hex >> len; - std::istringstream(record->substr(3, 4)) >> std::hex >> addr; - std::istringstream(record->substr(7, 2)) >> std::hex >> type; + std::istringstream(record.substr(1, 2)) >> std::hex >> len; + std::istringstream(record.substr(3, 4)) >> std::hex >> addr; + std::istringstream(record.substr(7, 2)) >> std::hex >> type; if (len > (2 * (record->length() - 9))) // sanity check to prevent buffer overrun return false; for (i = 0; i < len; i++) { - std::istringstream(record->substr(9 + 2 * i, 2)) >> std::hex >> val; + std::istringstream(record.substr(9 + 2 * i, 2)) >> std::hex >> val; data[i] = (unsigned char) val; } @@ -183,19 +187,16 @@ class b200_iface_impl : public b200_iface{ public: b200_iface_impl(usb_control::sptr usb_ctrl): - _usb_ctrl(usb_ctrl) - { + _usb_ctrl(usb_ctrl) { //NOP } - int fx3_control_write(boost::uint8_t request, boost::uint16_t value, boost::uint16_t index, unsigned char *buff, boost::uint16_t length, - boost::int32_t timeout = 0) - { + boost::int32_t timeout = 0) { return _usb_ctrl->submit(VRT_VENDOR_OUT, // bmReqeustType request, // bRequest value, // wValue @@ -205,14 +206,12 @@ public: timeout); // timeout } - int fx3_control_read(boost::uint8_t request, boost::uint16_t value, boost::uint16_t index, unsigned char *buff, boost::uint16_t length, - boost::int32_t timeout = 0) - { + boost::int32_t timeout = 0) { return _usb_ctrl->submit(VRT_VENDOR_IN, // bmReqeustType request, // bRequest value, // wValue @@ -222,7 +221,6 @@ public: timeout); // timeout } - void write_i2c(UHD_UNUSED(boost::uint16_t addr), UHD_UNUSED(const byte_vector_t &bytes)) { throw uhd::not_implemented_error("b200 write i2c"); @@ -235,26 +233,33 @@ public: } void write_eeprom(boost::uint16_t addr, boost::uint16_t offset, - const byte_vector_t &bytes) - { - fx3_control_write(B200_VREQ_EEPROM_WRITE, + const byte_vector_t &bytes) { + int ret = fx3_control_write(B200_VREQ_EEPROM_WRITE, 0, offset | (boost::uint16_t(addr) << 8), (unsigned char *) &bytes[0], bytes.size()); + + if (ret < 0) + throw uhd::io_error((boost::format("Failed to write EEPROM (%d: %s)") % ret % libusb_error_name(ret)).str()); + else if ((size_t)ret != bytes.size()) + throw uhd::io_error((boost::format("Short write on write EEPROM (expecting: %d, returned: %d)") % bytes.size() % ret).str()); } byte_vector_t read_eeprom( boost::uint16_t addr, boost::uint16_t offset, - size_t num_bytes - ){ + size_t num_bytes) { byte_vector_t recv_bytes(num_bytes); int bytes_read = fx3_control_read(B200_VREQ_EEPROM_READ, 0, offset | (boost::uint16_t(addr) << 8), (unsigned char*) &recv_bytes[0], num_bytes); - if (bytes_read != num_bytes) - throw uhd::io_error("Failed to read data from EEPROM."); + + if (bytes_read < 0) + throw uhd::io_error((boost::format("Failed to read EEPROM (%d: %s)") % bytes_read % libusb_error_name(bytes_read)).str()); + else if ((size_t)bytes_read != num_bytes) + throw uhd::io_error((boost::format("Short read on read EEPROM (expecting: %d, returned: %d)") % num_bytes % bytes_read).str()); + return recv_bytes; } @@ -262,8 +267,7 @@ public: unsigned char *tx_data, size_t num_tx_bits, unsigned char *rx_data, - size_t num_rx_bits - ){ + size_t num_rx_bits) { int ret = 0; boost::uint16_t tx_length = num_tx_bits / 8; @@ -275,9 +279,10 @@ public: 0x00, tx_data, tx_length); } - if(ret < 0) { - throw uhd::io_error("transact_spi: fx3_control_write failed!"); - } + if (ret < 0) + throw uhd::io_error((boost::format("Failed to write SPI (%d: %s)") % ret % libusb_error_name(ret)).str()); + else if (ret != tx_length) + throw uhd::io_error((boost::format("Short write on write SPI (expecting: %d, returned: %d)") % tx_length % ret).str()); if(num_rx_bits) { @@ -286,24 +291,37 @@ public: ret = fx3_control_read(B200_VREQ_LOOP, 0x00, \ 0x00, rx_data, total_length); - if(ret < 0) { - throw uhd::io_error("transact_spi: readback failed!"); - } + if (ret < 0) + throw uhd::io_error((boost::format("Failed to readback (%d: %s)") % ret % libusb_error_name(ret)).str()); + else if (ret != total_length) + throw uhd::io_error((boost::format("Short read on readback (expecting: %d, returned: %d)") % total_length % ret).str()); } } void ad9361_transact(const unsigned char in_buff[64], unsigned char out_buff[64]) { - fx3_control_write(B200_VREQ_AD9361_CTRL_WRITE, 0x00, 0x00, (unsigned char *)in_buff, 64); - int ret = 0; - for (size_t i = 0; i < 30; i++) + const int bytes_to_write = 64; + const int bytes_to_read = 64; + const size_t read_retries = 30; + + int ret = fx3_control_write(B200_VREQ_AD9361_CTRL_WRITE, 0x00, 0x00, (unsigned char *)in_buff, bytes_to_write); + if (ret < 0) + throw uhd::io_error((boost::format("Failed to write AD9361 (%d: %s)") % ret % libusb_error_name(ret)).str()); + else if (ret != bytes_to_write) + throw uhd::io_error((boost::format("Short write on write AD9361 (expecting: %d, returned: %d)") % bytes_to_write % ret).str()); + + for (size_t i = 0; i < read_retries; i++) { - ret = fx3_control_read(B200_VREQ_AD9361_CTRL_READ, 0x00, 0x00, out_buff, 64, 1000); - if (ret == 64) return; + ret = fx3_control_read(B200_VREQ_AD9361_CTRL_READ, 0x00, 0x00, out_buff, bytes_to_read, 1000); + if (ret < 0) + throw uhd::io_error((boost::format("Failed to read AD9361 (%d: %s)") % ret % libusb_error_name(ret)).str()); + + if (ret == bytes_to_read) + return; } - throw uhd::io_error(str(boost::format("ad9361_transact failed with usb error: %d") % ret)); + + throw uhd::io_error(str(boost::format("Failed to read complete AD9361 (expecting: %d, last read: %d)") % bytes_to_read % ret)); } - void load_firmware(const std::string filestring, UHD_UNUSED(bool force) = false) { const char *filename = filestring.c_str(); @@ -338,7 +356,7 @@ public: continue; /* Check for valid Intel HEX record. */ - if (!checksum(&record) || !parse_record(&record, len, \ + if (!checksum(record) || !parse_record(record, len, \ lower_address_bits, type, data)) { throw uhd::io_error("fx3_load_firmware: bad intel hex record checksum"); } @@ -411,48 +429,74 @@ public: throw uhd::io_error("fx3_load_firmware: No EOF record found."); } - void reset_fx3(void) { unsigned char data[4]; memset(data, 0x00, sizeof(data)); + const int bytes_to_send = sizeof(data); - fx3_control_write(B200_VREQ_FX3_RESET, 0x00, 0x00, data, 4); + int ret = fx3_control_write(B200_VREQ_FX3_RESET, 0x00, 0x00, data, bytes_to_send); + if (ret < 0) + throw uhd::io_error((boost::format("Failed to reset FX3 (%d: %s)") % ret % libusb_error_name(ret)).str()); + else if (ret != bytes_to_send) + throw uhd::io_error((boost::format("Short write on reset FX3 (expecting: %d, returned: %d)") % bytes_to_send % ret).str()); } void reset_gpif(void) { unsigned char data[4]; memset(data, 0x00, sizeof(data)); + const int bytes_to_send = sizeof(data); - fx3_control_write(B200_VREQ_GPIF_RESET, 0x00, 0x00, data, 4); + int ret = fx3_control_write(B200_VREQ_GPIF_RESET, 0x00, 0x00, data, bytes_to_send); + if (ret < 0) + throw uhd::io_error((boost::format("Failed to reset GPIF (%d: %s)") % ret % libusb_error_name(ret)).str()); + else if (ret != bytes_to_send) + throw uhd::io_error((boost::format("Short write on reset GPIF (expecting: %d, returned: %d)") % bytes_to_send % ret).str()); } - void set_fpga_reset_pin(const bool reset) - { + void set_fpga_reset_pin(const bool reset) { unsigned char data[4]; memset(data, (reset)? 0xFF : 0x00, sizeof(data)); + const int bytes_to_send = sizeof(data); UHD_THROW_INVALID_CODE_PATH(); // Below is dead code as long as UHD_THROW_INVALID_CODE_PATH(); is declared above. // It is preserved here in a comment in case it is needed later: - // fx3_control_write(B200_VREQ_FPGA_RESET, 0x00, 0x00, data, 4); + /* + int ret = fx3_control_write(B200_VREQ_FPGA_RESET, 0x00, 0x00, data, bytes_to_send); + if (ret < 0) + throw uhd::io_error((boost::format("Failed to reset FPGA (%d: %s)") % ret % libusb_error_name(ret)).str()); + else if (ret != bytes_to_send) + throw uhd::io_error((boost::format("Short write on reset FPGA (expecting: %d, returned: %d)") % bytes_to_send % ret).str()); + */ } boost::uint8_t get_usb_speed(void) { unsigned char rx_data[1]; + memset(rx_data, 0x00, sizeof(rx_data)); + const int bytes_to_recv = sizeof(rx_data); - fx3_control_read(B200_VREQ_GET_USB, 0x00, 0x00, rx_data, 1); + int ret = fx3_control_read(B200_VREQ_GET_USB, 0x00, 0x00, rx_data, bytes_to_recv); + if (ret < 0) + throw uhd::io_error((boost::format("Failed to get USB speed (%d: %s)") % ret % libusb_error_name(ret)).str()); + else if (ret != bytes_to_recv) + throw uhd::io_error((boost::format("Short read on get USB speed (expecting: %d, returned: %d)") % bytes_to_recv % ret).str()); return boost::lexical_cast(rx_data[0]); } - boost::uint8_t get_fx3_status(void) { unsigned char rx_data[1]; + memset(rx_data, 0x00, sizeof(rx_data)); + const int bytes_to_recv = sizeof(rx_data); - fx3_control_read(B200_VREQ_GET_STATUS, 0x00, 0x00, &rx_data[0], 1); + int ret = fx3_control_read(B200_VREQ_GET_STATUS, 0x00, 0x00, rx_data, bytes_to_recv); + if (ret < 0) + throw uhd::io_error((boost::format("Failed to get FX3 status (%d: %s)") % ret % libusb_error_name(ret)).str()); + else if (ret != bytes_to_recv) + throw uhd::io_error((boost::format("Short read on get FX3 status (expecting: %d, returned: %d)") % bytes_to_recv % ret).str()); return boost::lexical_cast(rx_data[0]); } @@ -460,40 +504,72 @@ public: boost::uint16_t get_compat_num(void) { unsigned char rx_data[2]; + memset(rx_data, 0x00, sizeof(rx_data)); + const int bytes_to_recv = sizeof(rx_data); - fx3_control_read(B200_VREQ_GET_COMPAT , 0x00, 0x00, rx_data, 2); - - boost::uint16_t compat = 0x0000; - compat |= (((uint16_t) rx_data[0]) << 8); - compat |= (rx_data[1] & 0x00FF); + int ret = fx3_control_read(B200_VREQ_GET_COMPAT , 0x00, 0x00, rx_data, bytes_to_recv); + if (ret < 0) + throw uhd::io_error((boost::format("Failed to get compat num (%d: %s)") % ret % libusb_error_name(ret)).str()); + else if (ret != bytes_to_recv) + throw uhd::io_error((boost::format("Short read on get compat num (expecting: %d, returned: %d)") % bytes_to_recv % ret).str()); - return compat; + return (((uint16_t)rx_data[0]) << 8) | rx_data[1]; } void usrp_get_firmware_hash(hash_type &hash) { - fx3_control_read(B200_VREQ_GET_FW_HASH, 0x00, 0x00, - (unsigned char*) &hash, 4, 500); + const int bytes_to_recv = 4; + if (sizeof(hash_type) != bytes_to_recv) + throw uhd::type_error((boost::format("hash_type is %d bytes but transfer length is %d bytes") % sizeof(hash_type) % bytes_to_recv).str()); + + int ret = fx3_control_read(B200_VREQ_GET_FW_HASH, 0x00, 0x00, (unsigned char*) &hash, bytes_to_recv, 500); + if (ret < 0) + throw uhd::io_error((boost::format("Failed to get firmware hash (%d: %s)") % ret % libusb_error_name(ret)).str()); + else if (ret != bytes_to_recv) + throw uhd::io_error((boost::format("Short read on get firmware hash (expecting: %d, returned: %d)") % bytes_to_recv % ret).str()); } void usrp_set_firmware_hash(hash_type hash) { - fx3_control_write(B200_VREQ_SET_FW_HASH, 0x00, 0x00, - (unsigned char*) &hash, 4); + const int bytes_to_send = 4; + if (sizeof(hash_type) != bytes_to_send) + throw uhd::type_error((boost::format("hash_type is %d bytes but transfer length is %d bytes") % sizeof(hash_type) % bytes_to_send).str()); + + int ret = fx3_control_write(B200_VREQ_SET_FW_HASH, 0x00, 0x00, (unsigned char*) &hash, bytes_to_send); + if (ret < 0) + throw uhd::io_error((boost::format("Failed to set firmware hash (%d: %s)") % ret % libusb_error_name(ret)).str()); + else if (ret != bytes_to_send) + throw uhd::io_error((boost::format("Short write on set firmware hash (expecting: %d, returned: %d)") % bytes_to_send % ret).str()); } void usrp_get_fpga_hash(hash_type &hash) { - fx3_control_read(B200_VREQ_GET_FPGA_HASH, 0x00, 0x00, - (unsigned char*) &hash, 4, 500); + const int bytes_to_recv = 4; + if (sizeof(hash_type) != bytes_to_recv) + throw uhd::type_error((boost::format("hash_type is %d bytes but transfer length is %d bytes") % sizeof(hash_type) % bytes_to_recv).str()); + + int ret = fx3_control_read(B200_VREQ_GET_FPGA_HASH, 0x00, 0x00, (unsigned char*) &hash, bytes_to_recv, 500); + if (ret < 0) + throw uhd::io_error((boost::format("Failed to get FPGA hash (%d: %s)") % ret % libusb_error_name(ret)).str()); + else if (ret != bytes_to_recv) + throw uhd::io_error((boost::format("Short read on get FPGA hash (expecting: %d, returned: %d)") % bytes_to_recv % ret).str()); } void usrp_set_fpga_hash(hash_type hash) { - fx3_control_write(B200_VREQ_SET_FPGA_HASH, 0x00, 0x00, - (unsigned char*) &hash, 4); + const int bytes_to_send = 4; + if (sizeof(hash_type) != bytes_to_send) + throw uhd::type_error((boost::format("hash_type is %d bytes but transfer length is %d bytes") % sizeof(hash_type) % bytes_to_send).str()); + + int ret = fx3_control_write(B200_VREQ_SET_FPGA_HASH, 0x00, 0x00, (unsigned char*) &hash, bytes_to_send); + if (ret < 0) + throw uhd::io_error((boost::format("Failed to set FPGA hash (%d: %s)") % ret % libusb_error_name(ret)).str()); + else if (ret != bytes_to_send) + throw uhd::io_error((boost::format("Short write on set FPGA hash (expecting: %d, returned: %d)") % bytes_to_send % ret).str()); } boost::uint32_t load_fpga(const std::string filestring) { boost::uint8_t fx3_state = 0; boost::uint32_t wait_count; + int ret = 0; + int bytes_to_xfer = 0; const char *filename = filestring.c_str(); @@ -515,9 +591,12 @@ public: // Request loopback read, which will indicate the firmware's current control request buffer size // Make sure that if operating as USB2, requested length is within spec - int nread = fx3_control_read(B200_VREQ_LOOP, 0, 0, out_buff, std::min(transfer_size, (int)sizeof(out_buff)), 1000); - if (nread <= 0) - throw uhd::io_error("load_fpga: unable to complete firmware loopback request."); + int ntoread = std::min(transfer_size, (int)sizeof(out_buff)); + int nread = fx3_control_read(B200_VREQ_LOOP, 0, 0, out_buff, ntoread, 1000); + if (nread < 0) + throw uhd::io_error((boost::format("load_fpga: unable to complete firmware loopback request (%d: %s)") % nread % libusb_error_name(nread)).str()); + else if (nread != ntoread) + throw uhd::io_error((boost::format("load_fpga: short read on firmware loopback request (expecting: %d, returned: %d)") % ntoread % nread).str()); transfer_size = std::min(transfer_size, nread); // Select the smaller value size_t file_size = 0; @@ -529,18 +608,26 @@ public: std::ifstream file; file.open(filename, std::ios::in | std::ios::binary); - if(!file.good()) { + if (!file.good()) { throw uhd::io_error("load_fpga: cannot open FPGA input file."); } + + // Zero the hash, in case we abort programming another image and revert to the previously programmed image + usrp_set_fpga_hash(0); memset(out_buff, 0x00, sizeof(out_buff)); - fx3_control_write(B200_VREQ_FPGA_CONFIG, 0, 0, out_buff, 1, 1000); + bytes_to_xfer = 1; + ret = fx3_control_write(B200_VREQ_FPGA_CONFIG, 0, 0, out_buff, bytes_to_xfer, 1000); + if (ret < 0) + throw uhd::io_error((boost::format("Failed to start FPGA config (%d: %s)") % ret % libusb_error_name(ret)).str()); + else if (ret != bytes_to_xfer) + throw uhd::io_error((boost::format("Short write on start FPGA config (expecting: %d, returned: %d)") % bytes_to_xfer % ret).str()); wait_count = 0; do { fx3_state = get_fx3_status(); - if((wait_count >= 500) || (fx3_state == FX3_STATE_ERROR)) { + if((wait_count >= 500) || (fx3_state == FX3_STATE_ERROR) || (fx3_state == FX3_STATE_UNDEFINED)) { return fx3_state; } @@ -552,13 +639,18 @@ public: if (load_img_msg) UHD_MSG(status) << "Loading FPGA image: " \ << filestring << "..." << std::flush; - fx3_control_write(B200_VREQ_FPGA_START, 0, 0, out_buff, 1, 1000); + bytes_to_xfer = 1; + ret = fx3_control_write(B200_VREQ_FPGA_START, 0, 0, out_buff, bytes_to_xfer, 1000); + if (ret < 0) + throw uhd::io_error((boost::format("Failed to start FPGA bitstream (%d: %s)") % ret % libusb_error_name(ret)).str()); + else if (ret != bytes_to_xfer) + throw uhd::io_error((boost::format("Short write on start FPGA bitstream (expecting: %d, returned: %d)") % bytes_to_xfer % ret).str()); wait_count = 0; do { fx3_state = get_fx3_status(); - if((wait_count >= 1000) || (fx3_state == FX3_STATE_ERROR)) { + if((wait_count >= 1000) || (fx3_state == FX3_STATE_ERROR) || (fx3_state == FX3_STATE_UNDEFINED)) { return fx3_state; } @@ -568,19 +660,20 @@ public: } while(fx3_state != FX3_STATE_CONFIGURING_FPGA); size_t bytes_sent = 0; - while(!file.eof()) { + while (!file.eof()) { file.read((char *) out_buff, transfer_size); const std::streamsize n = file.gcount(); - if(n == 0) continue; + if(n == 0) + continue; boost::uint16_t transfer_count = boost::uint16_t(n); /* Send the data to the device. */ int nwritten = fx3_control_write(B200_VREQ_FPGA_DATA, 0, 0, out_buff, transfer_count, 5000); - if (nwritten <= 0) - throw uhd::io_error("load_fpga: cannot write bitstream to FX3."); + if (nwritten < 0) + throw uhd::io_error((boost::format("load_fpga: cannot write bitstream to FX3 (%d: %s)") % nwritten % libusb_error_name(nwritten)).str()); else if (nwritten != transfer_count) - throw uhd::io_error("load_fpga: short write while transferring bitstream to FX3."); + throw uhd::io_error((boost::format("load_fpga: short write while transferring bitstream to FX3 (expecting: %d, returned: %d)") % transfer_count % nwritten).str()); if (load_img_msg) { @@ -601,7 +694,7 @@ public: do { fx3_state = get_fx3_status(); - if((wait_count >= 500) || (fx3_state == FX3_STATE_ERROR)) { + if((wait_count >= 500) || (fx3_state == FX3_STATE_ERROR) || (fx3_state == FX3_STATE_UNDEFINED)) { return fx3_state; } @@ -612,7 +705,8 @@ public: usrp_set_fpga_hash(hash); - if (load_img_msg) UHD_MSG(status) << "\b\b\b\b done" << std::endl; + if (load_img_msg) + UHD_MSG(status) << "\b\b\b\b done" << std::endl; return 0; } diff --git a/host/lib/usrp/b200/b200_impl.hpp b/host/lib/usrp/b200/b200_impl.hpp index 362c45347..bee42679b 100644 --- a/host/lib/usrp/b200/b200_impl.hpp +++ b/host/lib/usrp/b200/b200_impl.hpp @@ -44,9 +44,9 @@ #include #include #include "recv_packet_demuxer_3000.hpp" -static const boost::uint8_t B200_FW_COMPAT_NUM_MAJOR = 0x03; +static const boost::uint8_t B200_FW_COMPAT_NUM_MAJOR = 0x04; static const boost::uint8_t B200_FW_COMPAT_NUM_MINOR = 0x00; -static const boost::uint16_t B200_FPGA_COMPAT_NUM = 0x02; +static const boost::uint16_t B200_FPGA_COMPAT_NUM = 0x03; static const double B200_LINK_RATE_BPS = (5e9)/8; //practical link rate (5 Gbps) static const double B200_BUS_CLOCK_RATE = 100e6; static const double B200_DEFAULT_TICK_RATE = 32e6; diff --git a/host/lib/usrp/b200/b200_io_impl.cpp b/host/lib/usrp/b200/b200_io_impl.cpp index 4fe90bd4a..4768aa37b 100644 --- a/host/lib/usrp/b200/b200_io_impl.cpp +++ b/host/lib/usrp/b200/b200_io_impl.cpp @@ -249,14 +249,14 @@ rx_streamer::sptr b200_impl::get_rx_stream(const uhd::stream_args_t &args_) //calculate packet size static const size_t hdr_size = 0 + vrt::max_if_hdr_words32*sizeof(boost::uint32_t) - //+ sizeof(vrt::if_packet_info_t().tlr) //forced to have trailer + //+ sizeof(vrt::if_packet_info_t().tlr) //no longer using trailer - sizeof(vrt::if_packet_info_t().cid) //no class id ever used - sizeof(vrt::if_packet_info_t().tsi) //no int time ever used ; const size_t bpp = _data_transport->get_recv_frame_size() - hdr_size; const size_t bpi = convert::get_bytes_per_item(args.otw_format); size_t spp = unsigned(args.args.cast("spp", bpp/bpi)); - spp = std::min(2000, spp); //magic maximum for framing at full rate + spp = std::min(4092, spp); //FPGA FIFO maximum for framing at full rate //make the new streamer given the samples per packet if (not my_streamer) my_streamer = boost::make_shared(spp); -- cgit v1.2.3 From 37d3542f9ca9ec44937ad6a65029a73bee3b9385 Mon Sep 17 00:00:00 2001 From: Nicholas Corgan Date: Tue, 3 Dec 2013 06:24:34 -0800 Subject: lib: fixed use of -> to . after switching parameter from pointer to reference --- host/lib/usrp/b200/b200_iface.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'host/lib/usrp') diff --git a/host/lib/usrp/b200/b200_iface.cpp b/host/lib/usrp/b200/b200_iface.cpp index b60c72fa8..7809781d8 100644 --- a/host/lib/usrp/b200/b200_iface.cpp +++ b/host/lib/usrp/b200/b200_iface.cpp @@ -168,7 +168,7 @@ bool parse_record(const std::string& record, boost::uint16_t &len, \ std::istringstream(record.substr(3, 4)) >> std::hex >> addr; std::istringstream(record.substr(7, 2)) >> std::hex >> type; - if (len > (2 * (record->length() - 9))) // sanity check to prevent buffer overrun + if (len > (2 * (record.length() - 9))) // sanity check to prevent buffer overrun return false; for (i = 0; i < len; i++) { -- cgit v1.2.3