From b993f4f0d85eee53c1256e0381c3a173af7d5833 Mon Sep 17 00:00:00 2001 From: Martin Braun Date: Wed, 15 Mar 2017 13:57:57 -0700 Subject: cores: Update rx_frontend_gen3.v controls for 1/4-rate mixer This tracks the changes on rx_frontend_gen3.v, which was updated to use a quarter-rate downconverter instead of a generic CORDIC. The X3x0 FPGA compat number is incremented as the rx_frontend is part of the device architecture rather than an RFNoC block. --- host/lib/usrp/cores/rx_frontend_core_3000.cpp | 18 +++++++++++------- host/lib/usrp/x300/x300_fw_common.h | 2 +- 2 files changed, 12 insertions(+), 8 deletions(-) (limited to 'host/lib/usrp') diff --git a/host/lib/usrp/cores/rx_frontend_core_3000.cpp b/host/lib/usrp/cores/rx_frontend_core_3000.cpp index 841a72d9b..a5052ea02 100644 --- a/host/lib/usrp/cores/rx_frontend_core_3000.cpp +++ b/host/lib/usrp/cores/rx_frontend_core_3000.cpp @@ -1,12 +1,13 @@ // // Copyright 2011-2012,2014-2016 Ettus Research LLC -// Copyright 2018 Ettus Research, a National Instruments Company +// Copyright 2017-2018 Ettus Research, a National Instruments Company // // SPDX-License-Identifier: GPL-3.0-or-later // #include #include +#include #include #include #include @@ -96,11 +97,10 @@ public: _iface->poke32(REG_RX_FE_MAPPING, mapping_reg_val); UHD_ASSERT_THROW(_adc_rate!=0.0) - double cordic_freq = 0.0, actual_cordic_freq = 0.0; if (fe_conn.get_sampling_mode() == fe_connection_t::HETERODYNE) { //1. Remember the sign of the IF frequency. // It will be discarded in the next step - int if_freq_sign = boost::math::sign(fe_conn.get_if_freq()); + const int if_freq_sign = boost::math::sign(fe_conn.get_if_freq()); //2. Map IF frequency to the range [0, _adc_rate) double if_freq = std::abs(std::fmod(fe_conn.get_if_freq(), _adc_rate)); //3. Map IF frequency to the range [-_adc_rate/2, _adc_rate/2) @@ -110,11 +110,15 @@ public: } //4. Set DSP offset to spin the signal in the opposite // direction as the aliased frequency - cordic_freq = if_freq * (-if_freq_sign); + const double cordic_freq = if_freq * (-if_freq_sign); + UHD_ASSERT_THROW( + uhd::math::fp_compare::fp_compare_epsilon(4.0) == + std::abs(_adc_rate / cordic_freq) + ); + + _iface->poke32(REG_RX_FE_HET_CORDIC_PHASE, (cordic_freq > 0) ? 0 : 1); } - int32_t freq_word; - get_freq_and_freq_word(cordic_freq, _adc_rate, actual_cordic_freq, freq_word); - _iface->poke32(REG_RX_FE_HET_CORDIC_PHASE, uint32_t(freq_word)); + _fe_conn = fe_conn; } diff --git a/host/lib/usrp/x300/x300_fw_common.h b/host/lib/usrp/x300/x300_fw_common.h index e240d8be6..45301640a 100644 --- a/host/lib/usrp/x300/x300_fw_common.h +++ b/host/lib/usrp/x300/x300_fw_common.h @@ -23,7 +23,7 @@ extern "C" { #define X300_REVISION_MIN 2 #define X300_FW_COMPAT_MAJOR 6 #define X300_FW_COMPAT_MINOR 0 -#define X300_FPGA_COMPAT_MAJOR 0x23 +#define X300_FPGA_COMPAT_MAJOR 0x24 //shared memory sections - in between the stack and the program space #define X300_FW_SHMEM_BASE 0x6000 -- cgit v1.2.3