From c5223d192205f729b316197c83fc69eb67b6ee45 Mon Sep 17 00:00:00 2001
From: Josh Blum <josh@joshknows.com>
Date: Mon, 25 Mar 2013 13:12:55 -0700
Subject: usrp1: fix eeprom write capability through fx2

The vectorized eeprom write was faster but broken,
removed overload which falls back to the one byte at a time.
---
 host/lib/usrp/common/fx2_ctrl.cpp | 11 -----------
 1 file changed, 11 deletions(-)

(limited to 'host/lib/usrp')

diff --git a/host/lib/usrp/common/fx2_ctrl.cpp b/host/lib/usrp/common/fx2_ctrl.cpp
index 93303542e..1f9cb84b3 100644
--- a/host/lib/usrp/common/fx2_ctrl.cpp
+++ b/host/lib/usrp/common/fx2_ctrl.cpp
@@ -410,17 +410,6 @@ public:
         return usrp_control_write(request, value, index, 0, 0);
     }
 
-    void write_eeprom(
-        boost::uint8_t addr,
-        boost::uint8_t offset,
-        const byte_vector_t &bytes
-    ){
-        byte_vector_t bytes_with_cmd(bytes.size() + 1);
-        bytes_with_cmd[0] = offset;
-        std::copy(bytes.begin(), bytes.end(), &bytes_with_cmd[1]);
-        this->write_i2c(addr, bytes_with_cmd);
-    }
-
     byte_vector_t read_eeprom(
         boost::uint8_t addr,
         boost::uint8_t offset,
-- 
cgit v1.2.3


From ee3082224f579da63b33f44f5275288032aac774 Mon Sep 17 00:00:00 2001
From: Josh Blum <josh@joshknows.com>
Date: Thu, 14 Mar 2013 17:48:34 -0700
Subject: e100: switch to fixed length xfers

---
 host/lib/usrp/e100/e100_ctrl.cpp           | 22 ++++++++++------------
 host/lib/usrp/e100/e100_impl.cpp           |  6 ++++++
 host/lib/usrp/e100/e100_mmap_zero_copy.cpp |  2 +-
 host/lib/usrp/e100/io_impl.cpp             |  2 +-
 4 files changed, 18 insertions(+), 14 deletions(-)

(limited to 'host/lib/usrp')

diff --git a/host/lib/usrp/e100/e100_ctrl.cpp b/host/lib/usrp/e100/e100_ctrl.cpp
index 5a9b93633..c9c86c8af 100644
--- a/host/lib/usrp/e100/e100_ctrl.cpp
+++ b/host/lib/usrp/e100/e100_ctrl.cpp
@@ -87,7 +87,12 @@ public:
         spi_sclk_gpio(65, "out"),
         spi_sen_gpio(186, "out"),
         spi_mosi_gpio(145, "out"),
-        spi_miso_gpio(147, "in"){}
+        spi_miso_gpio(147, "in")
+    {
+        this->spi_sen_gpio(1); //not selected
+        this->spi_sclk_gpio(0); //into reset
+        this->spi_sclk_gpio(1); //out of reset
+    }
 
     boost::uint32_t transact_spi(
         int, const spi_config_t &, //not used params
@@ -290,9 +295,11 @@ struct e100_simpl_msb : managed_send_buffer
 
     void release(void)
     {
+        const size_t max_words32 = 8; //.LAST_ADDR(10'h00f)) resp_fifo_to_gpmc
+
         //load the data struct
         data.offset = 0;
-        data.count = size()/4+1/*1 for header offset*/;
+        data.count = max_words32;
 
         //call the ioctl
         ctrl->ioctl(USRP_E_WRITE_CTL32, &data);
@@ -300,7 +307,7 @@ struct e100_simpl_msb : managed_send_buffer
 
     sptr get_new(void)
     {
-        return make(this, data.buf+1, sizeof(data.buf)-4);
+        return make(this, data.buf, sizeof(data.buf));
     }
 };
 
@@ -334,15 +341,6 @@ public:
             ) % USRP_E_COMPAT_NUMBER % module_compat_num));
         }
 
-        //hit the magic arst condition
-        //async_reset <= ~EM_NCS6 && ~EM_NWE && (EM_A[9:2] == 8'hff) && EM_D[0];
-        usrp_e_ctl16 datax;
-        datax.offset = 0x3fc;
-        datax.count = 2;
-        datax.buf[0] = 1;
-        datax.buf[1] = 0;
-        this->ioctl(USRP_E_WRITE_CTL16, &datax);
-
         std::ofstream edge_file("/sys/class/gpio/gpio147/edge");
         edge_file << "rising" << std::endl << std::flush;
         edge_file.close();
diff --git a/host/lib/usrp/e100/e100_impl.cpp b/host/lib/usrp/e100/e100_impl.cpp
index a0fa6c47e..619ea8f8e 100644
--- a/host/lib/usrp/e100/e100_impl.cpp
+++ b/host/lib/usrp/e100/e100_impl.cpp
@@ -534,6 +534,12 @@ void e100_impl::check_fpga_compat(void){
             "The FPGA build is not compatible with the host code build."
         ) % int(E100_FPGA_COMPAT_NUM) % fpga_major));
     }
+    if (fpga_minor < 2){
+        throw uhd::runtime_error(str(boost::format(
+            "Expected FPGA compatibility minor number at least %d, but got %d:\n"
+            "The FPGA build is not compatible with the host code build."
+        ) % int(2) % fpga_minor));
+    }
     _tree->create<std::string>("/mboards/0/fpga_version").set(str(boost::format("%u.%u") % fpga_major % fpga_minor));
 }
 
diff --git a/host/lib/usrp/e100/e100_mmap_zero_copy.cpp b/host/lib/usrp/e100/e100_mmap_zero_copy.cpp
index 58beeb424..57e4e32d9 100644
--- a/host/lib/usrp/e100/e100_mmap_zero_copy.cpp
+++ b/host/lib/usrp/e100/e100_mmap_zero_copy.cpp
@@ -70,7 +70,7 @@ public:
 
     void release(void){
         if (fp_verbose) UHD_LOGV(always) << "send buff: commit " << size() << std::endl;
-        _info->len = size();
+        _info->len = _len;//size();
         _info->flags = RB_USER; //release the frame
         if (::write(_fd, NULL, 0) < 0){ //notifies the kernel
             UHD_LOGV(rarely) << UHD_THROW_SITE_INFO("write error") << std::endl;
diff --git a/host/lib/usrp/e100/io_impl.cpp b/host/lib/usrp/e100/io_impl.cpp
index 4d521e222..e34620444 100644
--- a/host/lib/usrp/e100/io_impl.cpp
+++ b/host/lib/usrp/e100/io_impl.cpp
@@ -31,7 +31,7 @@ using namespace uhd;
 using namespace uhd::usrp;
 using namespace uhd::transport;
 
-static const size_t vrt_send_header_offset_words32 = 1;
+static const size_t vrt_send_header_offset_words32 = 0;
 
 void e100_impl::update_tick_rate(const double rate){
 
-- 
cgit v1.2.3