From 31d5c223ed6e0ca5569042fa1dfbcd0f18194d86 Mon Sep 17 00:00:00 2001 From: Moritz Fischer Date: Tue, 19 Apr 2016 09:15:50 -0700 Subject: e3xx: spi: Fix issue introduced in 1b149f56 Kernels (3.15+) introduce the possibility to do DUAL and QUAD spi operations via spidev. Prior to this commit nothing was setting the {tx,rx}_nbits members of the struct spi_ioc_transfer. from include/uapi/linux/spi/spidev.h struct spi_ioc_transfer { __u64 tx_buf; __u64 rx_buf; __u32 len; __u32 speed_hz; __u16 delay_usecs; __u8 bits_per_word; __u8 cs_change; __u8 tx_nbits; __u8 rx_nbits; __u16 pad; }; This turns into an issue on more recent kernels, where it turns all transactions into QUAD transactions, while the controller actually doesn't support that mode of operation. Signed-off-by: Moritz Fischer --- host/lib/usrp/e300/e300_spi.cpp | 2 ++ 1 file changed, 2 insertions(+) (limited to 'host/lib/usrp') diff --git a/host/lib/usrp/e300/e300_spi.cpp b/host/lib/usrp/e300/e300_spi.cpp index 2722d7f53..74d348555 100644 --- a/host/lib/usrp/e300/e300_spi.cpp +++ b/host/lib/usrp/e300/e300_spi.cpp @@ -93,6 +93,8 @@ public: tr.rx_buf = (unsigned long) &rx[0]; tr.len = num_bits >> 3; tr.bits_per_word = _bits; + tr.tx_nbits = 1; + tr.rx_nbits = 1; tr.speed_hz = _speed; tr.delay_usecs = _delay; -- cgit v1.2.3