From 4d9c03d44b02d0ee91355280dbc58d1f19deddea Mon Sep 17 00:00:00 2001 From: Michael West Date: Tue, 18 Feb 2014 16:18:04 -0800 Subject: - Fix for BUG #264: ./test_pps_input --source external passes even with no 1 PPS on external input on X3xx - Fixed behavior of PPS and clock references to be consistent and intuitive. -- Added detection of clock reference and PPS. -- Changed order of precedence to external, gpsdo, internal for default of clock and PPS. -- Throws runtime error if the user requests a reference clock or PPS that is not present. - Bumped FPGA compatibility to 4. --- host/lib/usrp/x300/x300_regs.hpp | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'host/lib/usrp/x300/x300_regs.hpp') diff --git a/host/lib/usrp/x300/x300_regs.hpp b/host/lib/usrp/x300/x300_regs.hpp index e4ae76a38..fb1786deb 100644 --- a/host/lib/usrp/x300/x300_regs.hpp +++ b/host/lib/usrp/x300/x300_regs.hpp @@ -68,12 +68,26 @@ localparam ZPU_SR_SPI = 32; localparam ZPU_SR_ETHINT0 = 40; localparam ZPU_SR_ETHINT1 = 56; +//clock controls +#define ZPU_SR_CLOCK_CTRL_CLK_SRC_EXTERNAL 0x00 +#define ZPU_SR_CLOCK_CTRL_CLK_SRC_INTERNAL 0x02 +#define ZPU_SR_CLOCK_CTRL_CLK_SRC_GPSDO 0x03 +#define ZPU_SR_CLOCK_CTRL_PPS_SRC_EXTERNAL 0x00 +#define ZPU_SR_CLOCK_CTRL_PPS_SRC_INTERNAL 0x02 +#define ZPU_SR_CLOCK_CTRL_PPS_SRC_GPSDO 0x03 + localparam ZPU_RB_SPI = 2; localparam ZPU_RB_CLK_STATUS = 3; localparam ZPU_RB_COMPAT_NUM = 6; localparam ZPU_RB_ETH_TYPE0 = 4; localparam ZPU_RB_ETH_TYPE1 = 5; +//clock status +#define ZPU_RB_CLK_STATUS_LMK_STATUS (0x3 << 0) +#define ZPU_RB_CLK_STATUS_LMK_LOCK (0x1 << 2) +#define ZPU_RB_CLK_STATUS_LMK_HOLDOVER (0x1 << 3) +#define ZPU_RB_CLK_STATUS_PPS_DETECT (0x1 << 4) + //spi slaves on radio #define DB_DAC_SEN (1 << 7) #define DB_ADC_SEN (1 << 6) -- cgit v1.2.3