From 46b20f25556620433c89b16984dc1633221ae28b Mon Sep 17 00:00:00 2001 From: Josh Blum Date: Thu, 28 Apr 2011 15:35:28 -0700 Subject: usrp2: use default mtu as upper limit unless user specifies --- host/lib/usrp/usrp2/usrp2_impl.cpp | 23 ++++++++++++----------- 1 file changed, 12 insertions(+), 11 deletions(-) (limited to 'host/lib/usrp/usrp2') diff --git a/host/lib/usrp/usrp2/usrp2_impl.cpp b/host/lib/usrp/usrp2/usrp2_impl.cpp index 48443bba4..77370a7fd 100644 --- a/host/lib/usrp/usrp2/usrp2_impl.cpp +++ b/host/lib/usrp/usrp2/usrp2_impl.cpp @@ -163,7 +163,7 @@ struct mtu_result_t{ size_t recv_mtu, send_mtu; }; -static mtu_result_t determine_mtu(const std::string &addr){ +static mtu_result_t determine_mtu(const std::string &addr, const mtu_result_t &user_mtu){ udp_simple::sptr udp_sock = udp_simple::make_connected( addr, BOOST_STRINGIZE(USRP2_UDP_CTRL_PORT) ); @@ -171,8 +171,8 @@ static mtu_result_t determine_mtu(const std::string &addr){ //The FPGA offers 4K buffers, and the user may manually request this. //However, multiple simultaneous receives (2DSP slave + 2DSP master), //require that buffering to be used internally, and this is a safe setting. - boost::uint8_t buffer[2000]; - usrp2_ctrl_data_t *ctrl_data = reinterpret_cast(buffer); + std::vector buffer(std::max(user_mtu.recv_mtu, user_mtu.send_mtu)); + usrp2_ctrl_data_t *ctrl_data = reinterpret_cast(&buffer.front()); static const double echo_timeout = 0.020; //20 ms //test holler - check if its supported in this fw version @@ -184,8 +184,8 @@ static mtu_result_t determine_mtu(const std::string &addr){ if (ntohl(ctrl_data->id) != USRP2_CTRL_ID_HOLLER_BACK_DUDE) throw uhd::not_implemented_error("holler protocol not implemented"); - size_t min_recv_mtu = sizeof(usrp2_ctrl_data_t), max_recv_mtu = sizeof(buffer); - size_t min_send_mtu = sizeof(usrp2_ctrl_data_t), max_send_mtu = sizeof(buffer); + size_t min_recv_mtu = sizeof(usrp2_ctrl_data_t), max_recv_mtu = user_mtu.recv_mtu; + size_t min_send_mtu = sizeof(usrp2_ctrl_data_t), max_send_mtu = user_mtu.send_mtu; while (min_recv_mtu < max_recv_mtu){ @@ -246,19 +246,20 @@ usrp2_impl::usrp2_impl(const device_addr_t &_device_addr){ device_addrs_t device_args = separate_device_addr(device_addr); + //extract the user's requested MTU size or default + mtu_result_t user_mtu; + user_mtu.recv_mtu = size_t(device_addr.cast("recv_frame_size", udp_simple::mtu)); + user_mtu.send_mtu = size_t(device_addr.cast("recv_frame_size", udp_simple::mtu)); + try{ //calculate the minimum send and recv mtu of all devices - mtu_result_t mtu = determine_mtu(device_args[0]["addr"]); + mtu_result_t mtu = determine_mtu(device_args[0]["addr"], user_mtu); for (size_t i = 1; i < device_args.size(); i++){ - mtu_result_t mtu_i = determine_mtu(device_args[i]["addr"]); + mtu_result_t mtu_i = determine_mtu(device_args[i]["addr"], user_mtu); mtu.recv_mtu = std::min(mtu.recv_mtu, mtu_i.recv_mtu); mtu.send_mtu = std::min(mtu.send_mtu, mtu_i.send_mtu); } - //use the discovered mtu or clip the users requested mtu - mtu.recv_mtu = std::min(size_t(device_addr.cast("recv_frame_size", 9000)), mtu.recv_mtu); - mtu.send_mtu = std::min(size_t(device_addr.cast("send_frame_size", 9000)), mtu.send_mtu); - device_addr["recv_frame_size"] = boost::lexical_cast(mtu.recv_mtu); device_addr["send_frame_size"] = boost::lexical_cast(mtu.send_mtu); -- cgit v1.2.3 From b4fc0d61bb6cbd1a5614745bab9aeb0abc22cb6f Mon Sep 17 00:00:00 2001 From: Josh Blum Date: Tue, 3 May 2011 13:35:15 -0700 Subject: usrp2: added REF_MIMO and PPS_MIMO for USRP2 clock config Basically, one can tell a MIMO master to lock to MIMO ref and/or time. This is an alternative to the mimo_mode=slave/master device args. When using this alternative, one should always set the mimo_mode to maser. When in master mode, any clock config settings can be used. When in slave mode, the clock config setting are forced to MIMO_REF/PPS --- host/include/uhd/types/clock_config.hpp | 2 ++ host/lib/usrp/usrp2/mboard_impl.cpp | 38 ++++++++++++++++++++------------- 2 files changed, 25 insertions(+), 15 deletions(-) (limited to 'host/lib/usrp/usrp2') diff --git a/host/include/uhd/types/clock_config.hpp b/host/include/uhd/types/clock_config.hpp index 577416d77..24bd96d14 100644 --- a/host/include/uhd/types/clock_config.hpp +++ b/host/include/uhd/types/clock_config.hpp @@ -44,10 +44,12 @@ namespace uhd{ REF_AUTO = int('a'), //automatic (device specific) REF_INT = int('i'), //internal reference REF_SMA = int('s'), //external sma port + REF_MIMO = int('m'), //reference from mimo cable } ref_source; enum pps_source_t { PPS_INT = int('i'), //there is no internal PPS_SMA = int('s'), //external sma port + PPS_MIMO = int('m'), //time sync from mimo cable } pps_source; enum pps_polarity_t { PPS_NEG = int('n'), //negative edge diff --git a/host/lib/usrp/usrp2/mboard_impl.cpp b/host/lib/usrp/usrp2/mboard_impl.cpp index ae098dba6..d4ae27763 100644 --- a/host/lib/usrp/usrp2/mboard_impl.cpp +++ b/host/lib/usrp/usrp2/mboard_impl.cpp @@ -191,9 +191,25 @@ usrp2_mboard_impl::~usrp2_mboard_impl(void){ void usrp2_mboard_impl::update_clock_config(void){ boost::uint32_t pps_flags = 0; + //slave mode overrides clock config settings + if (not _mimo_clocking_mode_is_master){ + _clock_config.ref_source = clock_config_t::REF_MIMO; + _clock_config.pps_source = clock_config_t::PPS_MIMO; + } + //translate pps source enums switch(_clock_config.pps_source){ - case clock_config_t::PPS_SMA: pps_flags |= U2_FLAG_TIME64_PPS_SMA; break; + case clock_config_t::PPS_MIMO: + _iface->poke32(_iface->regs.time64_mimo_sync, + (1 << 8) | (mimo_clock_sync_delay_cycles & 0xff) + ); + break; + + case clock_config_t::PPS_SMA: + _iface->poke32(_iface->regs.time64_mimo_sync, 0); + pps_flags |= U2_FLAG_TIME64_PPS_SMA; + break; + default: throw uhd::value_error("unhandled clock configuration pps source"); } @@ -214,6 +230,7 @@ void usrp2_mboard_impl::update_clock_config(void){ switch(_clock_config.ref_source){ case clock_config_t::REF_INT : _iface->poke32(_iface->regs.misc_ctrl_clock, 0x12); break; case clock_config_t::REF_SMA : _iface->poke32(_iface->regs.misc_ctrl_clock, 0x1C); break; + case clock_config_t::REF_MIMO: _iface->poke32(_iface->regs.misc_ctrl_clock, 0x15); break; default: throw uhd::value_error("unhandled clock configuration reference source"); } _clock_ctrl->enable_external_ref(true); //USRP2P has an internal 10MHz TCXO @@ -224,6 +241,7 @@ void usrp2_mboard_impl::update_clock_config(void){ switch(_clock_config.ref_source){ case clock_config_t::REF_INT : _iface->poke32(_iface->regs.misc_ctrl_clock, 0x10); break; case clock_config_t::REF_SMA : _iface->poke32(_iface->regs.misc_ctrl_clock, 0x1C); break; + case clock_config_t::REF_MIMO: _iface->poke32(_iface->regs.misc_ctrl_clock, 0x15); break; default: throw uhd::value_error("unhandled clock configuration reference source"); } _clock_ctrl->enable_external_ref(_clock_config.ref_source != clock_config_t::REF_INT); @@ -232,12 +250,11 @@ void usrp2_mboard_impl::update_clock_config(void){ case usrp2_iface::USRP_NXXX: break; } - //Handle the serdes clocking based on master/slave mode: - // - Masters always drive the clock over serdes. - // - Slaves always lock to this serdes clock. - // - Slaves lock their time over the serdes. + //masters always drive the clock over serdes + _clock_ctrl->enable_mimo_clock_out(_mimo_clocking_mode_is_master); + + //set the mimo clock delay over the serdes if (_mimo_clocking_mode_is_master){ - _clock_ctrl->enable_mimo_clock_out(true); switch(_iface->get_rev()){ case usrp2_iface::USRP_N200: case usrp2_iface::USRP_N210: @@ -250,15 +267,6 @@ void usrp2_mboard_impl::update_clock_config(void){ default: break; //not handled } - _iface->poke32(_iface->regs.time64_mimo_sync, 0); - } - else{ - _iface->poke32(_iface->regs.misc_ctrl_clock, 0x15); - _clock_ctrl->enable_external_ref(true); - _clock_ctrl->enable_mimo_clock_out(false); - _iface->poke32(_iface->regs.time64_mimo_sync, - (1 << 8) | (mimo_clock_sync_delay_cycles & 0xff) - ); } } -- cgit v1.2.3