From 781cafa8717f00b883a4543b4a9150060691eee3 Mon Sep 17 00:00:00 2001
From: Josh Blum <josh@joshknows.com>
Date: Sat, 28 Jan 2012 17:21:40 -0800
Subject: gen2: added user setting regs api and user core

---
 host/lib/usrp/e100/e100_impl.cpp | 7 +++++++
 host/lib/usrp/e100/e100_impl.hpp | 2 ++
 host/lib/usrp/e100/e100_regs.hpp | 1 +
 3 files changed, 10 insertions(+)

(limited to 'host/lib/usrp/e100')

diff --git a/host/lib/usrp/e100/e100_impl.cpp b/host/lib/usrp/e100/e100_impl.cpp
index f58138ae6..cd6143a16 100644
--- a/host/lib/usrp/e100/e100_impl.cpp
+++ b/host/lib/usrp/e100/e100_impl.cpp
@@ -352,6 +352,13 @@ e100_impl::e100_impl(const uhd::device_addr_t &device_addr){
     static const std::vector<std::string> clock_sources = boost::assign::list_of("internal")("external")("auto");
     _tree->create<std::vector<std::string> >(mb_path / "clock_source/options").set(clock_sources);
 
+    ////////////////////////////////////////////////////////////////////
+    // create user-defined control objects
+    ////////////////////////////////////////////////////////////////////
+    _user = user_settings_core_200::make(_fpga_ctrl, E100_REG_SR_ADDR(UE_SR_USER_REGS));
+    _tree->create<user_settings_core_200::user_reg_t>(mb_path / "user/regs")
+        .subscribe(boost::bind(&user_settings_core_200::set_reg, _user, _1));
+
     ////////////////////////////////////////////////////////////////////
     // create dboard control objects
     ////////////////////////////////////////////////////////////////////
diff --git a/host/lib/usrp/e100/e100_impl.hpp b/host/lib/usrp/e100/e100_impl.hpp
index f94061a24..e641aeea9 100644
--- a/host/lib/usrp/e100/e100_impl.hpp
+++ b/host/lib/usrp/e100/e100_impl.hpp
@@ -25,6 +25,7 @@
 #include "rx_dsp_core_200.hpp"
 #include "tx_dsp_core_200.hpp"
 #include "time64_core_200.hpp"
+#include "user_settings_core_200.hpp"
 #include <uhd/device.hpp>
 #include <uhd/property_tree.hpp>
 #include <uhd/utils/pimpl.hpp>
@@ -92,6 +93,7 @@ private:
     std::vector<rx_dsp_core_200::sptr> _rx_dsps;
     tx_dsp_core_200::sptr _tx_dsp;
     time64_core_200::sptr _time64;
+    user_settings_core_200::sptr _user;
     e100_clock_ctrl::sptr _clock_ctrl;
     e100_codec_ctrl::sptr _codec_ctrl;
     e100_ctrl::sptr _fpga_ctrl;
diff --git a/host/lib/usrp/e100/e100_regs.hpp b/host/lib/usrp/e100/e100_regs.hpp
index f24f5895b..265086540 100644
--- a/host/lib/usrp/e100/e100_regs.hpp
+++ b/host/lib/usrp/e100/e100_regs.hpp
@@ -104,6 +104,7 @@
 #define UE_SR_CLEAR_RX_FIFO 61 // 1 reg
 #define UE_SR_CLEAR_TX_FIFO 62 // 1 reg
 #define UE_SR_GLOBAL_RESET 63  // 1 reg
+#define UE_SR_USER_REGS 64     // 2 regs
 
 #define UE_SR_GPIO 128
 
-- 
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