From 861e66848f05001fcaca4fe91dbf67cd186649dc Mon Sep 17 00:00:00 2001
From: Josh Blum <josh@joshknows.com>
Date: Fri, 7 Oct 2011 17:30:42 -0700
Subject: usrp2: work on alternative OTW formats

---
 host/lib/usrp/cores/rx_dsp_core_200.cpp | 21 +++++++++++++++++++--
 host/lib/usrp/cores/rx_dsp_core_200.hpp |  1 +
 2 files changed, 20 insertions(+), 2 deletions(-)

(limited to 'host/lib/usrp/cores')

diff --git a/host/lib/usrp/cores/rx_dsp_core_200.cpp b/host/lib/usrp/cores/rx_dsp_core_200.cpp
index d562c64db..023216a09 100644
--- a/host/lib/usrp/cores/rx_dsp_core_200.cpp
+++ b/host/lib/usrp/cores/rx_dsp_core_200.cpp
@@ -42,6 +42,7 @@
 #define REG_RX_CTRL_VRT_TLR        _ctrl_base + 24
 #define REG_RX_CTRL_NSAMPS_PP      _ctrl_base + 28
 #define REG_RX_CTRL_NCHANNELS      _ctrl_base + 32
+#define REG_RX_CTRL_FORMAT         _ctrl_base + 36
 
 template <class T> T ceil_log2(T num){
     return std::ceil(std::log(num)/std::log(T(2)));
@@ -162,7 +163,7 @@ public:
     }
 
     double get_scaling_adjustment(void){
-        return _scaling_adjustment;
+        return _scaling_adjustment/_fxpt_scale_adj;
     }
 
     double set_freq(const double freq_){
@@ -192,12 +193,28 @@ public:
         if (_continuous_streaming) issue_stream_command(stream_cmd_t::STREAM_MODE_START_CONTINUOUS);
     }
 
+    void set_format(const std::string &format, const unsigned scale){
+        unsigned format_word = 0;
+        if (format == "sc16"){
+            format_word = 0;
+            _fxpt_scale_adj = 32767.;
+        }
+        else if (format == "sc8"){
+            format_word = (1 << 18);
+            _fxpt_scale_adj = 32767./scale;
+        }
+        else throw uhd::value_error("USRP RX cannot handle requested wire format: " + format);
+
+        const unsigned scale_word = scale & 0x3ffff; //18 bits;
+        _iface->poke32(REG_RX_CTRL_FORMAT, format_word | scale_word);
+    }
+
 private:
     wb_iface::sptr _iface;
     const size_t _dsp_base, _ctrl_base;
     double _tick_rate, _link_rate;
     bool _continuous_streaming;
-    double _scaling_adjustment;
+    double _scaling_adjustment, _fxpt_scale_adj;
 };
 
 rx_dsp_core_200::sptr rx_dsp_core_200::make(wb_iface::sptr iface, const size_t dsp_base, const size_t ctrl_base, const boost::uint32_t sid, const bool lingering_packet){
diff --git a/host/lib/usrp/cores/rx_dsp_core_200.hpp b/host/lib/usrp/cores/rx_dsp_core_200.hpp
index 391cc8441..ddd6f2abf 100644
--- a/host/lib/usrp/cores/rx_dsp_core_200.hpp
+++ b/host/lib/usrp/cores/rx_dsp_core_200.hpp
@@ -56,6 +56,7 @@ public:
 
     virtual void handle_overflow(void) = 0;
 
+    virtual void set_format(const std::string &format, const unsigned scale) = 0;
 };
 
 #endif /* INCLUDED_LIBUHD_USRP_RX_DSP_CORE_200_HPP */
-- 
cgit v1.2.3


From 00b6d8359de6ea616f7bd6573d7f87d635d78a79 Mon Sep 17 00:00:00 2001
From: Josh Blum <josh@joshknows.com>
Date: Thu, 13 Oct 2011 13:08:12 -0700
Subject: uhd: added trailer parsing for occupancy

---
 host/include/uhd/transport/vrt_if_packet.hpp     |  1 +
 host/lib/convert/gen_convert_general.py          |  1 +
 host/lib/transport/gen_vrt_if_packet.py          | 51 ++++++++++++++++--------
 host/lib/transport/super_recv_packet_handler.hpp | 11 ++---
 host/lib/transport/super_send_packet_handler.hpp |  3 +-
 host/lib/usrp/cores/rx_dsp_core_200.cpp          |  3 +-
 host/lib/usrp/cores/tx_dsp_core_200.cpp          |  3 +-
 host/lib/usrp/usrp1/io_impl.cpp                  |  1 +
 8 files changed, 46 insertions(+), 28 deletions(-)

(limited to 'host/lib/usrp/cores')

diff --git a/host/include/uhd/transport/vrt_if_packet.hpp b/host/include/uhd/transport/vrt_if_packet.hpp
index 51bd81bb1..1be480874 100644
--- a/host/include/uhd/transport/vrt_if_packet.hpp
+++ b/host/include/uhd/transport/vrt_if_packet.hpp
@@ -44,6 +44,7 @@ namespace vrt{
 
         //size fields
         size_t num_payload_words32; //required in pack, derived in unpack
+        size_t num_payload_bytes;   //required in pack, derived in unpack
         size_t num_header_words32;  //derived in pack, derived in unpack
         size_t num_packet_words32;  //derived in pack, required in unpack
 
diff --git a/host/lib/convert/gen_convert_general.py b/host/lib/convert/gen_convert_general.py
index 9a1135b0b..be5a65130 100644
--- a/host/lib/convert/gen_convert_general.py
+++ b/host/lib/convert/gen_convert_general.py
@@ -48,6 +48,7 @@ DECLARE_CONVERTER(sc16_item32_$(end), 1, $(cpu_type), 1, PRIORITY_GENERAL){
 }
 
 DECLARE_CONVERTER(sc8_item32_$(end), 1, $(cpu_type), 1, PRIORITY_GENERAL){
+    if (nsamps == 0) return; //otherwise segfault
     const item32_t *input = reinterpret_cast<const item32_t *>(size_t(inputs[0]) & ~0x3);
     $(cpu_type)_t *output = reinterpret_cast<$(cpu_type)_t *>(outputs[0]);
     $(cpu_type)_t dummy;
diff --git a/host/lib/transport/gen_vrt_if_packet.py b/host/lib/transport/gen_vrt_if_packet.py
index 5f048d8c7..245a7ddbd 100755
--- a/host/lib/transport/gen_vrt_if_packet.py
+++ b/host/lib/transport/gen_vrt_if_packet.py
@@ -70,6 +70,10 @@ static pred_table_type get_pred_unpack_table(void){
 
 static const pred_table_type pred_unpack_table(get_pred_unpack_table());
 
+//maps trailer bits to num empty bytes
+//maps num empty bytes to trailer bits
+static const size_t occ_table[] = {0, 2, 1, 3};
+
 ########################################################################
 #def gen_code($XE_MACRO, $suffix)
 ########################################################################
@@ -122,14 +126,6 @@ void vrt::if_hdr_pack_$(suffix)(
             #set $num_header_words += 1
             #set $flags |= (0x1 << 20);
         #end if
-        ########## Trailer ##########
-        #if $pred & $tlr_p
-            //packet_buff[$num_header_words+if_packet_info.num_payload_words32] = $(XE_MACRO)(if_packet_info.tlr);
-            #set $flags |= (0x1 << 26);
-            #set $num_trailer_words = 1;
-        #else
-            #set $num_trailer_words = 0;
-        #end if
         ########## Burst Flags ##########
         #if $pred & $eob_p
             #set $flags |= (0x1 << 24);
@@ -137,6 +133,18 @@ void vrt::if_hdr_pack_$(suffix)(
         #if $pred & $sob_p
             #set $flags |= (0x1 << 25);
         #end if
+        ########## Trailer ##########
+        #if $pred & $tlr_p
+            {
+                const size_t empty_bytes = if_packet_info.num_payload_words32*sizeof(boost::uint32_t) - if_packet_info.num_payload_bytes;
+                if_packet_info.tlr |= (0x3 << 22) | (occ_table[empty_bytes & 0x3] << 10);
+            }
+            packet_buff[$num_header_words+if_packet_info.num_payload_words32] = $(XE_MACRO)(if_packet_info.tlr);
+            #set $flags |= (0x1 << 26);
+            #set $num_trailer_words = 1;
+        #else
+            #set $num_trailer_words = 0;
+        #end if
         ########## Variables ##########
             if_packet_info.num_header_words32 = $num_header_words;
             if_packet_info.num_packet_words32 = $($num_header_words + $num_trailer_words) + if_packet_info.num_payload_words32;
@@ -172,6 +180,8 @@ void vrt::if_hdr_unpack_$(suffix)(
 
     const pred_type pred = pred_unpack_table[pred_table_index(vrt_hdr_word)];
 
+    size_t empty_bytes = 0;
+
     switch(pred){
     #for $pred in range(2**7)
     case $pred:
@@ -211,15 +221,6 @@ void vrt::if_hdr_unpack_$(suffix)(
         #else
             if_packet_info.has_tsf = false;
         #end if
-        ########## Trailer ##########
-        #if $pred & $tlr_p
-            if_packet_info.has_tlr = true;
-            if_packet_info.tlr = $(XE_MACRO)(packet_buff[packet_words32-1]);
-            #set $num_trailer_words = 1;
-        #else
-            if_packet_info.has_tlr = false;
-            #set $num_trailer_words = 0;
-        #end if
         ########## Burst Flags ##########
         #if $pred & $eob_p
             if_packet_info.eob = true;
@@ -231,12 +232,28 @@ void vrt::if_hdr_unpack_$(suffix)(
         #else
             if_packet_info.sob = false;
         #end if
+        ########## Trailer ##########
+        #if $pred & $tlr_p
+            if_packet_info.has_tlr = true;
+            if_packet_info.tlr = $(XE_MACRO)(packet_buff[packet_words32-1]);
+            #set $num_trailer_words = 1;
+            {
+                const int indicators = (if_packet_info.tlr >> 20) & (if_packet_info.tlr >> 8);
+                if ((indicators & (1 << 0)) != 0) if_packet_info.eob = true;
+                if ((indicators & (1 << 1)) != 0) if_packet_info.sob = true;
+                empty_bytes = occ_table[(indicators >> 2) & 0x3];
+            }
+        #else
+            if_packet_info.has_tlr = false;
+            #set $num_trailer_words = 0;
+        #end if
         ########## Variables ##########
             //another failure case
             if (packet_words32 < $($num_header_words + $num_trailer_words))
                 throw uhd::value_error("bad vrt header or invalid packet length");
             if_packet_info.num_header_words32 = $num_header_words;
             if_packet_info.num_payload_words32 = packet_words32 - $($num_header_words + $num_trailer_words);
+            if_packet_info.num_payload_bytes = if_packet_info.num_payload_words32*sizeof(boost::uint32_t) - empty_bytes;
         break;
     #end for
     }
diff --git a/host/lib/transport/super_recv_packet_handler.hpp b/host/lib/transport/super_recv_packet_handler.hpp
index 2310d6aea..48b0acdb9 100644
--- a/host/lib/transport/super_recv_packet_handler.hpp
+++ b/host/lib/transport/super_recv_packet_handler.hpp
@@ -327,7 +327,7 @@ private:
             info.alignment_time = info[index].time;
             info.indexes_todo.set();
             info.indexes_todo.reset(index);
-            info.data_bytes_to_copy = info[index].ifpi.num_payload_words32*sizeof(boost::uint32_t);
+            info.data_bytes_to_copy = info[index].ifpi.num_payload_bytes;
         }
 
         //if the sequence id matches:
@@ -471,13 +471,8 @@ private:
         curr_info.metadata.time_spec = curr_info[0].time;
         curr_info.metadata.more_fragments = false;
         curr_info.metadata.fragment_offset = 0;
-        /* TODO SOB on RX not supported in hardware
-        static const int tlr_sob_flags = (1 << 21) | (1 << 9); //enable and indicator bits
-        curr_info.metadata.start_of_burst = curr_info[0].ifpi.has_tlr and (int(curr_info[0].ifpi.tlr & tlr_sob_flags) != 0);
-        */
-        curr_info.metadata.start_of_burst = false;
-        static const int tlr_eob_flags = (1 << 20) | (1 << 8); //enable and indicator bits
-        curr_info.metadata.end_of_burst   = curr_info[0].ifpi.has_tlr and (int(curr_info[0].ifpi.tlr & tlr_eob_flags) != 0);
+        curr_info.metadata.start_of_burst = curr_info[0].ifpi.sob;
+        curr_info.metadata.end_of_burst = curr_info[0].ifpi.eob;
         curr_info.metadata.error_code = rx_metadata_t::ERROR_CODE_NONE;
 
     }
diff --git a/host/lib/transport/super_send_packet_handler.hpp b/host/lib/transport/super_send_packet_handler.hpp
index 779259d4f..5696b5d39 100644
--- a/host/lib/transport/super_send_packet_handler.hpp
+++ b/host/lib/transport/super_send_packet_handler.hpp
@@ -219,7 +219,8 @@ private:
         const size_t buffer_offset_bytes = 0
     ){
         //load the rest of the if_packet_info in here
-        if_packet_info.num_payload_words32 = (nsamps_per_buff*_io_buffs.size()*_bytes_per_otw_item)/sizeof(boost::uint32_t);
+        if_packet_info.num_payload_bytes = nsamps_per_buff*_io_buffs.size()*_bytes_per_otw_item;
+        if_packet_info.num_payload_words32 = (if_packet_info.num_payload_bytes + 3/*round up*/)/sizeof(boost::uint32_t);
         if_packet_info.packet_count = _next_packet_seq;
 
         size_t buff_index = 0;
diff --git a/host/lib/usrp/cores/rx_dsp_core_200.cpp b/host/lib/usrp/cores/rx_dsp_core_200.cpp
index 023216a09..b121bc849 100644
--- a/host/lib/usrp/cores/rx_dsp_core_200.cpp
+++ b/host/lib/usrp/cores/rx_dsp_core_200.cpp
@@ -130,7 +130,8 @@ public:
     }
 
     void set_link_rate(const double rate){
-        _link_rate = rate/sizeof(boost::uint32_t); //in samps/s
+        //_link_rate = rate/sizeof(boost::uint32_t); //in samps/s
+        _link_rate = rate/sizeof(boost::uint16_t); //in samps/s (allows for 8sc)
     }
 
     double set_host_rate(const double rate){
diff --git a/host/lib/usrp/cores/tx_dsp_core_200.cpp b/host/lib/usrp/cores/tx_dsp_core_200.cpp
index 04e9f5da4..f37b53527 100644
--- a/host/lib/usrp/cores/tx_dsp_core_200.cpp
+++ b/host/lib/usrp/cores/tx_dsp_core_200.cpp
@@ -70,7 +70,8 @@ public:
     }
 
     void set_link_rate(const double rate){
-        _link_rate = rate/sizeof(boost::uint32_t); //in samps/s
+        //_link_rate = rate/sizeof(boost::uint32_t); //in samps/s
+        _link_rate = rate/sizeof(boost::uint16_t); //in samps/s (allows for 8sc)
     }
 
     double set_host_rate(const double rate){
diff --git a/host/lib/usrp/usrp1/io_impl.cpp b/host/lib/usrp/usrp1/io_impl.cpp
index 534d33959..12950d385 100644
--- a/host/lib/usrp/usrp1/io_impl.cpp
+++ b/host/lib/usrp/usrp1/io_impl.cpp
@@ -111,6 +111,7 @@ static void usrp1_bs_vrt_unpacker(
 ){
     if_packet_info.packet_type = vrt::if_packet_info_t::PACKET_TYPE_DATA;
     if_packet_info.num_payload_words32 = if_packet_info.num_packet_words32;
+    if_packet_info.num_payload_bytes = if_packet_info.num_packet_words32*sizeof(boost::uint32_t);
     if_packet_info.num_header_words32 = 0;
     if_packet_info.packet_count = 0;
     if_packet_info.sob = false;
-- 
cgit v1.2.3


From ae9e89d76b2eb86a29995f04aaab1aa59ee93f04 Mon Sep 17 00:00:00 2001
From: Josh Blum <josh@joshknows.com>
Date: Sun, 16 Oct 2011 10:43:48 -0700
Subject: usrp: added get_tx/rx_rates

---
 host/include/uhd/usrp/multi_usrp.hpp    | 16 ++++++++++++++++
 host/lib/usrp/b100/b100_impl.cpp        |  4 ++++
 host/lib/usrp/cores/rx_dsp_core_200.cpp | 21 ++++++++++++++++-----
 host/lib/usrp/cores/rx_dsp_core_200.hpp |  2 ++
 host/lib/usrp/cores/tx_dsp_core_200.cpp | 21 ++++++++++++++++-----
 host/lib/usrp/cores/tx_dsp_core_200.hpp |  2 ++
 host/lib/usrp/e100/e100_impl.cpp        |  4 ++++
 host/lib/usrp/multi_usrp.cpp            |  8 ++++++++
 host/lib/usrp/usrp1/io_impl.cpp         | 27 ++++++++++++++++++++++-----
 host/lib/usrp/usrp1/usrp1_impl.cpp      |  8 ++++++--
 host/lib/usrp/usrp1/usrp1_impl.hpp      |  2 ++
 host/lib/usrp/usrp2/usrp2_impl.cpp      |  4 ++++
 12 files changed, 102 insertions(+), 17 deletions(-)

(limited to 'host/lib/usrp/cores')

diff --git a/host/include/uhd/usrp/multi_usrp.hpp b/host/include/uhd/usrp/multi_usrp.hpp
index ee7bf8424..baa47b39e 100644
--- a/host/include/uhd/usrp/multi_usrp.hpp
+++ b/host/include/uhd/usrp/multi_usrp.hpp
@@ -18,7 +18,9 @@
 #ifndef INCLUDED_UHD_USRP_MULTI_USRP_HPP
 #define INCLUDED_UHD_USRP_MULTI_USRP_HPP
 
+//define API capabilities for compile time detection of new features
 #define UHD_USRP_MULTI_USRP_REF_SOURCES_API
+#define UHD_USRP_MULTI_USRP_GET_RATES_API
 
 #include <uhd/config.hpp>
 #include <uhd/device.hpp>
@@ -367,6 +369,13 @@ public:
      */
     virtual double get_rx_rate(size_t chan = 0) = 0;
 
+    /*!
+     * Get a range of possible RX rates.
+     * \param chan the channel index 0 to N-1
+     * \return the meta range of rates
+     */
+    virtual meta_range_t get_rx_rates(size_t chan = 0) = 0;
+
     /*!
      * Set the RX center frequency.
      * \param tune_request tune request instructions
@@ -567,6 +576,13 @@ public:
      */
     virtual double get_tx_rate(size_t chan = 0) = 0;
 
+    /*!
+     * Get a range of possible TX rates.
+     * \param chan the channel index 0 to N-1
+     * \return the meta range of rates
+     */
+    virtual meta_range_t get_tx_rates(size_t chan = 0) = 0;
+
     /*!
      * Set the TX center frequency.
      * \param tune_request tune request instructions
diff --git a/host/lib/usrp/b100/b100_impl.cpp b/host/lib/usrp/b100/b100_impl.cpp
index d1928735b..bb91d415d 100644
--- a/host/lib/usrp/b100/b100_impl.cpp
+++ b/host/lib/usrp/b100/b100_impl.cpp
@@ -296,6 +296,8 @@ b100_impl::b100_impl(const device_addr_t &device_addr){
         _tree->access<double>(mb_path / "tick_rate")
             .subscribe(boost::bind(&rx_dsp_core_200::set_tick_rate, _rx_dsps[dspno], _1));
         fs_path rx_dsp_path = mb_path / str(boost::format("rx_dsps/%u") % dspno);
+        _tree->create<meta_range_t>(rx_dsp_path / "rate/range")
+            .publish(boost::bind(&rx_dsp_core_200::get_host_rates, _rx_dsps[dspno]));
         _tree->create<double>(rx_dsp_path / "rate/value")
             .set(1e6) //some default
             .coerce(boost::bind(&rx_dsp_core_200::set_host_rate, _rx_dsps[dspno], _1))
@@ -317,6 +319,8 @@ b100_impl::b100_impl(const device_addr_t &device_addr){
     _tx_dsp->set_link_rate(B100_LINK_RATE_BPS);
     _tree->access<double>(mb_path / "tick_rate")
         .subscribe(boost::bind(&tx_dsp_core_200::set_tick_rate, _tx_dsp, _1));
+    _tree->create<meta_range_t>(mb_path / "tx_dsps/0/rate/range")
+        .publish(boost::bind(&tx_dsp_core_200::get_host_rates, _tx_dsp));
     _tree->create<double>(mb_path / "tx_dsps/0/rate/value")
         .set(1e6) //some default
         .coerce(boost::bind(&tx_dsp_core_200::set_host_rate, _tx_dsp, _1))
diff --git a/host/lib/usrp/cores/rx_dsp_core_200.cpp b/host/lib/usrp/cores/rx_dsp_core_200.cpp
index b121bc849..6d306d507 100644
--- a/host/lib/usrp/cores/rx_dsp_core_200.cpp
+++ b/host/lib/usrp/cores/rx_dsp_core_200.cpp
@@ -134,12 +134,23 @@ public:
         _link_rate = rate/sizeof(boost::uint16_t); //in samps/s (allows for 8sc)
     }
 
+    uhd::meta_range_t get_host_rates(void){
+        meta_range_t range;
+        for (int rate = 512; rate > 256; rate -= 4){
+            range.push_back(range_t(_tick_rate/rate));
+        }
+        for (int rate = 256; rate > 128; rate -= 2){
+            range.push_back(range_t(_tick_rate/rate));
+        }
+        for (int rate = 128; rate >= int(std::ceil(_tick_rate/_link_rate)); rate -= 1){
+            range.push_back(range_t(_tick_rate/rate));
+        }
+        return range;
+    }
+
     double set_host_rate(const double rate){
-        size_t decim_rate = uhd::clip<size_t>(
-            boost::math::iround(_tick_rate/rate), size_t(std::ceil(_tick_rate/_link_rate)), 512
-        );
-        if (decim_rate > 128) decim_rate &= ~0x1; //CIC up to 128, have to use 1 HB
-        if (decim_rate > 256) decim_rate &= ~0x3; //CIC up to 128, have to use 2 HB
+        const size_t decim_rate = this->get_host_rates().clip(
+            boost::math::iround(_tick_rate/rate), true);
         size_t decim = decim_rate;
 
         //determine which half-band filters are activated
diff --git a/host/lib/usrp/cores/rx_dsp_core_200.hpp b/host/lib/usrp/cores/rx_dsp_core_200.hpp
index ddd6f2abf..89b8c1f51 100644
--- a/host/lib/usrp/cores/rx_dsp_core_200.hpp
+++ b/host/lib/usrp/cores/rx_dsp_core_200.hpp
@@ -48,6 +48,8 @@ public:
 
     virtual double set_host_rate(const double rate) = 0;
 
+    virtual uhd::meta_range_t get_host_rates(void) = 0;
+
     virtual double get_scaling_adjustment(void) = 0;
 
     virtual uhd::meta_range_t get_freq_range(void) = 0;
diff --git a/host/lib/usrp/cores/tx_dsp_core_200.cpp b/host/lib/usrp/cores/tx_dsp_core_200.cpp
index f37b53527..1d571ea7c 100644
--- a/host/lib/usrp/cores/tx_dsp_core_200.cpp
+++ b/host/lib/usrp/cores/tx_dsp_core_200.cpp
@@ -74,12 +74,23 @@ public:
         _link_rate = rate/sizeof(boost::uint16_t); //in samps/s (allows for 8sc)
     }
 
+    uhd::meta_range_t get_host_rates(void){
+        meta_range_t range;
+        for (int rate = 512; rate > 256; rate -= 4){
+            range.push_back(range_t(_tick_rate/rate));
+        }
+        for (int rate = 256; rate > 128; rate -= 2){
+            range.push_back(range_t(_tick_rate/rate));
+        }
+        for (int rate = 128; rate >= int(std::ceil(_tick_rate/_link_rate)); rate -= 1){
+            range.push_back(range_t(_tick_rate/rate));
+        }
+        return range;
+    }
+
     double set_host_rate(const double rate){
-        size_t interp_rate = uhd::clip<size_t>(
-            boost::math::iround(_tick_rate/rate), size_t(std::ceil(_tick_rate/_link_rate)), 512
-        );
-        if (interp_rate > 128) interp_rate &= ~0x1; //CIC up to 128, have to use 1 HB
-        if (interp_rate > 256) interp_rate &= ~0x3; //CIC up to 128, have to use 2 HB
+        const size_t interp_rate = this->get_host_rates().clip(
+            boost::math::iround(_tick_rate/rate), true);
         size_t interp = interp_rate;
 
         //determine which half-band filters are activated
diff --git a/host/lib/usrp/cores/tx_dsp_core_200.hpp b/host/lib/usrp/cores/tx_dsp_core_200.hpp
index 65f822558..e6be63557 100644
--- a/host/lib/usrp/cores/tx_dsp_core_200.hpp
+++ b/host/lib/usrp/cores/tx_dsp_core_200.hpp
@@ -40,6 +40,8 @@ public:
 
     virtual double set_host_rate(const double rate) = 0;
 
+    virtual uhd::meta_range_t get_host_rates(void) = 0;
+
     virtual uhd::meta_range_t get_freq_range(void) = 0;
 
     virtual double set_freq(const double freq) = 0;
diff --git a/host/lib/usrp/e100/e100_impl.cpp b/host/lib/usrp/e100/e100_impl.cpp
index deb52b2d7..6cb404000 100644
--- a/host/lib/usrp/e100/e100_impl.cpp
+++ b/host/lib/usrp/e100/e100_impl.cpp
@@ -270,6 +270,8 @@ e100_impl::e100_impl(const uhd::device_addr_t &device_addr){
         _tree->access<double>(mb_path / "tick_rate")
             .subscribe(boost::bind(&rx_dsp_core_200::set_tick_rate, _rx_dsps[dspno], _1));
         fs_path rx_dsp_path = mb_path / str(boost::format("rx_dsps/%u") % dspno);
+        _tree->create<meta_range_t>(rx_dsp_path / "rate/range")
+            .publish(boost::bind(&rx_dsp_core_200::get_host_rates, _rx_dsps[dspno]));
         _tree->create<double>(rx_dsp_path / "rate/value")
             .set(1e6) //some default
             .coerce(boost::bind(&rx_dsp_core_200::set_host_rate, _rx_dsps[dspno], _1))
@@ -291,6 +293,8 @@ e100_impl::e100_impl(const uhd::device_addr_t &device_addr){
     _tx_dsp->set_link_rate(E100_TX_LINK_RATE_BPS);
     _tree->access<double>(mb_path / "tick_rate")
         .subscribe(boost::bind(&tx_dsp_core_200::set_tick_rate, _tx_dsp, _1));
+    _tree->create<meta_range_t>(mb_path / "tx_dsps/0/rate/range")
+        .publish(boost::bind(&tx_dsp_core_200::get_host_rates, _tx_dsp));
     _tree->create<double>(mb_path / "tx_dsps/0/rate/value")
         .set(1e6) //some default
         .coerce(boost::bind(&tx_dsp_core_200::set_host_rate, _tx_dsp, _1))
diff --git a/host/lib/usrp/multi_usrp.cpp b/host/lib/usrp/multi_usrp.cpp
index ab841487f..97c5ea630 100644
--- a/host/lib/usrp/multi_usrp.cpp
+++ b/host/lib/usrp/multi_usrp.cpp
@@ -477,6 +477,10 @@ public:
         return _tree->access<double>(rx_dsp_root(chan) / "rate" / "value").get();
     }
 
+    meta_range_t get_rx_rates(size_t chan){
+        return _tree->access<meta_range_t>(rx_dsp_root(chan) / "rate" / "range").get();
+    }
+
     tune_result_t set_rx_freq(const tune_request_t &tune_request, size_t chan){
         tune_result_t r = tune_xx_subdev_and_dsp(RX_SIGN, _tree->subtree(rx_dsp_root(chan)), _tree->subtree(rx_rf_fe_root(chan)), tune_request);
         do_tune_freq_warning_message(tune_request.target_freq, get_rx_freq(chan), "RX");
@@ -587,6 +591,10 @@ public:
         return _tree->access<double>(tx_dsp_root(chan) / "rate" / "value").get();
     }
 
+    meta_range_t get_tx_rates(size_t chan){
+        return _tree->access<meta_range_t>(tx_dsp_root(chan) / "rate" / "range").get();
+    }
+
     tune_result_t set_tx_freq(const tune_request_t &tune_request, size_t chan){
         tune_result_t r = tune_xx_subdev_and_dsp(TX_SIGN, _tree->subtree(tx_dsp_root(chan)), _tree->subtree(tx_rf_fe_root(chan)), tune_request);
         do_tune_freq_warning_message(tune_request.target_freq, get_tx_freq(chan), "TX");
diff --git a/host/lib/usrp/usrp1/io_impl.cpp b/host/lib/usrp/usrp1/io_impl.cpp
index 12950d385..31c834109 100644
--- a/host/lib/usrp/usrp1/io_impl.cpp
+++ b/host/lib/usrp/usrp1/io_impl.cpp
@@ -442,7 +442,6 @@ void usrp1_impl::update_tx_subdev_spec(const uhd::usrp::subdev_spec_t &spec){
     this->restore_tx(s);
 }
 
-
 void usrp1_impl::update_tick_rate(const double rate){
     //updating this variable should:
     //update dboard iface -> it has a reference
@@ -450,11 +449,29 @@ void usrp1_impl::update_tick_rate(const double rate){
     _master_clock_rate = rate;
 }
 
+uhd::meta_range_t usrp1_impl::get_rx_dsp_host_rates(void){
+    meta_range_t range;
+    const size_t div = this->has_rx_halfband()? 2 : 1;
+    for (int rate = 256; rate >= 4; rate -= div){
+        range.push_back(range_t(_master_clock_rate/rate));
+    }
+    return range;
+}
+
+uhd::meta_range_t usrp1_impl::get_tx_dsp_host_rates(void){
+    meta_range_t range;
+    const size_t div = this->has_tx_halfband()? 2 : 1;
+    for (int rate = 256; rate >= 8; rate -= div){
+        range.push_back(range_t(_master_clock_rate/rate));
+    }
+    return range;
+}
+
 double usrp1_impl::update_rx_samp_rate(size_t dspno, const double samp_rate){
 
     const size_t div = this->has_rx_halfband()? 2 : 1;
-    const size_t rate = uhd::clip<size_t>(
-        boost::math::iround(_master_clock_rate / samp_rate), 4, 256) & ~(div-1);
+    const size_t rate = this->get_rx_dsp_host_rates().clip(
+        boost::math::iround(_master_clock_rate / samp_rate), true);
 
     if (rate < 8 and this->has_rx_halfband()) UHD_MSG(warning) <<
         "USRP1 cannot achieve decimations below 8 when the half-band filter is present.\n"
@@ -482,8 +499,8 @@ double usrp1_impl::update_rx_samp_rate(size_t dspno, const double samp_rate){
 double usrp1_impl::update_tx_samp_rate(size_t dspno, const double samp_rate){
 
     const size_t div = this->has_tx_halfband()? 2 : 1;
-    const size_t rate = uhd::clip<size_t>(
-        boost::math::iround(_master_clock_rate / samp_rate), 8, 256) & ~(div-1);
+    const size_t rate = this->get_tx_dsp_host_rates().clip(
+        boost::math::iround(_master_clock_rate / samp_rate), true);
 
     if (dspno == 0){ //only care if dsp0 is set since its homogeneous
         bool s = this->disable_tx();
diff --git a/host/lib/usrp/usrp1/usrp1_impl.cpp b/host/lib/usrp/usrp1/usrp1_impl.cpp
index 5788c536f..1a61f8136 100644
--- a/host/lib/usrp/usrp1/usrp1_impl.cpp
+++ b/host/lib/usrp/usrp1/usrp1_impl.cpp
@@ -283,8 +283,10 @@ usrp1_impl::usrp1_impl(const device_addr_t &device_addr){
     _tree->create<int>(mb_path / "rx_dsps"); //dummy in case we have none
     for (size_t dspno = 0; dspno < get_num_ddcs(); dspno++){
         fs_path rx_dsp_path = mb_path / str(boost::format("rx_dsps/%u") % dspno);
+        _tree->create<meta_range_t>(rx_dsp_path / "rate/range")
+            .publish(boost::bind(&usrp1_impl::get_rx_dsp_host_rates, this));
         _tree->create<double>(rx_dsp_path / "rate/value")
-            .set(1e6)
+            .set(1e6) //some default rate
             .coerce(boost::bind(&usrp1_impl::update_rx_samp_rate, this, dspno, _1));
         _tree->create<double>(rx_dsp_path / "freq/value")
             .coerce(boost::bind(&usrp1_impl::update_rx_dsp_freq, this, dspno, _1));
@@ -304,8 +306,10 @@ usrp1_impl::usrp1_impl(const device_addr_t &device_addr){
     _tree->create<int>(mb_path / "tx_dsps"); //dummy in case we have none
     for (size_t dspno = 0; dspno < get_num_ducs(); dspno++){
         fs_path tx_dsp_path = mb_path / str(boost::format("tx_dsps/%u") % dspno);
+        _tree->create<meta_range_t>(tx_dsp_path / "rate/range")
+            .publish(boost::bind(&usrp1_impl::get_tx_dsp_host_rates, this));
         _tree->create<double>(tx_dsp_path / "rate/value")
-            .set(1e6)
+            .set(1e6) //some default rate
             .coerce(boost::bind(&usrp1_impl::update_tx_samp_rate, this, dspno, _1));
         _tree->create<double>(tx_dsp_path / "freq/value")
             .coerce(boost::bind(&usrp1_impl::update_tx_dsp_freq, this, dspno, _1));
diff --git a/host/lib/usrp/usrp1/usrp1_impl.hpp b/host/lib/usrp/usrp1/usrp1_impl.hpp
index 6f427c31e..ec313daf6 100644
--- a/host/lib/usrp/usrp1/usrp1_impl.hpp
+++ b/host/lib/usrp/usrp1/usrp1_impl.hpp
@@ -98,6 +98,8 @@ private:
     void update_tick_rate(const double rate);
     uhd::meta_range_t get_rx_dsp_freq_range(void);
     uhd::meta_range_t get_tx_dsp_freq_range(void);
+    uhd::meta_range_t get_rx_dsp_host_rates(void);
+    uhd::meta_range_t get_tx_dsp_host_rates(void);
 
     static uhd::usrp::dboard_iface::sptr make_dboard_iface(
         usrp1_iface::sptr,
diff --git a/host/lib/usrp/usrp2/usrp2_impl.cpp b/host/lib/usrp/usrp2/usrp2_impl.cpp
index 2d89ddaf4..24178d10c 100644
--- a/host/lib/usrp/usrp2/usrp2_impl.cpp
+++ b/host/lib/usrp/usrp2/usrp2_impl.cpp
@@ -480,6 +480,8 @@ usrp2_impl::usrp2_impl(const device_addr_t &_device_addr){
             _mbc[mb].rx_dsp_xports[dspno]->get_recv_buff(0.01).get(); //recv with timeout for lingering
             _mbc[mb].rx_dsp_xports[dspno]->get_recv_buff(0.01).get(); //recv with timeout for expected
             fs_path rx_dsp_path = mb_path / str(boost::format("rx_dsps/%u") % dspno);
+            _tree->create<meta_range_t>(rx_dsp_path / "rate/range")
+                .publish(boost::bind(&rx_dsp_core_200::get_host_rates, _mbc[mb].rx_dsps[dspno]));
             _tree->create<double>(rx_dsp_path / "rate/value")
                 .set(1e6) //some default
                 .coerce(boost::bind(&rx_dsp_core_200::set_host_rate, _mbc[mb].rx_dsps[dspno], _1))
@@ -501,6 +503,8 @@ usrp2_impl::usrp2_impl(const device_addr_t &_device_addr){
         _mbc[mb].tx_dsp->set_link_rate(USRP2_LINK_RATE_BPS);
         _tree->access<double>(mb_path / "tick_rate")
             .subscribe(boost::bind(&tx_dsp_core_200::set_tick_rate, _mbc[mb].tx_dsp, _1));
+        _tree->create<meta_range_t>(mb_path / "tx_dsps/0/rate/range")
+            .publish(boost::bind(&tx_dsp_core_200::get_host_rates, _mbc[mb].tx_dsp));
         _tree->create<double>(mb_path / "tx_dsps/0/rate/value")
             .set(1e6) //some default
             .coerce(boost::bind(&tx_dsp_core_200::set_host_rate, _mbc[mb].tx_dsp, _1))
-- 
cgit v1.2.3


From 3d3c77983b917fefc7a3e59669a43e440ba4f688 Mon Sep 17 00:00:00 2001
From: Josh Blum <josh@joshknows.com>
Date: Sun, 23 Oct 2011 18:03:56 -0700
Subject: usrp: update frontend cores for dc offset

---
 host/lib/usrp/cores/rx_frontend_core_200.cpp | 24 +++++++++++++++++++++---
 host/lib/usrp/cores/rx_frontend_core_200.hpp |  4 +++-
 host/lib/usrp/cores/tx_frontend_core_200.cpp | 12 +++++++++---
 host/lib/usrp/cores/tx_frontend_core_200.hpp |  2 +-
 4 files changed, 34 insertions(+), 8 deletions(-)

(limited to 'host/lib/usrp/cores')

diff --git a/host/lib/usrp/cores/rx_frontend_core_200.cpp b/host/lib/usrp/cores/rx_frontend_core_200.cpp
index 0e8220b49..bb87cb600 100644
--- a/host/lib/usrp/cores/rx_frontend_core_200.cpp
+++ b/host/lib/usrp/cores/rx_frontend_core_200.cpp
@@ -24,6 +24,9 @@
 #define REG_RX_FE_OFFSET_I            _base + 12 //18 bits
 #define REG_RX_FE_OFFSET_Q            _base + 16 //18 bits
 
+#define OFFSET_FIXED (1ul << 31)
+#define OFFSET_SET   (1ul << 30)
+
 static boost::uint32_t fs_to_bits(const double num, const size_t bits){
     return boost::int32_t(boost::math::round(num * (1 << (bits-1))));
 }
@@ -41,9 +44,23 @@ public:
         _iface->poke32(REG_RX_FE_SWAP_IQ, swap? 1 : 0);
     }
 
-    void set_offset(const std::complex<double> &off){
-        _iface->poke32(REG_RX_FE_OFFSET_I, fs_to_bits(off.real(), 24));
-        _iface->poke32(REG_RX_FE_OFFSET_Q, fs_to_bits(off.imag(), 24));
+    void set_dc_offset_auto(const bool enb){
+        this->set_dc_offset(enb? 0 : OFFSET_FIXED);
+    }
+
+    std::complex<double> set_dc_offset(const std::complex<double> &off){
+        static const double scaler = double(1ul << 29);
+        _i_dc_off = boost::math::iround(off.real()*scaler);
+        _q_dc_off = boost::math::iround(off.imag()*scaler);
+
+        this->set_dc_offset(OFFSET_SET | OFFSET_FIXED);
+
+        return std::complex<double>(_i_dc_off/scaler, _q_dc_off/scaler);
+    }
+
+    void set_dc_offset(const boost::uint32_t flags){
+        _iface->poke32(REG_RX_FE_OFFSET_I, flags | _i_dc_off);
+        _iface->poke32(REG_RX_FE_OFFSET_Q, flags | _q_dc_off);
     }
 
     void set_correction(const std::complex<double> &cor){
@@ -52,6 +69,7 @@ public:
     }
 
 private:
+    boost::int32_t _i_dc_off, _q_dc_off;
     wb_iface::sptr _iface;
     const size_t _base;
 };
diff --git a/host/lib/usrp/cores/rx_frontend_core_200.hpp b/host/lib/usrp/cores/rx_frontend_core_200.hpp
index a950e2bb7..73dfbdc72 100644
--- a/host/lib/usrp/cores/rx_frontend_core_200.hpp
+++ b/host/lib/usrp/cores/rx_frontend_core_200.hpp
@@ -33,7 +33,9 @@ public:
 
     virtual void set_mux(const bool swap) = 0;
 
-    virtual void set_offset(const std::complex<double> &off) = 0;
+    virtual void set_dc_offset_auto(const bool enb) = 0;
+
+    virtual std::complex<double> set_dc_offset(const std::complex<double> &off) = 0;
 
     virtual void set_correction(const std::complex<double> &cor) = 0;
 
diff --git a/host/lib/usrp/cores/tx_frontend_core_200.cpp b/host/lib/usrp/cores/tx_frontend_core_200.cpp
index a7568a81e..71555e47f 100644
--- a/host/lib/usrp/cores/tx_frontend_core_200.cpp
+++ b/host/lib/usrp/cores/tx_frontend_core_200.cpp
@@ -50,9 +50,15 @@ public:
         _iface->poke32(REG_TX_FE_MUX, mode_to_mux[mode]);
     }
 
-    void set_dc_offset(const std::complex<double> &off){
-        _iface->poke32(REG_TX_FE_DC_OFFSET_I, fs_to_bits(off.real(), 24));
-        _iface->poke32(REG_TX_FE_DC_OFFSET_Q, fs_to_bits(off.imag(), 24));
+    std::complex<double> set_dc_offset(const std::complex<double> &off){
+        static const double scaler = double(1ul << 23);
+        const boost::int32_t i_dc_off = boost::math::iround(off.real()*scaler);
+        const boost::int32_t q_dc_off = boost::math::iround(off.imag()*scaler);
+
+        _iface->poke32(REG_TX_FE_DC_OFFSET_I, i_dc_off);
+        _iface->poke32(REG_TX_FE_DC_OFFSET_Q, q_dc_off);
+
+        return std::complex<double>(i_dc_off/scaler, q_dc_off/scaler);
     }
 
     void set_correction(const std::complex<double> &cor){
diff --git a/host/lib/usrp/cores/tx_frontend_core_200.hpp b/host/lib/usrp/cores/tx_frontend_core_200.hpp
index 9e4a7bc79..f905e447d 100644
--- a/host/lib/usrp/cores/tx_frontend_core_200.hpp
+++ b/host/lib/usrp/cores/tx_frontend_core_200.hpp
@@ -33,7 +33,7 @@ public:
 
     virtual void set_mux(const std::string &mode) = 0;
 
-    virtual void set_dc_offset(const std::complex<double> &off) = 0;
+    virtual std::complex<double> set_dc_offset(const std::complex<double> &off) = 0;
 
     virtual void set_correction(const std::complex<double> &cor) = 0;
 
-- 
cgit v1.2.3


From a62645089202ac2ac39a55c48d3876474b54223e Mon Sep 17 00:00:00 2001
From: Josh Blum <josh@joshknows.com>
Date: Mon, 24 Oct 2011 10:36:41 -0700
Subject: usrp: prefer name iq_balance for api call

---
 host/include/uhd/usrp/multi_usrp.hpp         | 11 +++++------
 host/lib/usrp/b100/b100_impl.cpp             |  8 ++++----
 host/lib/usrp/cores/rx_frontend_core_200.cpp |  2 +-
 host/lib/usrp/cores/rx_frontend_core_200.hpp |  2 +-
 host/lib/usrp/cores/tx_frontend_core_200.cpp |  2 +-
 host/lib/usrp/cores/tx_frontend_core_200.hpp |  2 +-
 host/lib/usrp/e100/e100_impl.cpp             |  8 ++++----
 host/lib/usrp/multi_usrp.cpp                 | 12 ++++++------
 host/lib/usrp/usrp2/usrp2_impl.cpp           |  8 ++++----
 9 files changed, 27 insertions(+), 28 deletions(-)

(limited to 'host/lib/usrp/cores')

diff --git a/host/include/uhd/usrp/multi_usrp.hpp b/host/include/uhd/usrp/multi_usrp.hpp
index 1cbe3a684..0cf50aa0d 100644
--- a/host/include/uhd/usrp/multi_usrp.hpp
+++ b/host/include/uhd/usrp/multi_usrp.hpp
@@ -21,8 +21,7 @@
 //define API capabilities for compile time detection of new features
 #define UHD_USRP_MULTI_USRP_REF_SOURCES_API
 #define UHD_USRP_MULTI_USRP_GET_RATES_API
-#define UHD_USRP_MULTI_USRP_DC_OFFSET_API
-#define UHD_USRP_MULTI_USRP_CORRECTION_API
+#define UHD_USRP_MULTI_USRP_FRONTEND_CAL_API
 
 #include <uhd/config.hpp>
 #include <uhd/device.hpp>
@@ -555,13 +554,13 @@ public:
     virtual void set_rx_dc_offset(const std::complex<double> &offset, size_t chan = ALL_CHANS) = 0;
 
     /*!
-     * Set the RX frontend IQ imbalance and gain correction.
+     * Set the RX frontend IQ imbalance correction.
      * Use this to adjust the magnitude and phase of I and Q.
      *
      * \param correction the complex correction value
      * \param chan the channel index 0 to N-1
      */
-    virtual void set_rx_correction(const std::complex<double> &correction, size_t chan = ALL_CHANS) = 0;
+    virtual void set_rx_iq_balance(const std::complex<double> &correction, size_t chan = ALL_CHANS) = 0;
 
     /*******************************************************************
      * TX methods
@@ -769,13 +768,13 @@ public:
     virtual void set_tx_dc_offset(const std::complex<double> &offset, size_t chan = ALL_CHANS) = 0;
 
     /*!
-     * Set the TX frontend IQ imbalance and gain correction.
+     * Set the TX frontend IQ imbalance correction.
      * Use this to adjust the magnitude and phase of I and Q.
      *
      * \param correction the complex correction value
      * \param chan the channel index 0 to N-1
      */
-    virtual void set_tx_correction(const std::complex<double> &correction, size_t chan = ALL_CHANS) = 0;
+    virtual void set_tx_iq_balance(const std::complex<double> &correction, size_t chan = ALL_CHANS) = 0;
 
 };
 
diff --git a/host/lib/usrp/b100/b100_impl.cpp b/host/lib/usrp/b100/b100_impl.cpp
index ec31ce04e..0edaac914 100644
--- a/host/lib/usrp/b100/b100_impl.cpp
+++ b/host/lib/usrp/b100/b100_impl.cpp
@@ -288,14 +288,14 @@ b100_impl::b100_impl(const device_addr_t &device_addr){
     _tree->create<bool>(mb_path / "dboards" / "A" / "rx_frontends" / "dc_offset" / "enable")
         .subscribe(boost::bind(&rx_frontend_core_200::set_dc_offset_auto, _rx_fe, _1))
         .set(true);
-    _tree->create<std::complex<double> >(mb_path / "dboards" / "A" / "rx_frontends" / "correction" / "value")
-        .subscribe(boost::bind(&rx_frontend_core_200::set_correction, _rx_fe, _1))
+    _tree->create<std::complex<double> >(mb_path / "dboards" / "A" / "rx_frontends" / "iq_balance" / "value")
+        .subscribe(boost::bind(&rx_frontend_core_200::set_iq_balance, _rx_fe, _1))
         .set(std::complex<double>(0.0, 0.0));
     _tree->create<std::complex<double> >(mb_path / "dboards" / "A" / "tx_frontends" / "dc_offset" / "value")
         .coerce(boost::bind(&tx_frontend_core_200::set_dc_offset, _tx_fe, _1))
         .set(std::complex<double>(0.0, 0.0));
-    _tree->create<std::complex<double> >(mb_path / "dboards" / "A" / "tx_frontends" / "correction" / "value")
-        .subscribe(boost::bind(&tx_frontend_core_200::set_correction, _tx_fe, _1))
+    _tree->create<std::complex<double> >(mb_path / "dboards" / "A" / "tx_frontends" / "iq_balance" / "value")
+        .subscribe(boost::bind(&tx_frontend_core_200::set_iq_balance, _tx_fe, _1))
         .set(std::complex<double>(0.0, 0.0));
 
     ////////////////////////////////////////////////////////////////////
diff --git a/host/lib/usrp/cores/rx_frontend_core_200.cpp b/host/lib/usrp/cores/rx_frontend_core_200.cpp
index bb87cb600..d42022947 100644
--- a/host/lib/usrp/cores/rx_frontend_core_200.cpp
+++ b/host/lib/usrp/cores/rx_frontend_core_200.cpp
@@ -63,7 +63,7 @@ public:
         _iface->poke32(REG_RX_FE_OFFSET_Q, flags | _q_dc_off);
     }
 
-    void set_correction(const std::complex<double> &cor){
+    void set_iq_balance(const std::complex<double> &cor){
         _iface->poke32(REG_RX_FE_MAG_CORRECTION, fs_to_bits(std::abs(cor), 18));
         _iface->poke32(REG_RX_FE_PHASE_CORRECTION, fs_to_bits(std::atan2(cor.real(), cor.imag()), 18));
     }
diff --git a/host/lib/usrp/cores/rx_frontend_core_200.hpp b/host/lib/usrp/cores/rx_frontend_core_200.hpp
index 73dfbdc72..5755424c8 100644
--- a/host/lib/usrp/cores/rx_frontend_core_200.hpp
+++ b/host/lib/usrp/cores/rx_frontend_core_200.hpp
@@ -37,7 +37,7 @@ public:
 
     virtual std::complex<double> set_dc_offset(const std::complex<double> &off) = 0;
 
-    virtual void set_correction(const std::complex<double> &cor) = 0;
+    virtual void set_iq_balance(const std::complex<double> &cor) = 0;
 
 };
 
diff --git a/host/lib/usrp/cores/tx_frontend_core_200.cpp b/host/lib/usrp/cores/tx_frontend_core_200.cpp
index 71555e47f..327e8d344 100644
--- a/host/lib/usrp/cores/tx_frontend_core_200.cpp
+++ b/host/lib/usrp/cores/tx_frontend_core_200.cpp
@@ -61,7 +61,7 @@ public:
         return std::complex<double>(i_dc_off/scaler, q_dc_off/scaler);
     }
 
-    void set_correction(const std::complex<double> &cor){
+    void set_iq_balance(const std::complex<double> &cor){
         _iface->poke32(REG_TX_FE_MAG_CORRECTION, fs_to_bits(std::abs(cor), 18));
         _iface->poke32(REG_TX_FE_PHASE_CORRECTION, fs_to_bits(std::atan2(cor.real(), cor.imag()), 18));
     }
diff --git a/host/lib/usrp/cores/tx_frontend_core_200.hpp b/host/lib/usrp/cores/tx_frontend_core_200.hpp
index f905e447d..8ee0f3e6d 100644
--- a/host/lib/usrp/cores/tx_frontend_core_200.hpp
+++ b/host/lib/usrp/cores/tx_frontend_core_200.hpp
@@ -35,7 +35,7 @@ public:
 
     virtual std::complex<double> set_dc_offset(const std::complex<double> &off) = 0;
 
-    virtual void set_correction(const std::complex<double> &cor) = 0;
+    virtual void set_iq_balance(const std::complex<double> &cor) = 0;
 
 };
 
diff --git a/host/lib/usrp/e100/e100_impl.cpp b/host/lib/usrp/e100/e100_impl.cpp
index bdf5a9b85..4c5f5f066 100644
--- a/host/lib/usrp/e100/e100_impl.cpp
+++ b/host/lib/usrp/e100/e100_impl.cpp
@@ -262,14 +262,14 @@ e100_impl::e100_impl(const uhd::device_addr_t &device_addr){
     _tree->create<bool>(mb_path / "dboards" / "A" / "rx_frontends" / "dc_offset" / "enable")
         .subscribe(boost::bind(&rx_frontend_core_200::set_dc_offset_auto, _rx_fe, _1))
         .set(true);
-    _tree->create<std::complex<double> >(mb_path / "dboards" / "A" / "rx_frontends" / "correction" / "value")
-        .subscribe(boost::bind(&rx_frontend_core_200::set_correction, _rx_fe, _1))
+    _tree->create<std::complex<double> >(mb_path / "dboards" / "A" / "rx_frontends" / "iq_balance" / "value")
+        .subscribe(boost::bind(&rx_frontend_core_200::set_iq_balance, _rx_fe, _1))
         .set(std::complex<double>(0.0, 0.0));
     _tree->create<std::complex<double> >(mb_path / "dboards" / "A" / "tx_frontends" / "dc_offset" / "value")
         .coerce(boost::bind(&tx_frontend_core_200::set_dc_offset, _tx_fe, _1))
         .set(std::complex<double>(0.0, 0.0));
-    _tree->create<std::complex<double> >(mb_path / "dboards" / "A" / "tx_frontends" / "correction" / "value")
-        .subscribe(boost::bind(&tx_frontend_core_200::set_correction, _tx_fe, _1))
+    _tree->create<std::complex<double> >(mb_path / "dboards" / "A" / "tx_frontends" / "iq_balance" / "value")
+        .subscribe(boost::bind(&tx_frontend_core_200::set_iq_balance, _tx_fe, _1))
         .set(std::complex<double>(0.0, 0.0));
 
     ////////////////////////////////////////////////////////////////////
diff --git a/host/lib/usrp/multi_usrp.cpp b/host/lib/usrp/multi_usrp.cpp
index 5a6acc2c5..7b3890c9b 100644
--- a/host/lib/usrp/multi_usrp.cpp
+++ b/host/lib/usrp/multi_usrp.cpp
@@ -567,13 +567,13 @@ public:
         }
     }
 
-    void set_rx_correction(const std::complex<double> &offset, size_t chan){
+    void set_rx_iq_balance(const std::complex<double> &offset, size_t chan){
         if (chan != ALL_CHANS){
-            _tree->access<std::complex<double> >(rx_rf_fe_root(chan).branch_path() / "correction" / "value").set(offset);
+            _tree->access<std::complex<double> >(rx_rf_fe_root(chan).branch_path() / "iq_balance" / "value").set(offset);
             return;
         }
         for (size_t c = 0; c < get_rx_num_channels(); c++){
-            this->set_rx_correction(offset, c);
+            this->set_rx_iq_balance(offset, c);
         }
     }
 
@@ -701,13 +701,13 @@ public:
         }
     }
 
-    void set_tx_correction(const std::complex<double> &offset, size_t chan){
+    void set_tx_iq_balance(const std::complex<double> &offset, size_t chan){
         if (chan != ALL_CHANS){
-            _tree->access<std::complex<double> >(tx_rf_fe_root(chan).branch_path() / "correction" / "value").set(offset);
+            _tree->access<std::complex<double> >(tx_rf_fe_root(chan).branch_path() / "iq_balance" / "value").set(offset);
             return;
         }
         for (size_t c = 0; c < get_tx_num_channels(); c++){
-            this->set_tx_correction(offset, c);
+            this->set_tx_iq_balance(offset, c);
         }
     }
 
diff --git a/host/lib/usrp/usrp2/usrp2_impl.cpp b/host/lib/usrp/usrp2/usrp2_impl.cpp
index 6f215471e..50916fb37 100644
--- a/host/lib/usrp/usrp2/usrp2_impl.cpp
+++ b/host/lib/usrp/usrp2/usrp2_impl.cpp
@@ -468,14 +468,14 @@ usrp2_impl::usrp2_impl(const device_addr_t &_device_addr){
         _tree->create<bool>(mb_path / "dboards" / "A" / "rx_frontends" / "dc_offset" / "enable")
             .subscribe(boost::bind(&rx_frontend_core_200::set_dc_offset_auto, _mbc[mb].rx_fe, _1))
             .set(true);
-        _tree->create<std::complex<double> >(mb_path / "dboards" / "A" / "rx_frontends" / "correction" / "value")
-            .subscribe(boost::bind(&rx_frontend_core_200::set_correction, _mbc[mb].rx_fe, _1))
+        _tree->create<std::complex<double> >(mb_path / "dboards" / "A" / "rx_frontends" / "iq_balance" / "value")
+            .subscribe(boost::bind(&rx_frontend_core_200::set_iq_balance, _mbc[mb].rx_fe, _1))
             .set(std::complex<double>(0.0, 0.0));
         _tree->create<std::complex<double> >(mb_path / "dboards" / "A" / "tx_frontends" / "dc_offset" / "value")
             .coerce(boost::bind(&tx_frontend_core_200::set_dc_offset, _mbc[mb].tx_fe, _1))
             .set(std::complex<double>(0.0, 0.0));
-        _tree->create<std::complex<double> >(mb_path / "dboards" / "A" / "tx_frontends" / "correction" / "value")
-            .subscribe(boost::bind(&tx_frontend_core_200::set_correction, _mbc[mb].tx_fe, _1))
+        _tree->create<std::complex<double> >(mb_path / "dboards" / "A" / "tx_frontends" / "iq_balance" / "value")
+            .subscribe(boost::bind(&tx_frontend_core_200::set_iq_balance, _mbc[mb].tx_fe, _1))
             .set(std::complex<double>(0.0, 0.0));
 
         ////////////////////////////////////////////////////////////////
-- 
cgit v1.2.3


From 07fb8d2b82c59ddaf7722b12db8c1387011fb34b Mon Sep 17 00:00:00 2001
From: Josh Blum <josh@joshknows.com>
Date: Thu, 3 Nov 2011 20:34:06 -0700
Subject: usrp: fix rate calculation logic

---
 host/lib/usrp/cores/rx_dsp_core_200.cpp |  3 +--
 host/lib/usrp/cores/tx_dsp_core_200.cpp |  3 +--
 host/lib/usrp/usrp1/io_impl.cpp         |  6 ++----
 host/tests/ranges_test.cpp              | 13 +++++++++++++
 4 files changed, 17 insertions(+), 8 deletions(-)

(limited to 'host/lib/usrp/cores')

diff --git a/host/lib/usrp/cores/rx_dsp_core_200.cpp b/host/lib/usrp/cores/rx_dsp_core_200.cpp
index 6d306d507..b97f9c58e 100644
--- a/host/lib/usrp/cores/rx_dsp_core_200.cpp
+++ b/host/lib/usrp/cores/rx_dsp_core_200.cpp
@@ -149,8 +149,7 @@ public:
     }
 
     double set_host_rate(const double rate){
-        const size_t decim_rate = this->get_host_rates().clip(
-            boost::math::iround(_tick_rate/rate), true);
+        const size_t decim_rate = boost::math::iround(_tick_rate/this->get_host_rates().clip(rate, true));
         size_t decim = decim_rate;
 
         //determine which half-band filters are activated
diff --git a/host/lib/usrp/cores/tx_dsp_core_200.cpp b/host/lib/usrp/cores/tx_dsp_core_200.cpp
index 1d571ea7c..9d90d30cc 100644
--- a/host/lib/usrp/cores/tx_dsp_core_200.cpp
+++ b/host/lib/usrp/cores/tx_dsp_core_200.cpp
@@ -89,8 +89,7 @@ public:
     }
 
     double set_host_rate(const double rate){
-        const size_t interp_rate = this->get_host_rates().clip(
-            boost::math::iround(_tick_rate/rate), true);
+        const size_t interp_rate = boost::math::iround(_tick_rate/this->get_host_rates().clip(rate, true));
         size_t interp = interp_rate;
 
         //determine which half-band filters are activated
diff --git a/host/lib/usrp/usrp1/io_impl.cpp b/host/lib/usrp/usrp1/io_impl.cpp
index 31c834109..937706fdd 100644
--- a/host/lib/usrp/usrp1/io_impl.cpp
+++ b/host/lib/usrp/usrp1/io_impl.cpp
@@ -470,8 +470,7 @@ uhd::meta_range_t usrp1_impl::get_tx_dsp_host_rates(void){
 double usrp1_impl::update_rx_samp_rate(size_t dspno, const double samp_rate){
 
     const size_t div = this->has_rx_halfband()? 2 : 1;
-    const size_t rate = this->get_rx_dsp_host_rates().clip(
-        boost::math::iround(_master_clock_rate / samp_rate), true);
+    const size_t rate = boost::math::iround(_master_clock_rate/this->get_rx_dsp_host_rates().clip(samp_rate, true));
 
     if (rate < 8 and this->has_rx_halfband()) UHD_MSG(warning) <<
         "USRP1 cannot achieve decimations below 8 when the half-band filter is present.\n"
@@ -499,8 +498,7 @@ double usrp1_impl::update_rx_samp_rate(size_t dspno, const double samp_rate){
 double usrp1_impl::update_tx_samp_rate(size_t dspno, const double samp_rate){
 
     const size_t div = this->has_tx_halfband()? 2 : 1;
-    const size_t rate = this->get_tx_dsp_host_rates().clip(
-        boost::math::iround(_master_clock_rate / samp_rate), true);
+    const size_t rate = boost::math::iround(_master_clock_rate/this->get_tx_dsp_host_rates().clip(samp_rate, true));
 
     if (dspno == 0){ //only care if dsp0 is set since its homogeneous
         bool s = this->disable_tx();
diff --git a/host/tests/ranges_test.cpp b/host/tests/ranges_test.cpp
index 5f6de4645..85bb4c3c4 100644
--- a/host/tests/ranges_test.cpp
+++ b/host/tests/ranges_test.cpp
@@ -55,3 +55,16 @@ BOOST_AUTO_TEST_CASE(test_ranges_clip){
     BOOST_CHECK_CLOSE(mr.clip(50.9, false), 50.9, tolerance);
     BOOST_CHECK_CLOSE(mr.clip(50.9, true), 51.0, tolerance);
 }
+
+BOOST_AUTO_TEST_CASE(test_ranges_clip2){
+    meta_range_t mr;
+    mr.push_back(range_t(1.));
+    mr.push_back(range_t(2.));
+    mr.push_back(range_t(3.));
+
+    BOOST_CHECK_CLOSE(mr.clip(2., true), 2., tolerance);
+    BOOST_CHECK_CLOSE(mr.clip(0., true), 1., tolerance);
+    BOOST_CHECK_CLOSE(mr.clip(1.2, true), 1., tolerance);
+    BOOST_CHECK_CLOSE(mr.clip(3.1, true), 3., tolerance);
+    BOOST_CHECK_CLOSE(mr.clip(4., true), 3., tolerance);
+}
-- 
cgit v1.2.3


From 69adaee902c5f409ebd7844667a0c253d7a06c6a Mon Sep 17 00:00:00 2001
From: Josh Blum <josh@joshknows.com>
Date: Wed, 26 Oct 2011 19:31:35 -0700
Subject: usrp2: reg map change for GPIO core

---
 host/lib/usrp/cores/gpio_core_200.cpp | 12 ++++++------
 host/lib/usrp/cores/gpio_core_200.hpp |  2 +-
 host/lib/usrp/usrp2/dboard_iface.cpp  |  2 +-
 host/lib/usrp/usrp2/fw_common.h       |  2 +-
 host/lib/usrp/usrp2/usrp2_regs.hpp    |  2 ++
 5 files changed, 11 insertions(+), 9 deletions(-)

(limited to 'host/lib/usrp/cores')

diff --git a/host/lib/usrp/cores/gpio_core_200.cpp b/host/lib/usrp/cores/gpio_core_200.cpp
index 8639b1851..d756097ff 100644
--- a/host/lib/usrp/cores/gpio_core_200.cpp
+++ b/host/lib/usrp/cores/gpio_core_200.cpp
@@ -23,15 +23,14 @@
 #define REG_GPIO_TX_ONLY       _base + 8
 #define REG_GPIO_BOTH          _base + 12
 #define REG_GPIO_DDR           _base + 16
-#define REG_GPIO_READ          _base + 0 //any address will readback
 
 using namespace uhd;
 using namespace usrp;
 
 class gpio_core_200_impl : public gpio_core_200{
 public:
-    gpio_core_200_impl(wb_iface::sptr iface, const size_t base):
-        _iface(iface), _base(base) { /* NOP */ }
+    gpio_core_200_impl(wb_iface::sptr iface, const size_t base, const size_t rb_addr):
+        _iface(iface), _base(base), _rb_addr(rb_addr) { /* NOP */ }
 
     void set_pin_ctrl(const unit_t unit, const boost::uint16_t value){
         _pin_ctrl[unit] = value; //shadow
@@ -57,12 +56,13 @@ public:
     }
 
     boost::uint16_t read_gpio(const unit_t unit){
-        return boost::uint16_t(_iface->peek32(REG_GPIO_READ) >> unit2shit(unit));
+        return boost::uint16_t(_iface->peek32(_rb_addr) >> unit2shit(unit));
     }
 
 private:
     wb_iface::sptr _iface;
     const size_t _base;
+    const size_t _rb_addr;
 
     uhd::dict<unit_t, boost::uint16_t> _pin_ctrl, _gpio_out, _gpio_ddr;
     uhd::dict<unit_t, uhd::dict<atr_reg_t, boost::uint16_t> > _atr_regs;
@@ -95,6 +95,6 @@ private:
 
 };
 
-gpio_core_200::sptr gpio_core_200::make(wb_iface::sptr iface, const size_t base){
-    return sptr(new gpio_core_200_impl(iface, base));
+gpio_core_200::sptr gpio_core_200::make(wb_iface::sptr iface, const size_t base, const size_t rb_addr){
+    return sptr(new gpio_core_200_impl(iface, base, rb_addr));
 }
diff --git a/host/lib/usrp/cores/gpio_core_200.hpp b/host/lib/usrp/cores/gpio_core_200.hpp
index 7ff2af649..278575874 100644
--- a/host/lib/usrp/cores/gpio_core_200.hpp
+++ b/host/lib/usrp/cores/gpio_core_200.hpp
@@ -33,7 +33,7 @@ public:
     typedef uhd::usrp::dboard_iface::atr_reg_t atr_reg_t;
 
     //! makes a new GPIO core from iface and slave base
-    static sptr make(wb_iface::sptr iface, const size_t base);
+    static sptr make(wb_iface::sptr iface, const size_t base, const size_t rb_addr);
 
     //! 1 = ATR
     virtual void set_pin_ctrl(const unit_t unit, const boost::uint16_t value) = 0;
diff --git a/host/lib/usrp/usrp2/dboard_iface.cpp b/host/lib/usrp/usrp2/dboard_iface.cpp
index c31fc52b7..bc510c8a1 100644
--- a/host/lib/usrp/usrp2/dboard_iface.cpp
+++ b/host/lib/usrp/usrp2/dboard_iface.cpp
@@ -107,7 +107,7 @@ usrp2_dboard_iface::usrp2_dboard_iface(
 ){
     _iface = iface;
     _clock_ctrl = clock_ctrl;
-    _gpio = gpio_core_200::make(_iface, GPIO_BASE);
+    _gpio = gpio_core_200::make(_iface, U2_REG_SR_ADDR(SR_GPIO), U2_REG_GPIO_RB);
 
     //reset the aux dacs
     _dac_regs[UNIT_RX] = ad5623_regs_t();
diff --git a/host/lib/usrp/usrp2/fw_common.h b/host/lib/usrp/usrp2/fw_common.h
index 7ad06f33f..62ba2d792 100644
--- a/host/lib/usrp/usrp2/fw_common.h
+++ b/host/lib/usrp/usrp2/fw_common.h
@@ -30,7 +30,7 @@ extern "C" {
 #endif
 
 //fpga and firmware compatibility numbers
-#define USRP2_FPGA_COMPAT_NUM 7
+#define USRP2_FPGA_COMPAT_NUM 8
 #define USRP2_FW_COMPAT_NUM 11
 #define USRP2_FW_VER_MINOR 0
 
diff --git a/host/lib/usrp/usrp2/usrp2_regs.hpp b/host/lib/usrp/usrp2/usrp2_regs.hpp
index 8839997f1..179a930c6 100644
--- a/host/lib/usrp/usrp2/usrp2_regs.hpp
+++ b/host/lib/usrp/usrp2/usrp2_regs.hpp
@@ -50,6 +50,7 @@
 #define SR_TX_CTRL  144   // 6
 #define SR_TX_DSP   160   // 5
 
+#define SR_GPIO     184
 #define SR_UDP_SM   192   // 64
 
 #define U2_REG_SR_ADDR(sr) (SETTING_REGS_BASE + (4 * (sr)))
@@ -95,6 +96,7 @@
 // Readback regs
 ////////////////////////////////////////////////
 #define U2_REG_STATUS READBACK_BASE + 4*8
+#define U2_REG_GPIO_RB READBACK_BASE + 4*9
 #define U2_REG_TIME64_SECS_RB_IMM READBACK_BASE + 4*10
 #define U2_REG_TIME64_TICKS_RB_IMM READBACK_BASE + 4*11
 #define U2_REG_COMPAT_NUM_RB READBACK_BASE + 4*12
-- 
cgit v1.2.3