From 9c3fd671810abf0d39d7baa78073b90b95d9b5bc Mon Sep 17 00:00:00 2001 From: Josh Blum Date: Fri, 16 Aug 2013 10:49:03 -0700 Subject: b200: lower clock rate is 5MHz due to DCM --- host/lib/usrp/common/ad9361_ctrl.hpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'host/lib/usrp/common') diff --git a/host/lib/usrp/common/ad9361_ctrl.hpp b/host/lib/usrp/common/ad9361_ctrl.hpp index e678ba3b0..fd8012764 100644 --- a/host/lib/usrp/common/ad9361_ctrl.hpp +++ b/host/lib/usrp/common/ad9361_ctrl.hpp @@ -99,7 +99,8 @@ public: //! get the clock rate range for the frontend static uhd::meta_range_t get_clock_rate_range(void) { - return uhd::meta_range_t(220e3, 61.44e6); + //return uhd::meta_range_t(220e3, 61.44e6); + return uhd::meta_range_t(5e6, 61.44e6); //5 MHz DCM low end } //! set the filter bandwidth for the frontend -- cgit v1.2.3