From 8607cf96932120bab3d4775ff297801add6403a0 Mon Sep 17 00:00:00 2001 From: Jonathon Pendlum Date: Mon, 1 Aug 2016 14:26:30 -0700 Subject: ad9361: Added option for safe SPI - Also added check for reading chip ID --- host/lib/usrp/common/ad9361_driver/ad9361_device.cpp | 10 ++++++++++ host/lib/usrp/common/ad9361_driver/ad9361_device.h | 3 +++ 2 files changed, 13 insertions(+) (limited to 'host/lib/usrp/common/ad9361_driver') diff --git a/host/lib/usrp/common/ad9361_driver/ad9361_device.cpp b/host/lib/usrp/common/ad9361_driver/ad9361_device.cpp index bb25379c0..095017bb6 100644 --- a/host/lib/usrp/common/ad9361_driver/ad9361_device.cpp +++ b/host/lib/usrp/common/ad9361_driver/ad9361_device.cpp @@ -1565,6 +1565,12 @@ void ad9361_device_t::initialize() _io_iface->poke8(0x000, 0x00); boost::this_thread::sleep(boost::posix_time::milliseconds(20)); + /* Check device ID to make sure iface works */ + boost::uint32_t device_id = (_io_iface->peek8(0x037) & 0x8); + if (device_id != 0x8) { + throw uhd::runtime_error(str(boost::format("[ad9361_device_t::initialize] Device ID readback failure. Expected: 0x8, Received: 0x%x") % device_id)); + } + /* There is not a WAT big enough for this. */ _io_iface->poke8(0x3df, 0x01); @@ -1774,6 +1780,10 @@ void ad9361_device_t::initialize() _io_iface->poke8(0x014, 0x21); } +void ad9361_device_t::set_io_iface(ad9361_io::sptr io_iface) +{ + _io_iface = io_iface; +} /* This function sets the RX / TX rate between AD9361 and the FPGA, and * thus determines the interpolation / decimation required in the FPGA to diff --git a/host/lib/usrp/common/ad9361_driver/ad9361_device.h b/host/lib/usrp/common/ad9361_driver/ad9361_device.h index 73b1d9a35..d0e8a7e39 100644 --- a/host/lib/usrp/common/ad9361_driver/ad9361_device.h +++ b/host/lib/usrp/common/ad9361_driver/ad9361_device.h @@ -75,6 +75,9 @@ public: /* Initialize the AD9361 codec. */ void initialize(); + /* Set SPI interface */ + void set_io_iface(ad9361_io::sptr io_iface); + /* This function sets the RX / TX rate between AD9361 and the FPGA, and * thus determines the interpolation / decimation required in the FPGA to * achieve the user's requested rate. -- cgit v1.2.3