From 47562bbf143889197f942168173ae7eb99209f19 Mon Sep 17 00:00:00 2001 From: Julian Arnold Date: Tue, 20 Jan 2015 08:55:08 -0800 Subject: ad9361: Added relative temperature sensor This allows to read a relative temperature from an AD9361 device. --- .../usrp/common/ad9361_driver/ad9361_device.cpp | 46 +++++++++++++++++++++- host/lib/usrp/common/ad9361_driver/ad9361_device.h | 7 ++++ 2 files changed, 52 insertions(+), 1 deletion(-) (limited to 'host/lib/usrp/common/ad9361_driver') diff --git a/host/lib/usrp/common/ad9361_driver/ad9361_device.cpp b/host/lib/usrp/common/ad9361_driver/ad9361_device.cpp index 7e574920a..ba8fe1f20 100644 --- a/host/lib/usrp/common/ad9361_driver/ad9361_device.cpp +++ b/host/lib/usrp/common/ad9361_driver/ad9361_device.cpp @@ -1485,7 +1485,7 @@ void ad9361_device_t::initialize() /* Setup AuxADC */ _io_iface->poke8(0x00B, 0x00); // Temp Sensor Setup (Offset) _io_iface->poke8(0x00C, 0x00); // Temp Sensor Setup (Temp Window) - _io_iface->poke8(0x00D, 0x03); // Temp Sensor Setup (Periodic Measure) + _io_iface->poke8(0x00D, 0x00); // Temp Sensor Setup (Manual Measure) _io_iface->poke8(0x00F, 0x04); // Temp Sensor Setup (Decimation) _io_iface->poke8(0x01C, 0x10); // AuxADC Setup (Clock Div) _io_iface->poke8(0x01D, 0x01); // AuxADC Setup (Decimation/Enable) @@ -1946,4 +1946,48 @@ double ad9361_device_t::get_rssi(chain_t chain) return rssi; } +/* + * Returns the reading of the internal temperature sensor. + * One point calibration of the sensor was done according to datasheet + * leading to the given default constant correction factor. + */ +double ad9361_device_t::_get_temperature(const double cal_offset, const double timeout) +{ + //set 0x01D[0] to 1 to disable AuxADC GPIO reading + boost::uint8_t tmp = 0; + tmp = _io_iface->peek8(0x01D); + _io_iface->poke8(0x01D, (tmp | 0x01)); + _io_iface->poke8(0x00B, 0); //set offset to 0 + + _io_iface->poke8(0x00C, 0x01); //start reading, clears bit 0x00C[1] + boost::posix_time::ptime start_time = boost::posix_time::microsec_clock::local_time(); + boost::posix_time::time_duration elapsed; + //wait for valid data (toggle of bit 1 in 0x00C) + while(((_io_iface->peek8(0x00C) >> 1) & 0x01) == 0) { + boost::this_thread::sleep(boost::posix_time::microseconds(100)); + elapsed = boost::posix_time::microsec_clock::local_time() - start_time; + if(elapsed.total_milliseconds() > (timeout*1000)) + { + throw uhd::runtime_error("[ad9361_device_t] timeout while reading temperature"); + } + } + _io_iface->poke8(0x00C, 0x00); //clear read flag + + boost::uint8_t temp = _io_iface->peek8(0x00E); //read temperature. + double tmp_temp = temp/1.140f; //according to ADI driver + tmp_temp = tmp_temp + cal_offset; //Constant offset acquired by one point calibration. + + return tmp_temp; +} + +double ad9361_device_t::get_average_temperature(const double cal_offset, const size_t num_samples) +{ + double d_temp = 0; + for(size_t i = 0; i < num_samples; i++) { + double tmp_temp = _get_temperature(cal_offset); + d_temp += (tmp_temp/num_samples); + } + return d_temp; +} + }} diff --git a/host/lib/usrp/common/ad9361_driver/ad9361_device.h b/host/lib/usrp/common/ad9361_driver/ad9361_device.h index fead90424..b178e46cc 100644 --- a/host/lib/usrp/common/ad9361_driver/ad9361_device.h +++ b/host/lib/usrp/common/ad9361_driver/ad9361_device.h @@ -66,6 +66,12 @@ public: /* Read back the internal RSSI measurement data. */ double get_rssi(chain_t chain); + /*! Read the internal temperature sensor + *\param calibrate return raw sensor readings or apply calibration factor. + *\param num_samples number of measurements to average over + */ + double get_average_temperature(const double cal_offset = -30.0, const size_t num_samples = 3); + //Constants static const double AD9361_MAX_GAIN; static const double AD9361_MAX_CLOCK_RATE; @@ -95,6 +101,7 @@ private: //Methods void _reprogram_gains(); double _tune_helper(direction_t direction, const double value); double _setup_rates(const double rate); + double _get_temperature(const double cal_offset, const double timeout = 0.1); private: //Members typedef struct { -- cgit v1.2.3 From acfac7385c6130df54c60aa5c31bee6d06fa3f6a Mon Sep 17 00:00:00 2001 From: Ian Buckley Date: Mon, 9 Feb 2015 14:17:31 -0800 Subject: b200: Revised configuration of AD9361 for master_clock_rates >56e6MHz. Issues #649 & #691 --- host/lib/usrp/common/ad9361_driver/ad9361_device.cpp | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) (limited to 'host/lib/usrp/common/ad9361_driver') diff --git a/host/lib/usrp/common/ad9361_driver/ad9361_device.cpp b/host/lib/usrp/common/ad9361_driver/ad9361_device.cpp index d3e53c80f..7268aff2d 100644 --- a/host/lib/usrp/common/ad9361_driver/ad9361_device.cpp +++ b/host/lib/usrp/common/ad9361_driver/ad9361_device.cpp @@ -1049,7 +1049,7 @@ double ad9361_device_t::_tune_bbvco(const double rate) const double vcomin = 672e6; double vcorate; int vcodiv; - + /* Iterate over VCO dividers until appropriate divider is found. */ int i = 1; for (; i <= 6; i++) { @@ -1306,7 +1306,7 @@ double ad9361_device_t::_setup_rates(const double rate) divfactor = 16; _tfir_factor = 2; _rfir_factor = 2; - } else if ((rate >= 41e6) && (rate <= 56e6)) { + } else if ((rate >= 41e6) && (rate <= 58e6)) { // RX1 + RX2 enabled, 3, 1, 2, 2 _regs.rxfilt = B8(11100110); @@ -1316,15 +1316,15 @@ double ad9361_device_t::_setup_rates(const double rate) divfactor = 12; _tfir_factor = 2; _rfir_factor = 2; - } else if ((rate > 56e6) && (rate <= 61.44e6)) { - // RX1 + RX2 enabled, 3, 1, 1, 2 - _regs.rxfilt = B8(11100010); + } else if ((rate > 58e6) && (rate <= 61.44e6)) { + // RX1 + RX2 enabled, 2, 1, 2, 2 + _regs.rxfilt = B8(11010110); - // TX1 + TX2 enabled, 3, 1, 1, 1 - _regs.txfilt = B8(11100001); + // TX1 + TX2 enabled, 2, 1, 1, 2 + _regs.txfilt = B8(11010010); - divfactor = 6; - _tfir_factor = 1; + divfactor = 8; + _tfir_factor = 2; _rfir_factor = 2; } else { // should never get in here @@ -1340,7 +1340,7 @@ double ad9361_device_t::_setup_rates(const double rate) /* The DAC clock must be <= 336e6, and is either the ADC clock or 1/2 the * ADC clock.*/ if (adcclk > 336e6) { - /* Make the DAC clock = ADC/2, and bypass the TXFIR. */ + /* Make the DAC clock = ADC/2 */ _regs.bbpll = _regs.bbpll | 0x08; dacclk = adcclk / 2.0; } else { -- cgit v1.2.3 From 2b06c3815551c99d7691a7aa3dbcf6eaedc9e998 Mon Sep 17 00:00:00 2001 From: Julian Arnold Date: Fri, 20 Feb 2015 10:51:45 -0800 Subject: b2xx: dc offset and iq imbalance correction control --- host/lib/usrp/b200/b200_impl.cpp | 14 +- host/lib/usrp/common/ad9361_ctrl.cpp | 28 ++++ host/lib/usrp/common/ad9361_ctrl.hpp | 15 +- .../usrp/common/ad9361_driver/ad9361_device.cpp | 125 +++++++++++++--- host/lib/usrp/common/ad9361_driver/ad9361_device.h | 9 ++ .../usrp/common/ad9361_driver/ad9361_gain_tables.h | 162 ++++++++++----------- 6 files changed, 245 insertions(+), 108 deletions(-) (limited to 'host/lib/usrp/common/ad9361_driver') diff --git a/host/lib/usrp/b200/b200_impl.cpp b/host/lib/usrp/b200/b200_impl.cpp index c1729ead3..ada25ad59 100644 --- a/host/lib/usrp/b200/b200_impl.cpp +++ b/host/lib/usrp/b200/b200_impl.cpp @@ -591,7 +591,7 @@ b200_impl::b200_impl(const device_addr_t &device_addr) b200_impl::~b200_impl(void) { - UHD_SAFE_CALL + UHD_SAFE_CALL ( _async_task.reset(); ) @@ -702,7 +702,7 @@ void b200_impl::setup_radio(const size_t dspno) _tree->create(rf_fe_path / "use_lo_offset").set(false); _tree->create(rf_fe_path / "bandwidth" / "value") .coerce(boost::bind(&ad9361_ctrl::set_bw_filter, _codec_ctrl, key, _1)) - .set(40e6); + .set(56e6); _tree->create(rf_fe_path / "bandwidth" / "range") .publish(boost::bind(&ad9361_ctrl::get_bw_filter_range, key)); _tree->create(rf_fe_path / "freq" / "value") @@ -715,6 +715,16 @@ void b200_impl::setup_radio(const size_t dspno) .publish(boost::bind(&ad9361_ctrl::get_temperature, _codec_ctrl)); //setup RX related stuff + if(direction) + { + _tree->create(rf_fe_path / "dc_offset" / "enable" ) + .subscribe(boost::bind(&ad9361_ctrl::set_dc_offset_auto, _codec_ctrl, key, _1)).set(true); + + _tree->create(rf_fe_path / "iq_balance" / "enable" ) + .subscribe(boost::bind(&ad9361_ctrl::set_iq_balance_auto, _codec_ctrl, key, _1)).set(true); + } + + //setup antenna stuff if (key[0] == 'R') { static const std::vector ants = boost::assign::list_of("TX/RX")("RX2"); diff --git a/host/lib/usrp/common/ad9361_ctrl.cpp b/host/lib/usrp/common/ad9361_ctrl.cpp index 3db6739e7..4a3c17cf1 100644 --- a/host/lib/usrp/common/ad9361_ctrl.cpp +++ b/host/lib/usrp/common/ad9361_ctrl.cpp @@ -178,6 +178,34 @@ public: return sensor_value_t("temp", _device.get_average_temperature(), "C"); } + void set_dc_offset_auto(const std::string &which, const bool on) + { + boost::lock_guard lock(_mutex); + + ad9361_device_t::direction_t direction = _get_direction_from_antenna(which); + _device.set_dc_offset_auto(direction,on); + } + + void set_dc_offset(const std::string &which, const std::complex value) + { + //This feature should not be used according to Analog Devices + throw uhd::runtime_error("ad9361_ctrl::set_dc_offset this feature is not supported on this device."); + } + + void set_iq_balance_auto(const std::string &which, const bool on) + { + boost::lock_guard lock(_mutex); + + ad9361_device_t::direction_t direction = _get_direction_from_antenna(which); + _device.set_iq_balance_auto(direction,on); + } + + void set_iq_balance(const std::string &which, const std::complex value) + { + //This feature should not be used according to Analog Devices + throw uhd::runtime_error("ad9361_ctrl::set_iq_balance this feature is not supported on this device."); + } + private: static ad9361_device_t::direction_t _get_direction_from_antenna(const std::string& antenna) { diff --git a/host/lib/usrp/common/ad9361_ctrl.hpp b/host/lib/usrp/common/ad9361_ctrl.hpp index f831f870d..94eee608e 100644 --- a/host/lib/usrp/common/ad9361_ctrl.hpp +++ b/host/lib/usrp/common/ad9361_ctrl.hpp @@ -25,6 +25,7 @@ #include #include #include +#include namespace uhd { namespace usrp { @@ -95,7 +96,19 @@ public: //! tune the given frontend, return the exact value virtual double tune(const std::string &which, const double value) = 0; - //! turn on/off data port loopback + //! set the DC offset for I and Q manually + virtual void set_dc_offset(const std::string &which, const std::complex value) = 0; + + //! enable or disable the BB/RF DC tracking feature + virtual void set_dc_offset_auto(const std::string &which, const bool on) = 0; + + //! set the IQ correction value manually + virtual void set_iq_balance(const std::string &which, const std::complex value) = 0; + + //! enable or disable the quadrature calibration + virtual void set_iq_balance_auto(const std::string &which, const bool on) = 0; + + //! turn on/off Catalina's data port loopback virtual void data_port_loopback(const bool on) = 0; //! read internal RSSI sensor diff --git a/host/lib/usrp/common/ad9361_driver/ad9361_device.cpp b/host/lib/usrp/common/ad9361_driver/ad9361_device.cpp index f1a82d71c..e5938184c 100644 --- a/host/lib/usrp/common/ad9361_driver/ad9361_device.cpp +++ b/host/lib/usrp/common/ad9361_driver/ad9361_device.cpp @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include @@ -650,11 +651,12 @@ void ad9361_device_t::_setup_adc() } /* Calibrate the baseband DC offset. - * - * Note that this function is called from within the TX quadrature - * calibration function! */ + * Disables tracking + */ void ad9361_device_t::_calibrate_baseband_dc_offset() { + _io_iface->poke8(0x18b, 0x83); //Reset RF DC tracking flag + _io_iface->poke8(0x193, 0x3f); // Calibration settings _io_iface->poke8(0x190, 0x0f); // Set tracking coefficient //write_ad9361_reg(device, 0x190, /*0x0f*//*0xDF*/0x80*1 | 0x40*1 | (16+8/*+4*/)); // Set tracking coefficient: don't *4 counter, do decim /4, increased gain shift @@ -674,9 +676,8 @@ void ad9361_device_t::_calibrate_baseband_dc_offset() } /* Calibrate the RF DC offset. - * - * Note that this function is called from within the TX quadrature - * calibration function. */ + * Disables tracking + */ void ad9361_device_t::_calibrate_rf_dc_offset() { /* Some settings are frequency-dependent. */ @@ -691,7 +692,7 @@ void ad9361_device_t::_calibrate_rf_dc_offset() } _io_iface->poke8(0x185, 0x20); // RF DC Offset wait count - _io_iface->poke8(0x18b, 0x83); + _io_iface->poke8(0x18b, 0x83); // Disable tracking _io_iface->poke8(0x189, 0x30); /* Run the calibration! */ @@ -707,6 +708,16 @@ void ad9361_device_t::_calibrate_rf_dc_offset() } } +void ad9361_device_t::_configure_bb_rf_dc_tracking(const bool on) +{ + if(on) + { + _io_iface->poke8(0x18b, 0xad); // Enable BB and RF DC tracking + } else { + _io_iface->poke8(0x18b, 0x83); // Disable BB and RF DC tracking + } +} + /* Start the RX quadrature calibration. * * Note that we are using AD9361's 'tracking' feature for RX quadrature @@ -719,16 +730,20 @@ void ad9361_device_t::_calibrate_rx_quadrature() _io_iface->poke8(0x16e, 0x25); // RX Gain index to use for cal _io_iface->poke8(0x16a, 0x75); // Set Kexp phase _io_iface->poke8(0x16b, 0x15); // Set Kexp amplitude - _io_iface->poke8(0x169, 0xcf); // Continuous tracking mode - _io_iface->poke8(0x18b, 0xad); + + if(_use_iq_balance_correction) + { + _io_iface->poke8(0x169, 0xcf); // Continuous tracking mode. Gets disabled in _tx_quadrature_cal_routine! + } } -/* TX quadtrature calibration routine. +/* TX quadrature calibration routine. * * The TX quadrature needs to be done twice, once for each TX chain, with * only one register change in between. Thus, this function enacts the * calibrations, and it is called from calibrate_tx_quadrature. */ void ad9361_device_t::_tx_quadrature_cal_routine() { + /* This is a weird process, but here is how it works: * 1) Read the calibrated NCO frequency bits out of 0A3. * 2) Write the two bits to the RX NCO freq part of 0A0. @@ -773,12 +788,6 @@ void ad9361_device_t::_tx_quadrature_cal_routine() { _io_iface->poke8(0x0a4, 0xf0); // Cal setting conut _io_iface->poke8(0x0ae, 0x00); // Cal LPF gain index (split mode) - /* First, calibrate the baseband DC offset. */ - _calibrate_baseband_dc_offset(); - - /* Second, calibrate the RF DC offset. */ - _calibrate_rf_dc_offset(); - /* Now, calibrate the TX quadrature! */ size_t count = 0; _io_iface->poke8(0x016, 0x10); @@ -793,9 +802,7 @@ void ad9361_device_t::_tx_quadrature_cal_routine() { } /* Run the TX quadrature calibration. - * - * Note that from within this function we are also triggering the baseband - * and RF DC calibrations. */ + */ void ad9361_device_t::_calibrate_tx_quadrature() { /* Make sure we are, in fact, in the ALERT state. If not, something is @@ -879,7 +886,7 @@ void ad9361_device_t::_program_mixer_gm_subtable() void ad9361_device_t::_program_gain_table() { /* Figure out which gain table we should be using for our current * frequency band. */ - boost::uint8_t (*gain_table)[5] = NULL; + boost::uint8_t (*gain_table)[3] = NULL; boost::uint8_t new_gain_table; if (_rx_freq < 1300e6) { gain_table = gain_table_sub_1300mhz; @@ -910,9 +917,9 @@ void ad9361_device_t::_program_gain_table() { boost::uint8_t index = 0; for (; index < 77; index++) { _io_iface->poke8(0x130, index); - _io_iface->poke8(0x131, gain_table[index][1]); - _io_iface->poke8(0x132, gain_table[index][2]); - _io_iface->poke8(0x133, gain_table[index][3]); + _io_iface->poke8(0x131, gain_table[index][0]); + _io_iface->poke8(0x132, gain_table[index][1]); + _io_iface->poke8(0x133, gain_table[index][2]); _io_iface->poke8(0x137, 0x1E); _io_iface->poke8(0x134, 0x00); _io_iface->poke8(0x134, 0x00); @@ -1256,6 +1263,7 @@ double ad9361_device_t::_setup_rates(const double rate) int divfactor = 0; _tfir_factor = 0; _rfir_factor = 0; + if (rate < 0.33e6) { // RX1 + RX2 enabled, 3, 2, 2, 4 _regs.rxfilt = B8(11101111); @@ -1411,6 +1419,8 @@ void ad9361_device_t::initialize() _rx2_gain = 0; _tx1_gain = 0; _tx2_gain = 0; + _use_dc_offset_correction = true; + _use_iq_balance_correction = true; /* Reset the device. */ _io_iface->poke8(0x000, 0x01); @@ -1563,8 +1573,11 @@ void ad9361_device_t::initialize() _setup_adc(); + _calibrate_baseband_dc_offset(); + _calibrate_rf_dc_offset(); _calibrate_tx_quadrature(); _calibrate_rx_quadrature(); + _configure_bb_rf_dc_tracking(_use_dc_offset_correction); // cals done, set PPORT config switch (_client_params->get_digital_interface_mode()) { @@ -1687,8 +1700,11 @@ double ad9361_device_t::set_clock_rate(const double req_rate) _setup_adc(); + _calibrate_baseband_dc_offset(); + _calibrate_rf_dc_offset(); _calibrate_tx_quadrature(); _calibrate_rx_quadrature(); + _configure_bb_rf_dc_tracking(_use_dc_offset_correction); // cals done, set PPORT config switch (_client_params->get_digital_interface_mode()) { @@ -1841,9 +1857,11 @@ double ad9361_device_t::tune(direction_t direction, const double value) _reprogram_gains(); /* Run the calibration algorithms. */ + _calibrate_baseband_dc_offset(); + _calibrate_rf_dc_offset(); _calibrate_tx_quadrature(); _calibrate_rx_quadrature(); - + _configure_bb_rf_dc_tracking(_use_dc_offset_correction); //if this is not done here, bb dc offset is not good /* If we were in the FDD state, return it now. */ if (not_in_alert) { _io_iface->poke8(0x014, 0x21); @@ -1990,4 +2008,63 @@ double ad9361_device_t::get_average_temperature(const double cal_offset, const s return d_temp; } +void ad9361_device_t::set_dc_offset_auto(direction_t direction, const bool on) +{ + if(direction == RX) + { + _use_dc_offset_correction = on; + _configure_bb_rf_dc_tracking(_use_dc_offset_correction); + if(on) + { + _io_iface->poke8(0x182, (_io_iface->peek8(0x182) & (~((1 << 7) | (1 << 6) | (1 << 3) | (1 << 2))))); //Clear force bits + //Do a single shot DC offset cal before enabling tracking (Not possible if not in ALERT state. Is it necessary?) + } else { + //clear current config values + _io_iface->poke8(0x182, (_io_iface->peek8(0x182) | ((1 << 7) | (1 << 6) | (1 << 3) | (1 << 2)))); //Set input A and input B&C force enable bits + _io_iface->poke8(0x174, 0x00); + _io_iface->poke8(0x175, 0x00); + _io_iface->poke8(0x176, 0x00); + _io_iface->poke8(0x177, 0x00); + _io_iface->poke8(0x178, 0x00); + _io_iface->poke8(0x17D, 0x00); + _io_iface->poke8(0x17E, 0x00); + _io_iface->poke8(0x17F, 0x00); + _io_iface->poke8(0x180, 0x00); + _io_iface->poke8(0x181, 0x00); + } + } else { + // DC offset is removed during TX quad cal + throw uhd::runtime_error("[ad9361_device_t] [set_iq_balance_auto] INVALID_CODE_PATH"); + } +} + +void ad9361_device_t::set_iq_balance_auto(direction_t direction, const bool on) +{ + if(direction == RX) + { + _use_iq_balance_correction = on; + if(on) + { + //disable force registers and enable tracking + _io_iface->poke8(0x182, (_io_iface->peek8(0x182) & (~ ( (1<<1) | (1<<0) | (1<<5) | (1<<4) )))); + _calibrate_rx_quadrature(); + } else { + //disable IQ tracking + _io_iface->poke8(0x169, 0xc0); + //clear current config values + _io_iface->poke8(0x182, (_io_iface->peek8(0x182) | ((1 << 1) | (1 << 0) | (1 << 5) | (1 << 4)))); //Set Rx2 input B&C force enable bit + _io_iface->poke8(0x17B, 0x00); + _io_iface->poke8(0x17C, 0x00); + _io_iface->poke8(0x179, 0x00); + _io_iface->poke8(0x17A, 0x00); + _io_iface->poke8(0x170, 0x00); + _io_iface->poke8(0x171, 0x00); + _io_iface->poke8(0x172, 0x00); + _io_iface->poke8(0x173, 0x00); + } + } else { + throw uhd::runtime_error("[ad9361_device_t] [set_iq_balance_auto] INVALID_CODE_PATH"); + } +} + }} diff --git a/host/lib/usrp/common/ad9361_driver/ad9361_device.h b/host/lib/usrp/common/ad9361_driver/ad9361_device.h index 8f64922f8..93dc413d5 100644 --- a/host/lib/usrp/common/ad9361_driver/ad9361_device.h +++ b/host/lib/usrp/common/ad9361_driver/ad9361_device.h @@ -72,6 +72,12 @@ public: */ double get_average_temperature(const double cal_offset = -30.0, const size_t num_samples = 3); + /* Turn on/off AD9361's RX DC offset correction */ + void set_dc_offset_auto(direction_t direction, const bool on); + + /* Turn on/off AD9361's RX IQ imbalance correction */ + void set_iq_balance_auto(direction_t direction, const bool on); + //Constants static const double AD9361_MAX_GAIN; static const double AD9361_MAX_CLOCK_RATE; @@ -102,6 +108,7 @@ private: //Methods double _tune_helper(direction_t direction, const double value); double _setup_rates(const double rate); double _get_temperature(const double cal_offset, const double timeout = 0.1); + void _configure_bb_rf_dc_tracking(const bool on); private: //Members typedef struct { @@ -130,6 +137,8 @@ private: //Members chip_regs_t _regs; //Synchronization boost::recursive_mutex _mutex; + bool _use_dc_offset_correction; + bool _use_iq_balance_correction; }; }} //namespace diff --git a/host/lib/usrp/common/ad9361_driver/ad9361_gain_tables.h b/host/lib/usrp/common/ad9361_driver/ad9361_gain_tables.h index 786029d6e..553655fa5 100644 --- a/host/lib/usrp/common/ad9361_driver/ad9361_gain_tables.h +++ b/host/lib/usrp/common/ad9361_driver/ad9361_gain_tables.h @@ -7,91 +7,91 @@ #include -boost::uint8_t gain_table_sub_1300mhz[77][5] = { {0,0x00,0x00,0x20,1}, - {1,0x00,0x00,0x00,0}, {2,0x00,0x00,0x00,0}, {3,0x00,0x01,0x00,0}, - {4,0x00,0x02,0x00,0}, {5,0x00,0x03,0x00,0}, {6,0x00,0x04,0x00,0}, - {7,0x00,0x05,0x00,0}, {8,0x01,0x03,0x20,1}, {9,0x01,0x04,0x00,0}, - {10,0x01,0x05,0x00,0}, {11,0x01,0x06,0x00,0}, {12,0x01,0x07,0x00,0}, - {13,0x01,0x08,0x00,0}, {14,0x01,0x09,0x00,0}, {15,0x01,0x0A,0x00,0}, - {16,0x01,0x0B,0x00,0}, {17,0x01,0x0C,0x00,0}, {18,0x01,0x0D,0x00,0}, - {19,0x01,0x0E,0x00,0}, {20,0x02,0x09,0x20,1}, {21,0x02,0x0A,0x00,0}, - {22,0x02,0x0B,0x00,0}, {23,0x02,0x0C,0x00,0}, {24,0x02,0x0D,0x00,0}, - {25,0x02,0x0E,0x00,0}, {26,0x02,0x0F,0x00,0}, {27,0x02,0x10,0x00,0}, - {28,0x02,0x2B,0x20,1}, {29,0x02,0x2C,0x00,0}, {30,0x04,0x27,0x20,1}, - {31,0x04,0x28,0x00,0}, {32,0x04,0x29,0x00,0}, {33,0x04,0x2A,0x00,0}, - {34,0x04,0x2B,0x00,1}, {35,0x24,0x21,0x20,0}, {36,0x24,0x22,0x00,1}, - {37,0x44,0x20,0x20,0}, {38,0x44,0x21,0x00,0}, {39,0x44,0x22,0x00,0}, - {40,0x44,0x23,0x00,0}, {41,0x44,0x24,0x00,0}, {42,0x44,0x25,0x00,0}, - {43,0x44,0x26,0x00,0}, {44,0x44,0x27,0x00,0}, {45,0x44,0x28,0x00,0}, - {46,0x44,0x29,0x00,0}, {47,0x44,0x2A,0x00,0}, {48,0x44,0x2B,0x00,0}, - {49,0x44,0x2C,0x00,0}, {50,0x44,0x2D,0x00,0}, {51,0x44,0x2E,0x00,0}, - {52,0x44,0x2F,0x00,0}, {53,0x44,0x30,0x00,0}, {54,0x44,0x31,0x00,0}, - {55,0x64,0x2E,0x20,1}, {56,0x64,0x2F,0x00,0}, {57,0x64,0x30,0x00,0}, - {58,0x64,0x31,0x00,0}, {59,0x64,0x32,0x00,0}, {60,0x64,0x33,0x00,0}, - {61,0x64,0x34,0x00,0}, {62,0x64,0x35,0x00,0}, {63,0x64,0x36,0x00,0}, - {64,0x64,0x37,0x00,0}, {65,0x64,0x38,0x00,0}, {66,0x65,0x38,0x20,1}, - {67,0x66,0x38,0x20,1}, {68,0x67,0x38,0x20,1}, {69,0x68,0x38,0x20,1}, - {70,0x69,0x38,0x20,1}, {71,0x6A,0x38,0x20,1}, {72,0x6B,0x38,0x20,1}, - {73,0x6C,0x38,0x20,1}, {74,0x6D,0x38,0x20,1}, {75,0x6E,0x38,0x20,1}, - {76,0x6F,0x38,0x20,1}}; +boost::uint8_t gain_table_sub_1300mhz[77][3] = { +{ 0x00, 0x00, 0x20 }, { 0x00, 0x00, 0x00 }, { 0x00, 0x00, 0x00 }, +{ 0x00, 0x01, 0x00 }, { 0x00, 0x02, 0x00 }, { 0x00, 0x03, 0x00 }, +{ 0x00, 0x04, 0x00 }, { 0x00, 0x05, 0x00 }, { 0x01, 0x03, 0x20 }, +{ 0x01, 0x04, 0x00 }, { 0x01, 0x05, 0x00 }, { 0x01, 0x06, 0x00 }, +{ 0x01, 0x07, 0x00 }, { 0x01, 0x08, 0x00 }, { 0x01, 0x09, 0x00 }, +{ 0x01, 0x0A, 0x00 }, { 0x01, 0x0B, 0x00 }, { 0x01, 0x0C, 0x00 }, +{ 0x01, 0x0D, 0x00 }, { 0x01, 0x0E, 0x00 }, { 0x02, 0x09, 0x20 }, +{ 0x02, 0x0A, 0x00 }, { 0x02, 0x0B, 0x00 }, { 0x02, 0x0C, 0x00 }, +{ 0x02, 0x0D, 0x00 }, { 0x02, 0x0E, 0x00 }, { 0x02, 0x0F, 0x00 }, +{ 0x02, 0x10, 0x00 }, { 0x02, 0x2B, 0x20 }, { 0x02, 0x2C, 0x00 }, +{ 0x04, 0x28, 0x20 }, { 0x04, 0x29, 0x00 }, { 0x04, 0x2A, 0x00 }, +{ 0x04, 0x2B, 0x00 }, { 0x24, 0x20, 0x20 }, { 0x24, 0x21, 0x00 }, +{ 0x44, 0x20, 0x20 }, { 0x44, 0x21, 0x00 }, { 0x44, 0x22, 0x00 }, +{ 0x44, 0x23, 0x00 }, { 0x44, 0x24, 0x00 }, { 0x44, 0x25, 0x00 }, +{ 0x44, 0x26, 0x00 }, { 0x44, 0x27, 0x00 }, { 0x44, 0x28, 0x00 }, +{ 0x44, 0x29, 0x00 }, { 0x44, 0x2A, 0x00 }, { 0x44, 0x2B, 0x00 }, +{ 0x44, 0x2C, 0x00 }, { 0x44, 0x2D, 0x00 }, { 0x44, 0x2E, 0x00 }, +{ 0x44, 0x2F, 0x00 }, { 0x44, 0x30, 0x00 }, { 0x44, 0x31, 0x00 }, +{ 0x44, 0x32, 0x00 }, { 0x64, 0x2E, 0x20 }, { 0x64, 0x2F, 0x00 }, +{ 0x64, 0x30, 0x00 }, { 0x64, 0x31, 0x00 }, { 0x64, 0x32, 0x00 }, +{ 0x64, 0x33, 0x00 }, { 0x64, 0x34, 0x00 }, { 0x64, 0x35, 0x00 }, +{ 0x64, 0x36, 0x00 }, { 0x64, 0x37, 0x00 }, { 0x64, 0x38, 0x00 }, +{ 0x65, 0x38, 0x20 }, { 0x66, 0x38, 0x20 }, { 0x67, 0x38, 0x20 }, +{ 0x68, 0x38, 0x20 }, { 0x69, 0x38, 0x20 }, { 0x6A, 0x38, 0x20 }, +{ 0x6B, 0x38, 0x20 }, { 0x6C, 0x38, 0x20 }, { 0x6D, 0x38, 0x20 }, +{ 0x6E, 0x38, 0x20 }, { 0x6F, 0x38, 0x20 } }; -boost::uint8_t gain_table_1300mhz_to_4000mhz[77][5] = { {0,0x00,0x00,0x20,1}, - {1,0x00,0x00,0x00,0}, {2,0x00,0x00,0x00,0}, {3,0x00,0x01,0x00,0}, - {4,0x00,0x02,0x00,0}, {5,0x00,0x03,0x00,0}, {6,0x00,0x04,0x00,0}, - {7,0x00,0x05,0x00,0}, {8,0x01,0x03,0x20,1}, {9,0x01,0x04,0x00,0}, - {10,0x01,0x05,0x00,0}, {11,0x01,0x06,0x00,0}, {12,0x01,0x07,0x00,0}, - {13,0x01,0x08,0x00,0}, {14,0x01,0x09,0x00,0}, {15,0x01,0x0A,0x00,0}, - {16,0x01,0x0B,0x00,0}, {17,0x01,0x0C,0x00,0}, {18,0x01,0x0D,0x00,0}, - {19,0x01,0x0E,0x00,0}, {20,0x02,0x09,0x20,1}, {21,0x02,0x0A,0x00,0}, - {22,0x02,0x0B,0x00,0}, {23,0x02,0x0C,0x00,0}, {24,0x02,0x0D,0x00,0}, - {25,0x02,0x0E,0x00,0}, {26,0x02,0x0F,0x00,0}, {27,0x02,0x10,0x00,0}, - {28,0x02,0x2B,0x20,1}, {29,0x02,0x2C,0x00,0}, {30,0x04,0x28,0x20,1}, - {31,0x04,0x29,0x00,0}, {32,0x04,0x2A,0x00,0}, {33,0x04,0x2B,0x00,0}, - {34,0x24,0x20,0x20,0}, {35,0x24,0x21,0x00,1}, {36,0x44,0x20,0x20,0}, - {37,0x44,0x21,0x00,1}, {38,0x44,0x22,0x00,0}, {39,0x44,0x23,0x00,0}, - {40,0x44,0x24,0x00,0}, {41,0x44,0x25,0x00,0}, {42,0x44,0x26,0x00,0}, - {43,0x44,0x27,0x00,0}, {44,0x44,0x28,0x00,0}, {45,0x44,0x29,0x00,0}, - {46,0x44,0x2A,0x00,0}, {47,0x44,0x2B,0x00,0}, {48,0x44,0x2C,0x00,0}, - {49,0x44,0x2D,0x00,0}, {50,0x44,0x2E,0x00,0}, {51,0x44,0x2F,0x00,0}, - {52,0x44,0x30,0x00,0}, {53,0x44,0x31,0x00,0}, {54,0x44,0x32,0x00,0}, - {55,0x64,0x2E,0x20,1}, {56,0x64,0x2F,0x00,0}, {57,0x64,0x30,0x00,0}, - {58,0x64,0x31,0x00,0}, {59,0x64,0x32,0x00,0}, {60,0x64,0x33,0x00,0}, - {61,0x64,0x34,0x00,0}, {62,0x64,0x35,0x00,0}, {63,0x64,0x36,0x00,0}, - {64,0x64,0x37,0x00,0}, {65,0x64,0x38,0x00,0}, {66,0x65,0x38,0x20,1}, - {67,0x66,0x38,0x20,1}, {68,0x67,0x38,0x20,1}, {69,0x68,0x38,0x20,1}, - {70,0x69,0x38,0x20,1}, {71,0x6A,0x38,0x20,1}, {72,0x6B,0x38,0x20,1}, - {73,0x6C,0x38,0x20,1}, {74,0x6D,0x38,0x20,1}, {75,0x6E,0x38,0x20,1}, - {76,0x6F,0x38,0x20,1}}; +boost::uint8_t gain_table_1300mhz_to_4000mhz[77][3] = { +{ 0x00, 0x00, 0x20 }, { 0x00, 0x00, 0x00 }, { 0x00, 0x00, 0x00 }, +{ 0x00, 0x01, 0x00 }, { 0x00, 0x02, 0x00 }, { 0x00, 0x03, 0x00 }, +{ 0x00, 0x04, 0x00 }, { 0x00, 0x05, 0x00 }, { 0x01, 0x03, 0x20 }, +{ 0x01, 0x04, 0x00 }, { 0x01, 0x05, 0x00 }, { 0x01, 0x06, 0x00 }, +{ 0x01, 0x07, 0x00 }, { 0x01, 0x08, 0x00 }, { 0x01, 0x09, 0x00 }, +{ 0x01, 0x0A, 0x00 }, { 0x01, 0x0B, 0x00 }, { 0x01, 0x0C, 0x00 }, +{ 0x01, 0x0D, 0x00 }, { 0x01, 0x0E, 0x00 }, { 0x02, 0x09, 0x20 }, +{ 0x02, 0x0A, 0x00 }, { 0x02, 0x0B, 0x00 }, { 0x02, 0x0C, 0x00 }, +{ 0x02, 0x0D, 0x00 }, { 0x02, 0x0E, 0x00 }, { 0x02, 0x0F, 0x00 }, +{ 0x02, 0x10, 0x00 }, { 0x02, 0x2B, 0x20 }, { 0x02, 0x2C, 0x00 }, +{ 0x04, 0x27, 0x20 }, { 0x04, 0x28, 0x00 }, { 0x04, 0x29, 0x00 }, +{ 0x04, 0x2A, 0x00 }, { 0x04, 0x2B, 0x00 }, { 0x24, 0x21, 0x20 }, +{ 0x24, 0x22, 0x00 }, { 0x44, 0x20, 0x20 }, { 0x44, 0x21, 0x00 }, +{ 0x44, 0x22, 0x00 }, { 0x44, 0x23, 0x00 }, { 0x44, 0x24, 0x00 }, +{ 0x44, 0x25, 0x00 }, { 0x44, 0x26, 0x00 }, { 0x44, 0x27, 0x00 }, +{ 0x44, 0x28, 0x00 }, { 0x44, 0x29, 0x00 }, { 0x44, 0x2A, 0x00 }, +{ 0x44, 0x2B, 0x00 }, { 0x44, 0x2C, 0x00 }, { 0x44, 0x2D, 0x00 }, +{ 0x44, 0x2E, 0x00 }, { 0x44, 0x2F, 0x00 }, { 0x44, 0x30, 0x00 }, +{ 0x44, 0x31, 0x00 }, { 0x64, 0x2E, 0x20 }, { 0x64, 0x2F, 0x00 }, +{ 0x64, 0x30, 0x00 }, { 0x64, 0x31, 0x00 }, { 0x64, 0x32, 0x00 }, +{ 0x64, 0x33, 0x00 }, { 0x64, 0x34, 0x00 }, { 0x64, 0x35, 0x00 }, +{ 0x64, 0x36, 0x00 }, { 0x64, 0x37, 0x00 }, { 0x64, 0x38, 0x00 }, +{ 0x65, 0x38, 0x20 }, { 0x66, 0x38, 0x20 }, { 0x67, 0x38, 0x20 }, +{ 0x68, 0x38, 0x20 }, { 0x69, 0x38, 0x20 }, { 0x6A, 0x38, 0x20 }, +{ 0x6B, 0x38, 0x20 }, { 0x6C, 0x38, 0x20 }, { 0x6D, 0x38, 0x20 }, +{ 0x6E, 0x38, 0x20 }, { 0x6F, 0x38, 0x20 } }; -boost::uint8_t gain_table_4000mhz_to_6000mhz[77][5] = { {0,0x00,0x00,0x20,1}, - {1,0x00,0x00,0x00,0}, {2,0x00,0x00,0x00,0}, {3,0x00,0x00,0x00,0}, - {4,0x00,0x00,0x00,0}, {5,0x00,0x01,0x00,0}, {6,0x00,0x02,0x00,0}, - {7,0x00,0x03,0x00,0}, {8,0x01,0x01,0x20,1}, {9,0x01,0x02,0x00,0}, - {10,0x01,0x03,0x00,0}, {11,0x01,0x04,0x20,1}, {12,0x01,0x05,0x00,0}, - {13,0x01,0x06,0x00,0}, {14,0x01,0x07,0x00,0}, {15,0x01,0x08,0x00,0}, - {16,0x01,0x09,0x00,0}, {17,0x01,0x0A,0x00,0}, {18,0x01,0x0B,0x00,0}, - {19,0x01,0x0C,0x00,0}, {20,0x02,0x08,0x20,1}, {21,0x02,0x09,0x00,0}, - {22,0x02,0x0A,0x00,0}, {23,0x02,0x0B,0x20,1}, {24,0x02,0x0C,0x00,0}, - {25,0x02,0x0D,0x00,0}, {26,0x02,0x0E,0x00,0}, {27,0x02,0x0F,0x00,0}, - {28,0x02,0x2A,0x20,1}, {29,0x02,0x2B,0x00,0}, {30,0x04,0x27,0x20,1}, - {31,0x04,0x28,0x00,0}, {32,0x04,0x29,0x00,0}, {33,0x04,0x2A,0x00,0}, - {34,0x04,0x2B,0x00,0}, {35,0x04,0x2C,0x00,0}, {36,0x04,0x2D,0x00,0}, - {37,0x24,0x20,0x20,1}, {38,0x24,0x21,0x00,0}, {39,0x24,0x22,0x00,0}, - {40,0x44,0x20,0x20,1}, {41,0x44,0x21,0x00,0}, {42,0x44,0x22,0x00,0}, - {43,0x44,0x23,0x00,0}, {44,0x44,0x24,0x00,0}, {45,0x44,0x25,0x00,0}, - {46,0x44,0x26,0x00,0}, {47,0x44,0x27,0x00,0}, {48,0x44,0x28,0x00,0}, - {49,0x44,0x29,0x00,0}, {50,0x44,0x2A,0x00,0}, {51,0x44,0x2B,0x00,0}, - {52,0x44,0x2C,0x00,0}, {53,0x44,0x2D,0x00,0}, {54,0x44,0x2E,0x00,0}, - {55,0x64,0x2E,0x20,1}, {56,0x64,0x2F,0x00,0}, {57,0x64,0x30,0x00,0}, - {58,0x64,0x31,0x00,0}, {59,0x64,0x32,0x00,0}, {60,0x64,0x33,0x00,0}, - {61,0x64,0x34,0x00,0}, {62,0x64,0x35,0x00,0}, {63,0x64,0x36,0x00,0}, - {64,0x64,0x37,0x00,0}, {65,0x64,0x38,0x00,0}, {66,0x65,0x38,0x20,1}, - {67,0x66,0x38,0x20,1}, {68,0x67,0x38,0x20,1}, {69,0x68,0x38,0x20,1}, - {70,0x69,0x38,0x20,1}, {71,0x6A,0x38,0x20,1}, {72,0x6B,0x38,0x20,1}, - {73,0x6C,0x38,0x20,1}, {74,0x6D,0x38,0x20,1}, {75,0x6E,0x38,0x20,1}, - {76,0x6F,0x38,0x20,1}}; +boost::uint8_t gain_table_4000mhz_to_6000mhz[77][3] = { +{ 0x00, 0x00, 0x20 }, { 0x00, 0x00, 0x00 }, { 0x00, 0x00, 0x00 }, +{ 0x00, 0x00, 0x00 }, { 0x00, 0x00, 0x00 }, { 0x00, 0x01, 0x00 }, +{ 0x00, 0x02, 0x00 }, { 0x00, 0x03, 0x00 }, { 0x01, 0x01, 0x20 }, +{ 0x01, 0x02, 0x00 }, { 0x01, 0x03, 0x00 }, { 0x01, 0x04, 0x20 }, +{ 0x01, 0x05, 0x00 }, { 0x01, 0x06, 0x00 }, { 0x01, 0x07, 0x00 }, +{ 0x01, 0x08, 0x00 }, { 0x01, 0x09, 0x00 }, { 0x01, 0x0A, 0x00 }, +{ 0x01, 0x0B, 0x00 }, { 0x01, 0x0C, 0x00 }, { 0x02, 0x08, 0x20 }, +{ 0x02, 0x09, 0x00 }, { 0x02, 0x0A, 0x00 }, { 0x02, 0x0B, 0x20 }, +{ 0x02, 0x0C, 0x00 }, { 0x02, 0x0D, 0x00 }, { 0x02, 0x0E, 0x00 }, +{ 0x02, 0x0F, 0x00 }, { 0x02, 0x2A, 0x20 }, { 0x02, 0x2B, 0x00 }, +{ 0x04, 0x27, 0x20 }, { 0x04, 0x28, 0x00 }, { 0x04, 0x29, 0x00 }, +{ 0x04, 0x2A, 0x00 }, { 0x04, 0x2B, 0x00 }, { 0x04, 0x2C, 0x00 }, +{ 0x04, 0x2D, 0x00 }, { 0x24, 0x20, 0x20 }, { 0x24, 0x21, 0x00 }, +{ 0x24, 0x22, 0x00 }, { 0x44, 0x20, 0x20 }, { 0x44, 0x21, 0x00 }, +{ 0x44, 0x22, 0x00 }, { 0x44, 0x23, 0x00 }, { 0x44, 0x24, 0x00 }, +{ 0x44, 0x25, 0x00 }, { 0x44, 0x26, 0x00 }, { 0x44, 0x27, 0x00 }, +{ 0x44, 0x28, 0x00 }, { 0x44, 0x29, 0x00 }, { 0x44, 0x2A, 0x00 }, +{ 0x44, 0x2B, 0x00 }, { 0x44, 0x2C, 0x00 }, { 0x44, 0x2D, 0x00 }, +{ 0x44, 0x2E, 0x00 }, { 0x64, 0x2E, 0x20 }, { 0x64, 0x2F, 0x00 }, +{ 0x64, 0x30, 0x00 }, { 0x64, 0x31, 0x00 }, { 0x64, 0x32, 0x00 }, +{ 0x64, 0x33, 0x00 }, { 0x64, 0x34, 0x00 }, { 0x64, 0x35, 0x00 }, +{ 0x64, 0x36, 0x00 }, { 0x64, 0x37, 0x00 }, { 0x64, 0x38, 0x00 }, +{ 0x65, 0x38, 0x20 }, { 0x66, 0x38, 0x20 }, { 0x67, 0x38, 0x20 }, +{ 0x68, 0x38, 0x20 }, { 0x69, 0x38, 0x20 }, { 0x6A, 0x38, 0x20 }, +{ 0x6B, 0x38, 0x20 }, { 0x6C, 0x38, 0x20 }, { 0x6D, 0x38, 0x20 }, +{ 0x6E, 0x38, 0x20 }, { 0x6F, 0x38, 0x20 } }; #endif /* INCLUDED_AD9361_GAIN_TABLES_HPP */ -- cgit v1.2.3 From be14725245cca756e19c48d84aedc54064e8706c Mon Sep 17 00:00:00 2001 From: Julian Arnold Date: Thu, 5 Mar 2015 15:25:13 -0800 Subject: b2xx: AGC support --- host/lib/usrp/b200/b200_impl.cpp | 10 ++ host/lib/usrp/common/ad9361_ctrl.cpp | 21 +++ host/lib/usrp/common/ad9361_ctrl.hpp | 6 + .../usrp/common/ad9361_driver/ad9361_device.cpp | 170 ++++++++++++++++++--- host/lib/usrp/common/ad9361_driver/ad9361_device.h | 12 +- 5 files changed, 195 insertions(+), 24 deletions(-) (limited to 'host/lib/usrp/common/ad9361_driver') diff --git a/host/lib/usrp/b200/b200_impl.cpp b/host/lib/usrp/b200/b200_impl.cpp index ada25ad59..663696926 100644 --- a/host/lib/usrp/b200/b200_impl.cpp +++ b/host/lib/usrp/b200/b200_impl.cpp @@ -734,6 +734,16 @@ void b200_impl::setup_radio(const size_t dspno) .set("RX2"); _tree->create(rf_fe_path / "sensors" / "rssi") .publish(boost::bind(&ad9361_ctrl::get_rssi, _codec_ctrl, key)); + + //AGC setup + const std::list mode_strings = boost::assign::list_of("slow")("fast"); + _tree->create(rf_fe_path / "gain" / "agc" / "enable") + .subscribe(boost::bind((&ad9361_ctrl::set_agc), _codec_ctrl, key, _1)) + .set(false); + _tree->create(rf_fe_path / "gain" / "agc" / "mode" / "value") + .subscribe(boost::bind((&ad9361_ctrl::set_agc_mode), _codec_ctrl, key, _1)).set(mode_strings.front()); + _tree->create >(rf_fe_path / "gain" / "agc" / "mode" / "options") + .set(mode_strings); } if (key[0] == 'T') { diff --git a/host/lib/usrp/common/ad9361_ctrl.cpp b/host/lib/usrp/common/ad9361_ctrl.cpp index ada74cda5..a0a5fa663 100644 --- a/host/lib/usrp/common/ad9361_ctrl.cpp +++ b/host/lib/usrp/common/ad9361_ctrl.cpp @@ -107,6 +107,27 @@ public: return _device.set_gain(direction, chain, value); } + void set_agc(const std::string &which, bool enable) + { + boost::lock_guard lock(_mutex); + + ad9361_device_t::chain_t chain =_get_chain_from_antenna(which); + _device.set_agc(chain, enable); + } + + void set_agc_mode(const std::string &which, const std::string &mode) + { + boost::lock_guard lock(_mutex); + ad9361_device_t::chain_t chain =_get_chain_from_antenna(which); + if(mode == "slow") { + _device.set_agc_mode(chain, ad9361_device_t::GAIN_MODE_SLOW_AGC); + } else if (mode == "fast"){ + _device.set_agc_mode(chain, ad9361_device_t::GAIN_MODE_FAST_AGC); + } else { + throw uhd::runtime_error("ad9361_ctrl got an invalid AGC option."); + } + } + //! set a new clock rate, return the exact value double set_clock_rate(const double rate) { diff --git a/host/lib/usrp/common/ad9361_ctrl.hpp b/host/lib/usrp/common/ad9361_ctrl.hpp index 5396de225..0dd1b08d9 100644 --- a/host/lib/usrp/common/ad9361_ctrl.hpp +++ b/host/lib/usrp/common/ad9361_ctrl.hpp @@ -88,6 +88,12 @@ public: //! set the gain for a particular gain element virtual double set_gain(const std::string &which, const double value) = 0; + //! Enable or disable the AGC module + virtual void set_agc(const std::string &which, bool enable) = 0; + + //! configure the AGC module to slow or fast mode + virtual void set_agc_mode(const std::string &which, const std::string &mode) = 0; + //! set a new clock rate, return the exact value virtual double set_clock_rate(const double rate) = 0; diff --git a/host/lib/usrp/common/ad9361_driver/ad9361_device.cpp b/host/lib/usrp/common/ad9361_driver/ad9361_device.cpp index e5938184c..ba66769dd 100644 --- a/host/lib/usrp/common/ad9361_driver/ad9361_device.cpp +++ b/host/lib/usrp/common/ad9361_driver/ad9361_device.cpp @@ -945,28 +945,58 @@ void ad9361_device_t::_program_gain_table() { /* Setup gain control registers. * - * This really only needs to be done once, at initialization. */ -void ad9361_device_t::_setup_gain_control() + * This really only needs to be done once, at initialization. + * If AGC is used the mode select bits (Reg 0x0FA) must be written manually */ +void ad9361_device_t::_setup_gain_control(bool agc) { - _io_iface->poke8(0x0FA, 0xE0); // Gain Control Mode Select - _io_iface->poke8(0x0FB, 0x08); // Table, Digital Gain, Man Gain Ctrl - _io_iface->poke8(0x0FC, 0x23); // Incr Step Size, ADC Overrange Size - _io_iface->poke8(0x0FD, 0x4C); // Max Full/LMT Gain Table Index - _io_iface->poke8(0x0FE, 0x44); // Decr Step Size, Peak Overload Time - _io_iface->poke8(0x100, 0x6F); // Max Digital Gain - _io_iface->poke8(0x104, 0x2F); // ADC Small Overload Threshold - _io_iface->poke8(0x105, 0x3A); // ADC Large Overload Threshold - _io_iface->poke8(0x107, 0x31); // Large LMT Overload Threshold - _io_iface->poke8(0x108, 0x39); // Small LMT Overload Threshold - _io_iface->poke8(0x109, 0x23); // Rx1 Full/LMT Gain Index - _io_iface->poke8(0x10A, 0x58); // Rx1 LPF Gain Index - _io_iface->poke8(0x10B, 0x00); // Rx1 Digital Gain Index - _io_iface->poke8(0x10C, 0x23); // Rx2 Full/LMT Gain Index - _io_iface->poke8(0x10D, 0x18); // Rx2 LPF Gain Index - _io_iface->poke8(0x10E, 0x00); // Rx2 Digital Gain Index - _io_iface->poke8(0x114, 0x30); // Low Power Threshold - _io_iface->poke8(0x11A, 0x27); // Initial LMT Gain Limit - _io_iface->poke8(0x081, 0x00); // Tx Symbol Gain Control + /* The AGC mode configuration should be good for all cases. + * However, non AGC configuration still used for backward compatibility. */ + if (agc) { + /*mode select bits must be written before hand!*/ + _io_iface->poke8(0x0FB, 0x08); // Table, Digital Gain, Man Gain Ctrl + _io_iface->poke8(0x0FC, 0x23); // Incr Step Size, ADC Overrange Size + _io_iface->poke8(0x0FD, 0x4C); // Max Full/LMT Gain Table Index + _io_iface->poke8(0x0FE, 0x44); // Decr Step Size, Peak Overload Time + _io_iface->poke8(0x100, 0x6F); // Max Digital Gain + _io_iface->poke8(0x101, 0x0A); // Max Digital Gain + _io_iface->poke8(0x103, 0x08); // Max Digital Gain + _io_iface->poke8(0x104, 0x2F); // ADC Small Overload Threshold + _io_iface->poke8(0x105, 0x3A); // ADC Large Overload Threshold + _io_iface->poke8(0x106, 0x22); // Max Digital Gain + _io_iface->poke8(0x107, 0x2B); // Large LMT Overload Threshold + _io_iface->poke8(0x108, 0x31); + _io_iface->poke8(0x111, 0x0A); + _io_iface->poke8(0x11A, 0x1C); + _io_iface->poke8(0x120, 0x0C); + _io_iface->poke8(0x121, 0x44); + _io_iface->poke8(0x122, 0x44); + _io_iface->poke8(0x123, 0x11); + _io_iface->poke8(0x124, 0xF5); + _io_iface->poke8(0x125, 0x3B); + _io_iface->poke8(0x128, 0x03); + _io_iface->poke8(0x129, 0x56); + _io_iface->poke8(0x12A, 0x22); + } else { + _io_iface->poke8(0x0FA, 0xE0); // Gain Control Mode Select + _io_iface->poke8(0x0FB, 0x08); // Table, Digital Gain, Man Gain Ctrl + _io_iface->poke8(0x0FC, 0x23); // Incr Step Size, ADC Overrange Size + _io_iface->poke8(0x0FD, 0x4C); // Max Full/LMT Gain Table Index + _io_iface->poke8(0x0FE, 0x44); // Decr Step Size, Peak Overload Time + _io_iface->poke8(0x100, 0x6F); // Max Digital Gain + _io_iface->poke8(0x104, 0x2F); // ADC Small Overload Threshold + _io_iface->poke8(0x105, 0x3A); // ADC Large Overload Threshold + _io_iface->poke8(0x107, 0x31); // Large LMT Overload Threshold + _io_iface->poke8(0x108, 0x39); // Small LMT Overload Threshold + _io_iface->poke8(0x109, 0x23); // Rx1 Full/LMT Gain Index + _io_iface->poke8(0x10A, 0x58); // Rx1 LPF Gain Index + _io_iface->poke8(0x10B, 0x00); // Rx1 Digital Gain Index + _io_iface->poke8(0x10C, 0x23); // Rx2 Full/LMT Gain Index + _io_iface->poke8(0x10D, 0x18); // Rx2 LPF Gain Index + _io_iface->poke8(0x10E, 0x00); // Rx2 Digital Gain Index + _io_iface->poke8(0x114, 0x30); // Low Power Threshold + _io_iface->poke8(0x11A, 0x27); // Initial LMT Gain Limit + _io_iface->poke8(0x081, 0x00); // Tx Symbol Gain Control + } } /* Setup the RX or TX synthesizers. @@ -1421,6 +1451,10 @@ void ad9361_device_t::initialize() _tx2_gain = 0; _use_dc_offset_correction = true; _use_iq_balance_correction = true; + _rx1_agc_mode = GAIN_MODE_SLOW_AGC; + _rx2_agc_mode = GAIN_MODE_SLOW_AGC; + _rx1_agc_enable = false; + _rx2_agc_enable = false; /* Reset the device. */ _io_iface->poke8(0x000, 0x01); @@ -1564,7 +1598,7 @@ void ad9361_device_t::initialize() _program_mixer_gm_subtable(); _program_gain_table(); - _setup_gain_control(); + _setup_gain_control(false); _calibrate_baseband_rx_analog_filter(); _calibrate_baseband_tx_analog_filter(); @@ -1690,7 +1724,7 @@ double ad9361_device_t::set_clock_rate(const double req_rate) _program_mixer_gm_subtable(); _program_gain_table(); - _setup_gain_control(); + _setup_gain_control(false); _reprogram_gains(); _calibrate_baseband_rx_analog_filter(); @@ -2067,4 +2101,94 @@ void ad9361_device_t::set_iq_balance_auto(direction_t direction, const bool on) } } +/* Sets the RX gain mode to be used. + * If a transition from an AGC to an non AGC mode occurs (or vice versa) + * the gain configuration will be reloaded. */ +void ad9361_device_t::_setup_agc(chain_t chain, gain_mode_t gain_mode) +{ + boost::uint8_t gain_mode_reg = 0; + boost::uint8_t gain_mode_prev = 0; + boost::uint8_t gain_mode_bits_pos = 0; + + gain_mode_reg = _io_iface->peek8(0x0FA); + gain_mode_prev = (gain_mode_reg & 0x0F); + + if (chain == CHAIN_1) { + gain_mode_bits_pos = 0; + } else if (chain == CHAIN_2) { + gain_mode_bits_pos = 2; + } else + { + throw uhd::runtime_error("[ad9361_device_t] Wrong value for chain"); + } + + gain_mode_reg = (gain_mode_reg & (~(0x03<poke8(0x0FA, gain_mode_reg); + boost::uint8_t gain_mode_status = _io_iface->peek8(0x0FA); + gain_mode_status = (gain_mode_status & 0x0F); + /*Check if gain mode configuration needs to be reprogrammed*/ + if (((gain_mode_prev == 0) && (gain_mode_status != 0)) || ((gain_mode_prev != 0) && (gain_mode_status == 0))) { + if (gain_mode_status == 0) { + /*load manual mode config*/ + _setup_gain_control(false); + } else { + /*load agc mode config*/ + _setup_gain_control(true); + } + } +} + +void ad9361_device_t::set_agc(chain_t chain, bool enable) +{ + if(chain == CHAIN_1) { + _rx1_agc_enable = enable; + if(enable) { + _setup_agc(chain, _rx1_agc_mode); + } else { + _setup_agc(chain, GAIN_MODE_MANUAL); + } + } else if (chain == CHAIN_2){ + _rx2_agc_enable = enable; + if(enable) { + _setup_agc(chain, _rx2_agc_mode); + } else { + _setup_agc(chain, GAIN_MODE_MANUAL); + } + } else + { + throw uhd::runtime_error("[ad9361_device_t] Wrong value for chain"); + } +} + +void ad9361_device_t::set_agc_mode(chain_t chain, gain_mode_t gain_mode) +{ + if(chain == CHAIN_1) { + _rx1_agc_mode = gain_mode; + if(_rx1_agc_enable) { + _setup_agc(chain, _rx1_agc_mode); + } + } else if(chain == CHAIN_2){ + _rx2_agc_mode = gain_mode; + if(_rx2_agc_enable) { + _setup_agc(chain, _rx2_agc_mode); + } + } else + { + throw uhd::runtime_error("[ad9361_device_t] Wrong value for chain"); + } +} + }} diff --git a/host/lib/usrp/common/ad9361_driver/ad9361_device.h b/host/lib/usrp/common/ad9361_driver/ad9361_device.h index 93dc413d5..1cfff9971 100644 --- a/host/lib/usrp/common/ad9361_driver/ad9361_device.h +++ b/host/lib/usrp/common/ad9361_driver/ad9361_device.h @@ -16,6 +16,7 @@ class ad9361_device_t : public boost::noncopyable public: enum direction_t { RX, TX }; enum chain_t { CHAIN_1, CHAIN_2 }; + enum gain_mode_t {GAIN_MODE_MANUAL, GAIN_MODE_SLOW_AGC, GAIN_MODE_FAST_AGC}; ad9361_device_t(ad9361_params::sptr client, ad9361_io::sptr io_iface) : _client_params(client), _io_iface(io_iface) {} @@ -78,6 +79,12 @@ public: /* Turn on/off AD9361's RX IQ imbalance correction */ void set_iq_balance_auto(direction_t direction, const bool on); + /* Configure AD9361's AGC module to use either fast or slow AGC mode. */ + void set_agc_mode(chain_t chain, gain_mode_t gain_mode); + + /* Enable AD9361's AGC gain mode. */ + void set_agc(chain_t chain, bool enable); + //Constants static const double AD9361_MAX_GAIN; static const double AD9361_MAX_CLOCK_RATE; @@ -101,7 +108,7 @@ private: //Methods void _calibrate_tx_quadrature(); void _program_mixer_gm_subtable(); void _program_gain_table(); - void _setup_gain_control(); + void _setup_gain_control(bool use_agc); void _setup_synth(direction_t direction, double vcorate); double _tune_bbvco(const double rate); void _reprogram_gains(); @@ -109,6 +116,7 @@ private: //Methods double _setup_rates(const double rate); double _get_temperature(const double cal_offset, const double timeout = 0.1); void _configure_bb_rf_dc_tracking(const bool on); + void _setup_agc(chain_t chain, gain_mode_t gain_mode); private: //Members typedef struct { @@ -133,6 +141,8 @@ private: //Members double _rx1_gain, _rx2_gain, _tx1_gain, _tx2_gain; boost::int32_t _tfir_factor; boost::int32_t _rfir_factor; + gain_mode_t _rx1_agc_mode, _rx2_agc_mode; + bool _rx1_agc_enable, _rx2_agc_enable; //Register soft-copies chip_regs_t _regs; //Synchronization -- cgit v1.2.3 From a7049e4ff79cdc205db76bf7270219f254073961 Mon Sep 17 00:00:00 2001 From: Michael Dickens Date: Sat, 7 Mar 2015 11:12:58 -0500 Subject: uhd: Fixed multiple compiler warnings - Use ULL and LL etc. so compiler doesn't need to decide constant's types - define the empty 'while' loop to include {} to make older compilers happy - Use explicit type names for BOOST_CHECK_EQUAL --- host/examples/test_clock_synch.cpp | 8 +- host/lib/transport/super_recv_packet_handler.hpp | 2 +- .../usrp/common/ad9361_driver/ad9361_synth_lut.h | 28 ++--- host/tests/chdr_test.cpp | 10 +- host/tests/fp_compare_delta_test.cpp | 6 +- host/tests/sid_t_test.cpp | 122 ++++++++++----------- host/tests/sph_recv_test.cpp | 4 +- host/tests/sph_send_test.cpp | 2 +- host/tests/time_spec_test.cpp | 4 +- 9 files changed, 93 insertions(+), 93 deletions(-) (limited to 'host/lib/usrp/common/ad9361_driver') diff --git a/host/examples/test_clock_synch.cpp b/host/examples/test_clock_synch.cpp index 7a4226345..50a1444f8 100644 --- a/host/examples/test_clock_synch.cpp +++ b/host/examples/test_clock_synch.cpp @@ -35,14 +35,14 @@ using namespace uhd::usrp_clock; using namespace uhd::usrp; void wait_for_pps(multi_usrp::sptr usrp, size_t chan, double timeout){ - boost::uint32_t last_pps_time = usrp->get_time_last_pps(chan).get_full_secs(); - boost::uint32_t system_time = uhd::time_spec_t::get_system_time().get_full_secs(); - boost::uint32_t exit_time = system_time + timeout; + time_t last_pps_time = usrp->get_time_last_pps(chan).get_full_secs(); + time_t system_time = uhd::time_spec_t::get_system_time().get_full_secs(); + time_t exit_time = system_time + timeout; bool detected_pps = false; //Otherwise, this would hang if the USRP doesn't detect any PPS while(uhd::time_spec_t::get_system_time().get_full_secs() < exit_time){ - boost::uint32_t time_now = usrp->get_time_last_pps(chan).get_full_secs(); + time_t time_now = usrp->get_time_last_pps(chan).get_full_secs(); if(last_pps_time < time_now){ detected_pps = true; break; diff --git a/host/lib/transport/super_recv_packet_handler.hpp b/host/lib/transport/super_recv_packet_handler.hpp index 5c84327a4..c3c2b8e97 100644 --- a/host/lib/transport/super_recv_packet_handler.hpp +++ b/host/lib/transport/super_recv_packet_handler.hpp @@ -147,7 +147,7 @@ public: */ void set_xport_chan_get_buff(const size_t xport_chan, const get_buff_type &get_buff, const bool flush = false){ if (flush){ - while (get_buff(0.0)); + while (get_buff(0.0)) {}; } _props.at(xport_chan).get_buff = get_buff; } diff --git a/host/lib/usrp/common/ad9361_driver/ad9361_synth_lut.h b/host/lib/usrp/common/ad9361_driver/ad9361_synth_lut.h index cb320e1f4..0475a5eb1 100644 --- a/host/lib/usrp/common/ad9361_driver/ad9361_synth_lut.h +++ b/host/lib/usrp/common/ad9361_driver/ad9361_synth_lut.h @@ -6,20 +6,20 @@ #define INCLUDED_AD9361_SYNTH_LUT_HPP -double vco_index[53] = {12605000000, 12245000000, 11906000000, 11588000000, - 11288000000, 11007000000, 10742000000, 10492000000, - 10258000000, 10036000000, 9827800000, 9631100000, - 9445300000, 9269800000, 9103600000, 8946300000, - 8797000000, 8655300000, 8520600000, 8392300000, - 8269900000, 8153100000, 8041400000, 7934400000, - 7831800000, 7733200000, 7638400000, 7547100000, - 7459000000, 7374000000, 7291900000, 7212400000, - 7135500000, 7061000000, 6988700000, 6918600000, - 6850600000, 6784600000, 6720500000, 6658200000, - 6597800000, 6539200000, 6482300000, 6427000000, - 6373400000, 6321400000, 6270900000, 6222000000, - 6174500000, 6128400000, 6083600000, 6040100000, - 5997700000}; +double vco_index[53] = {12605000000.0, 12245000000.0, 11906000000.0, 11588000000.0, + 11288000000.0, 11007000000.0, 10742000000.0, 10492000000.0, + 10258000000.0, 10036000000.0, 9827800000.0, 9631100000.0, + 9445300000.0, 9269800000.0, 9103600000.0, 8946300000.0, + 8797000000.0, 8655300000.0, 8520600000.0, 8392300000.0, + 8269900000.0, 8153100000.0, 8041400000.0, 7934400000.0, + 7831800000.0, 7733200000.0, 7638400000.0, 7547100000.0, + 7459000000.0, 7374000000.0, 7291900000.0, 7212400000.0, + 7135500000.0, 7061000000.0, 6988700000.0, 6918600000.0, + 6850600000.0, 6784600000.0, 6720500000.0, 6658200000.0, + 6597800000.0, 6539200000.0, 6482300000.0, 6427000000.0, + 6373400000.0, 6321400000.0, 6270900000.0, 6222000000.0, + 6174500000.0, 6128400000.0, 6083600000.0, 6040100000.0, + 5997700000.0}; int synth_cal_lut[53][12] = { {10, 0, 4, 0, 15, 8, 8, 13, 4, 13, 15, 9}, {10, 0, 4, 0, 15, 8, 9, 13, 4, 13, 15, 9}, diff --git a/host/tests/chdr_test.cpp b/host/tests/chdr_test.cpp index 8893e12e5..ed6c690f9 100644 --- a/host/tests/chdr_test.cpp +++ b/host/tests/chdr_test.cpp @@ -81,7 +81,7 @@ BOOST_AUTO_TEST_CASE(test_with_chdr){ if_packet_info.eob = false; if_packet_info.packet_count = 7; if_packet_info.has_tsf = true; - if_packet_info.tsf = 0x1234567890ABCDEF; + if_packet_info.tsf = 0x1234567890ABCDEFull; if_packet_info.sid = 0xAABBCCDD; if_packet_info.num_payload_words32 = 24; if_packet_info.num_payload_bytes = 95; @@ -94,7 +94,7 @@ BOOST_AUTO_TEST_CASE(test_with_chdr_fc){ if_packet_info.eob = false; if_packet_info.packet_count = 19; if_packet_info.has_tsf = false; - if_packet_info.tsf = 0x1234567890ABCDEF; + if_packet_info.tsf = 0x1234567890ABCDEFull; if_packet_info.sid = 0xAABBCCDD; if_packet_info.num_payload_words32 = 4; if_packet_info.num_payload_bytes = 16; @@ -106,7 +106,7 @@ BOOST_AUTO_TEST_CASE(test_with_chdr_cmd){ if_packet_info.packet_type = if_packet_info_t::PACKET_TYPE_CMD; if_packet_info.packet_count = 19; if_packet_info.has_tsf = true; - if_packet_info.tsf = 0x1234567890ABCDEF; + if_packet_info.tsf = 0x1234567890ABCDEFull; if_packet_info.sid = 0xAABBCCDD; if_packet_info.num_payload_words32 = 4; if_packet_info.num_payload_bytes = 16; @@ -118,7 +118,7 @@ BOOST_AUTO_TEST_CASE(test_with_chdr_resp){ if_packet_info.packet_type = if_packet_info_t::PACKET_TYPE_RESP; if_packet_info.packet_count = 123; if_packet_info.has_tsf = false; - if_packet_info.tsf = 0x1234567890ABCDEF; + if_packet_info.tsf = 0x1234567890ABCDEFull; if_packet_info.sid = 0xAABBCCDD; if_packet_info.num_payload_words32 = 4; if_packet_info.num_payload_bytes = 16; @@ -132,7 +132,7 @@ BOOST_AUTO_TEST_CASE(test_with_chdr_err){ if_packet_info.eob = false; if_packet_info.error = false; // Needs to be set explicitly if_packet_info.has_tsf = false; - if_packet_info.tsf = 0x1234567890ABCDEF; + if_packet_info.tsf = 0x1234567890ABCDEFull; if_packet_info.sid = 0xAABBCCDD; if_packet_info.num_payload_words32 = 4; if_packet_info.num_payload_bytes = 16; diff --git a/host/tests/fp_compare_delta_test.cpp b/host/tests/fp_compare_delta_test.cpp index 9b009a79d..a38c3d2b0 100644 --- a/host/tests/fp_compare_delta_test.cpp +++ b/host/tests/fp_compare_delta_test.cpp @@ -239,12 +239,12 @@ BOOST_AUTO_TEST_CASE(double_greaterthanequals_operators) { BOOST_AUTO_TEST_CASE(frequency_compare_function) { - BOOST_CHECK(uhd::math::frequencies_are_equal(6817333232, 6817333232)); - BOOST_CHECK(!uhd::math::frequencies_are_equal(6817333233, 6817333232)); + BOOST_CHECK(uhd::math::frequencies_are_equal(6817333232.0, 6817333232.0)); + BOOST_CHECK(!uhd::math::frequencies_are_equal(6817333233.0, 6817333232.0)); BOOST_CHECK(uhd::math::frequencies_are_equal(6817333232.1, 6817333232.1)); BOOST_CHECK(!uhd::math::frequencies_are_equal(6817333232.5, 6817333232.6)); BOOST_CHECK(uhd::math::frequencies_are_equal(16.8173332321e9, 16.8173332321e9)); BOOST_CHECK(!uhd::math::frequencies_are_equal(16.8173332322e9, 16.8173332321e9)); BOOST_CHECK(!uhd::math::frequencies_are_equal(5.0, 4.0)); - BOOST_CHECK(uhd::math::frequencies_are_equal(48750000, 48749999.9946)); + BOOST_CHECK(uhd::math::frequencies_are_equal(48750000.0, 48749999.9946)); } diff --git a/host/tests/sid_t_test.cpp b/host/tests/sid_t_test.cpp index 71ab2c213..b5cdeb3d8 100644 --- a/host/tests/sid_t_test.cpp +++ b/host/tests/sid_t_test.cpp @@ -30,12 +30,12 @@ BOOST_AUTO_TEST_CASE(test_sid_t) { BOOST_CHECK_EQUAL(sid.is_set(), true); BOOST_CHECK_EQUAL(sid.to_pp_string(), "1.2>3.16"); BOOST_CHECK_EQUAL(sid.to_pp_string_hex(), "01:02>03:10"); - BOOST_CHECK_EQUAL(sid.get_src(), 0x0102); - BOOST_CHECK_EQUAL(sid.get_dst(), 0x0310); - BOOST_CHECK_EQUAL(sid.get_src_addr(), 0x01); - BOOST_CHECK_EQUAL(sid.get_src_endpoint(), 0x02); - BOOST_CHECK_EQUAL(sid.get_dst_addr(), 0x03); - BOOST_CHECK_EQUAL(sid.get_dst_endpoint(), 0x10); + BOOST_CHECK_EQUAL(sid.get_src(), (uint32_t)0x0102); + BOOST_CHECK_EQUAL(sid.get_dst(), (uint32_t)0x0310); + BOOST_CHECK_EQUAL(sid.get_src_addr(), (uint32_t)0x01); + BOOST_CHECK_EQUAL(sid.get_src_endpoint(), (uint32_t)0x02); + BOOST_CHECK_EQUAL(sid.get_dst_addr(), (uint32_t)0x03); + BOOST_CHECK_EQUAL(sid.get_dst_endpoint(), (uint32_t)0x10); BOOST_CHECK_EQUAL(sid == sid, true); BOOST_CHECK_EQUAL(sid == sid_value, true); @@ -68,88 +68,88 @@ BOOST_AUTO_TEST_CASE(test_sid_t_set) { sid_t sid(sid_value); sid.set(0x01020304); - BOOST_CHECK_EQUAL(sid.get(), 0x01020304); - BOOST_CHECK_EQUAL(sid.get_src_addr(), 0x01); - BOOST_CHECK_EQUAL(sid.get_src_endpoint(), 0x02); - BOOST_CHECK_EQUAL(sid.get_dst_addr(), 0x03); - BOOST_CHECK_EQUAL(sid.get_dst_endpoint(), 0x04); - BOOST_CHECK_EQUAL(sid.get_dst_xbarport(), 0x0); - BOOST_CHECK_EQUAL(sid.get_dst_blockport(), 0x4); + BOOST_CHECK_EQUAL(sid.get(), (uint32_t)0x01020304); + BOOST_CHECK_EQUAL(sid.get_src_addr(),(uint32_t)0x01); + BOOST_CHECK_EQUAL(sid.get_src_endpoint(), (uint32_t)0x02); + BOOST_CHECK_EQUAL(sid.get_dst_addr(), (uint32_t)0x03); + BOOST_CHECK_EQUAL(sid.get_dst_endpoint(), (uint32_t)0x04); + BOOST_CHECK_EQUAL(sid.get_dst_xbarport(), (uint32_t)0x0); + BOOST_CHECK_EQUAL(sid.get_dst_blockport(), (uint32_t)0x4); sid.set_src_addr(0x0a); - BOOST_CHECK_EQUAL(sid.get(), 0x0a020304); - BOOST_CHECK_EQUAL(sid.get_src_addr(), 0x0a); - BOOST_CHECK_EQUAL(sid.get_src_endpoint(), 0x02); - BOOST_CHECK_EQUAL(sid.get_dst_addr(), 0x03); - BOOST_CHECK_EQUAL(sid.get_dst_endpoint(), 0x04); + BOOST_CHECK_EQUAL(sid.get(), (uint32_t)0x0a020304); + BOOST_CHECK_EQUAL(sid.get_src_addr(), (uint32_t)0x0a); + BOOST_CHECK_EQUAL(sid.get_src_endpoint(), (uint32_t)0x02); + BOOST_CHECK_EQUAL(sid.get_dst_addr(), (uint32_t)0x03); + BOOST_CHECK_EQUAL(sid.get_dst_endpoint(), (uint32_t)0x04); sid.set_src_endpoint(0x0b); - BOOST_CHECK_EQUAL(sid.get(), 0x0a0b0304); - BOOST_CHECK_EQUAL(sid.get_src_addr(), 0x0a); - BOOST_CHECK_EQUAL(sid.get_src_endpoint(), 0x0b); - BOOST_CHECK_EQUAL(sid.get_dst_addr(), 0x03); - BOOST_CHECK_EQUAL(sid.get_dst_endpoint(), 0x04); + BOOST_CHECK_EQUAL(sid.get(), (uint32_t)0x0a0b0304); + BOOST_CHECK_EQUAL(sid.get_src_addr(), (uint32_t)0x0a); + BOOST_CHECK_EQUAL(sid.get_src_endpoint(), (uint32_t)0x0b); + BOOST_CHECK_EQUAL(sid.get_dst_addr(), (uint32_t)0x03); + BOOST_CHECK_EQUAL(sid.get_dst_endpoint(), (uint32_t)0x04); sid.set_dst_addr(0x0c); - BOOST_CHECK_EQUAL(sid.get(), 0x0a0b0c04); - BOOST_CHECK_EQUAL(sid.get_src_addr(), 0x0a); - BOOST_CHECK_EQUAL(sid.get_src_endpoint(), 0x0b); - BOOST_CHECK_EQUAL(sid.get_dst_addr(), 0x0c); - BOOST_CHECK_EQUAL(sid.get_dst_endpoint(), 0x04); + BOOST_CHECK_EQUAL(sid.get(), (uint32_t)0x0a0b0c04); + BOOST_CHECK_EQUAL(sid.get_src_addr(), (uint32_t)0x0a); + BOOST_CHECK_EQUAL(sid.get_src_endpoint(), (uint32_t)0x0b); + BOOST_CHECK_EQUAL(sid.get_dst_addr(), (uint32_t)0x0c); + BOOST_CHECK_EQUAL(sid.get_dst_endpoint(), (uint32_t)0x04); sid.set_dst_endpoint(0x0d); - BOOST_CHECK_EQUAL(sid.get(), 0x0a0b0c0d); - BOOST_CHECK_EQUAL(sid.get_src_addr(), 0x0a); - BOOST_CHECK_EQUAL(sid.get_src_endpoint(), 0x0b); - BOOST_CHECK_EQUAL(sid.get_dst_addr(), 0x0c); - BOOST_CHECK_EQUAL(sid.get_dst_endpoint(), 0x0d); + BOOST_CHECK_EQUAL(sid.get(), (uint32_t)0x0a0b0c0d); + BOOST_CHECK_EQUAL(sid.get_src_addr(), (uint32_t)0x0a); + BOOST_CHECK_EQUAL(sid.get_src_endpoint(), (uint32_t)0x0b); + BOOST_CHECK_EQUAL(sid.get_dst_addr(), (uint32_t)0x0c); + BOOST_CHECK_EQUAL(sid.get_dst_endpoint(), (uint32_t)0x0d); sid.set_dst_xbarport(0xb); - BOOST_CHECK_EQUAL(sid.get(), 0x0a0b0cbd); - BOOST_CHECK_EQUAL(sid.get_src_addr(), 0x0a); - BOOST_CHECK_EQUAL(sid.get_src_endpoint(), 0x0b); - BOOST_CHECK_EQUAL(sid.get_dst_addr(), 0x0c); - BOOST_CHECK_EQUAL(sid.get_dst_endpoint(), 0xbd); + BOOST_CHECK_EQUAL(sid.get(), (uint32_t)0x0a0b0cbd); + BOOST_CHECK_EQUAL(sid.get_src_addr(), (uint32_t)0x0a); + BOOST_CHECK_EQUAL(sid.get_src_endpoint(), (uint32_t)0x0b); + BOOST_CHECK_EQUAL(sid.get_dst_addr(), (uint32_t)0x0c); + BOOST_CHECK_EQUAL(sid.get_dst_endpoint(), (uint32_t)0xbd); sid.set_dst_blockport(0xc); - BOOST_CHECK_EQUAL(sid.get(), 0x0a0b0cbc); - BOOST_CHECK_EQUAL(sid.get_src_addr(), 0x0a); - BOOST_CHECK_EQUAL(sid.get_src_endpoint(), 0x0b); - BOOST_CHECK_EQUAL(sid.get_dst_addr(), 0x0c); - BOOST_CHECK_EQUAL(sid.get_dst_endpoint(), 0xbc); + BOOST_CHECK_EQUAL(sid.get(), (uint32_t)0x0a0b0cbc); + BOOST_CHECK_EQUAL(sid.get_src_addr(), (uint32_t)0x0a); + BOOST_CHECK_EQUAL(sid.get_src_endpoint(), (uint32_t)0x0b); + BOOST_CHECK_EQUAL(sid.get_dst_addr(), (uint32_t)0x0c); + BOOST_CHECK_EQUAL(sid.get_dst_endpoint(), (uint32_t)0xbc); sid_t flipped_sid = sid.reversed(); - BOOST_CHECK_EQUAL(flipped_sid.get(), 0x0cbc0a0b); + BOOST_CHECK_EQUAL(flipped_sid.get(), (uint32_t)0x0cbc0a0b); // In-place sid.reverse(); - BOOST_CHECK_EQUAL(sid.get(), 0x0cbc0a0b); + BOOST_CHECK_EQUAL(sid.get(), (uint32_t)0x0cbc0a0b); } BOOST_AUTO_TEST_CASE(test_sid_t_from_str) { sid_t sid("1.2>3.4"); - BOOST_CHECK_EQUAL(sid.get_src_addr(), 1); - BOOST_CHECK_EQUAL(sid.get_src_endpoint(), 2); - BOOST_CHECK_EQUAL(sid.get_dst_addr(), 3); - BOOST_CHECK_EQUAL(sid.get_dst_endpoint(), 4); + BOOST_CHECK_EQUAL(sid.get_src_addr(), (uint32_t)1); + BOOST_CHECK_EQUAL(sid.get_src_endpoint(), (uint32_t)2); + BOOST_CHECK_EQUAL(sid.get_dst_addr(), (uint32_t)3); + BOOST_CHECK_EQUAL(sid.get_dst_endpoint(), (uint32_t)4); sid = "01:02>03:10"; - BOOST_CHECK_EQUAL(sid.get_src_addr(), 1); - BOOST_CHECK_EQUAL(sid.get_src_endpoint(), 2); - BOOST_CHECK_EQUAL(sid.get_dst_addr(), 3); - BOOST_CHECK_EQUAL(sid.get_dst_endpoint(), 16); + BOOST_CHECK_EQUAL(sid.get_src_addr(), (uint32_t)1); + BOOST_CHECK_EQUAL(sid.get_src_endpoint(), (uint32_t)2); + BOOST_CHECK_EQUAL(sid.get_dst_addr(), (uint32_t)3); + BOOST_CHECK_EQUAL(sid.get_dst_endpoint(), (uint32_t)16); sid = "01:06/03:10"; - BOOST_CHECK_EQUAL(sid.get_src_addr(), 1); - BOOST_CHECK_EQUAL(sid.get_src_endpoint(), 6); - BOOST_CHECK_EQUAL(sid.get_dst_addr(), 3); - BOOST_CHECK_EQUAL(sid.get_dst_endpoint(), 16); + BOOST_CHECK_EQUAL(sid.get_src_addr(), (uint32_t)1); + BOOST_CHECK_EQUAL(sid.get_src_endpoint(), (uint32_t)6); + BOOST_CHECK_EQUAL(sid.get_dst_addr(), (uint32_t)3); + BOOST_CHECK_EQUAL(sid.get_dst_endpoint(), (uint32_t)16); sid = "01:02:04:10"; - BOOST_CHECK_EQUAL(sid.get_src_addr(), 1); - BOOST_CHECK_EQUAL(sid.get_src_endpoint(), 2); - BOOST_CHECK_EQUAL(sid.get_dst_addr(), 4); - BOOST_CHECK_EQUAL(sid.get_dst_endpoint(), 16); + BOOST_CHECK_EQUAL(sid.get_src_addr(), (uint32_t)1); + BOOST_CHECK_EQUAL(sid.get_src_endpoint(), (uint32_t)2); + BOOST_CHECK_EQUAL(sid.get_dst_addr(), (uint32_t)4); + BOOST_CHECK_EQUAL(sid.get_dst_endpoint(), (uint32_t)16); BOOST_REQUIRE_THROW(sid_t fail_sid("foobar"), uhd::value_error); BOOST_REQUIRE_THROW(sid_t fail_sid("01:02:03:4"), uhd::value_error); diff --git a/host/tests/sph_recv_test.cpp b/host/tests/sph_recv_test.cpp index 5dd0761db..e8c51b847 100644 --- a/host/tests/sph_recv_test.cpp +++ b/host/tests/sph_recv_test.cpp @@ -675,7 +675,7 @@ BOOST_AUTO_TEST_CASE(test_sph_recv_multi_channel_fragment){ BOOST_CHECK_EQUAL(metadata.error_code, uhd::rx_metadata_t::ERROR_CODE_NONE); BOOST_CHECK(metadata.has_time_spec); BOOST_CHECK_TS_CLOSE(metadata.time_spec, uhd::time_spec_t::from_ticks(num_accum_samps, SAMP_RATE)); - BOOST_CHECK_EQUAL(num_samps_ret, 10); + BOOST_CHECK_EQUAL(num_samps_ret, (size_t)10); num_accum_samps += num_samps_ret; if (not metadata.more_fragments) continue; @@ -685,7 +685,7 @@ BOOST_AUTO_TEST_CASE(test_sph_recv_multi_channel_fragment){ ); BOOST_CHECK_EQUAL(metadata.error_code, uhd::rx_metadata_t::ERROR_CODE_NONE); BOOST_CHECK(not metadata.more_fragments); - BOOST_CHECK_EQUAL(metadata.fragment_offset, 10); + BOOST_CHECK_EQUAL(metadata.fragment_offset, (size_t)10); BOOST_CHECK(metadata.has_time_spec); BOOST_CHECK_TS_CLOSE(metadata.time_spec, uhd::time_spec_t::from_ticks(num_accum_samps, SAMP_RATE)); BOOST_CHECK_EQUAL(num_samps_ret, i%10); diff --git a/host/tests/sph_send_test.cpp b/host/tests/sph_send_test.cpp index 603b36c85..58d47c76d 100644 --- a/host/tests/sph_send_test.cpp +++ b/host/tests/sph_send_test.cpp @@ -182,7 +182,7 @@ BOOST_AUTO_TEST_CASE(test_sph_send_one_channel_full_buffer_mode){ for (size_t i = 0; i < NUM_PKTS_TO_TEST; i++){ std::cout << "data check " << i << std::endl; dummy_send_xport.pop_front_packet(ifpi); - BOOST_CHECK_EQUAL(ifpi.num_payload_words32, 20); + BOOST_CHECK_EQUAL(ifpi.num_payload_words32, (size_t)20); BOOST_CHECK(ifpi.has_tsf); BOOST_CHECK_EQUAL(ifpi.tsf, num_accum_samps*TICK_RATE/SAMP_RATE); BOOST_CHECK_EQUAL(ifpi.sob, i == 0); diff --git a/host/tests/time_spec_test.cpp b/host/tests/time_spec_test.cpp index c9b9652f9..b98bea7d9 100644 --- a/host/tests/time_spec_test.cpp +++ b/host/tests/time_spec_test.cpp @@ -112,8 +112,8 @@ BOOST_AUTO_TEST_CASE(test_time_large_ticks_to_time_spec) BOOST_AUTO_TEST_CASE(test_time_error_irrational_rate) { - static const double rate = 1625e3/6; - const long long tick_in = 23423436291667; + static const double rate = 1625e3/6.0; + const long long tick_in = 23423436291667ll; const uhd::time_spec_t ts = uhd::time_spec_t::from_ticks(tick_in, rate); const long long tick_out = ts.to_ticks(rate); const long long err = tick_in - tick_out; -- cgit v1.2.3 From 306b5243e12af0db493856ad8397abac9835db0c Mon Sep 17 00:00:00 2001 From: Julian Arnold Date: Thu, 12 Mar 2015 10:19:08 -0700 Subject: ad9361: DC and IQ correction only done if df > 100MHz during a tune request --- host/lib/usrp/common/ad9361_driver/ad9361_device.cpp | 19 +++++++++++++------ host/lib/usrp/common/ad9361_driver/ad9361_device.h | 2 ++ 2 files changed, 15 insertions(+), 6 deletions(-) (limited to 'host/lib/usrp/common/ad9361_driver') diff --git a/host/lib/usrp/common/ad9361_driver/ad9361_device.cpp b/host/lib/usrp/common/ad9361_driver/ad9361_device.cpp index ba66769dd..92ad0ee3f 100644 --- a/host/lib/usrp/common/ad9361_driver/ad9361_device.cpp +++ b/host/lib/usrp/common/ad9361_driver/ad9361_device.cpp @@ -80,6 +80,7 @@ int get_num_taps(int max_num_taps) { const double ad9361_device_t::AD9361_MAX_GAIN = 89.75; const double ad9361_device_t::AD9361_MAX_CLOCK_RATE = 61.44e6; const double ad9361_device_t::AD9361_RECOMMENDED_MAX_CLOCK_RATE = 56e6; +const double ad9361_device_t::AD9361_CAL_VALID_WINDOW = 100e6; /* Program either the RX or TX FIR filter. * @@ -1455,6 +1456,7 @@ void ad9361_device_t::initialize() _rx2_agc_mode = GAIN_MODE_SLOW_AGC; _rx1_agc_enable = false; _rx2_agc_enable = false; + _last_calibration_freq = -AD9361_CAL_VALID_WINDOW; /* Reset the device. */ _io_iface->poke8(0x000, 0x01); @@ -1890,12 +1892,17 @@ double ad9361_device_t::tune(direction_t direction, const double value) /* Update the gain settings. */ _reprogram_gains(); - /* Run the calibration algorithms. */ - _calibrate_baseband_dc_offset(); - _calibrate_rf_dc_offset(); - _calibrate_tx_quadrature(); - _calibrate_rx_quadrature(); - _configure_bb_rf_dc_tracking(_use_dc_offset_correction); //if this is not done here, bb dc offset is not good + /* Only run the following calibrations if we are more than 100MHz away + * from the previous calibration point. */ + if (std::abs(_last_calibration_freq - tune_freq) > AD9361_CAL_VALID_WINDOW) { + /* Run the calibration algorithms. */ + _calibrate_rf_dc_offset(); + _calibrate_tx_quadrature(); + _calibrate_rx_quadrature(); + _configure_bb_rf_dc_tracking(_use_dc_offset_correction); + _last_calibration_freq = tune_freq; + } + /* If we were in the FDD state, return it now. */ if (not_in_alert) { _io_iface->poke8(0x014, 0x21); diff --git a/host/lib/usrp/common/ad9361_driver/ad9361_device.h b/host/lib/usrp/common/ad9361_driver/ad9361_device.h index 1cfff9971..7c53ff0c4 100644 --- a/host/lib/usrp/common/ad9361_driver/ad9361_device.h +++ b/host/lib/usrp/common/ad9361_driver/ad9361_device.h @@ -89,6 +89,7 @@ public: static const double AD9361_MAX_GAIN; static const double AD9361_MAX_CLOCK_RATE; static const double AD9361_RECOMMENDED_MAX_CLOCK_RATE; + static const double AD9361_CAL_VALID_WINDOW; private: //Methods void _program_fir_filter(direction_t direction, int num_taps, boost::uint16_t *coeffs); @@ -134,6 +135,7 @@ private: //Members ad9361_io::sptr _io_iface; //Intermediate state double _rx_freq, _tx_freq, _req_rx_freq, _req_tx_freq; + double _last_calibration_freq; double _baseband_bw, _bbpll_freq, _adcclock_freq; double _req_clock_rate, _req_coreclk; boost::uint16_t _rx_bbf_tunediv; -- cgit v1.2.3