From e83a941a9ff6094358602302212aed760341c873 Mon Sep 17 00:00:00 2001 From: Michael West Date: Fri, 15 Nov 2013 09:50:07 -0800 Subject: BUG #182: Refactored b2xx_fx3_utils to use files from UHD --- host/lib/usrp/b200/b200_iface.cpp | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'host/lib/usrp/b200/b200_iface.cpp') diff --git a/host/lib/usrp/b200/b200_iface.cpp b/host/lib/usrp/b200/b200_iface.cpp index 1d05e159c..b87df2977 100644 --- a/host/lib/usrp/b200/b200_iface.cpp +++ b/host/lib/usrp/b200/b200_iface.cpp @@ -240,10 +240,12 @@ public: size_t num_bytes ){ byte_vector_t recv_bytes(num_bytes); - fx3_control_read(B200_VREQ_EEPROM_READ, + int bytes_read = fx3_control_read(B200_VREQ_EEPROM_READ, 0, offset | (boost::uint16_t(addr) << 8), (unsigned char*) &recv_bytes[0], num_bytes); + if (bytes_read != num_bytes) + throw uhd::io_error("Failed to read data from EEPROM."); return recv_bytes; } -- cgit v1.2.3 From 01cfe2118f0bd72719809d2539c61df46a164fec Mon Sep 17 00:00:00 2001 From: Balint Seeber Date: Tue, 19 Nov 2013 13:17:25 -0800 Subject: b200: increase FPGA VREQ transfer size to 512 if operating over USB3 --- host/lib/usrp/b200/b200_iface.cpp | 20 +++++++++++++++++--- 1 file changed, 17 insertions(+), 3 deletions(-) (limited to 'host/lib/usrp/b200/b200_iface.cpp') diff --git a/host/lib/usrp/b200/b200_iface.cpp b/host/lib/usrp/b200/b200_iface.cpp index 1d05e159c..a74e058d0 100644 --- a/host/lib/usrp/b200/b200_iface.cpp +++ b/host/lib/usrp/b200/b200_iface.cpp @@ -69,6 +69,11 @@ const static boost::uint8_t FX3_STATE_RUNNING = 0x04; const static boost::uint8_t FX3_STATE_UNCONFIGURED = 0x05; const static boost::uint8_t FX3_STATE_ERROR = 0x06; +const static int VREQ_MAX_SIZE_USB2 = 64; +const static int VREQ_MAX_SIZE_USB3 = 512; +const static int VREQ_DEFAULT_SIZE = VREQ_MAX_SIZE_USB2; +const static int VREQ_MAX_SIZE = VREQ_MAX_SIZE_USB3; + typedef boost::uint32_t hash_type; @@ -484,8 +489,17 @@ public: hash_type hash = generate_hash(filename); hash_type loaded_hash; usrp_get_fpga_hash(loaded_hash); if (hash == loaded_hash) return 0; - - unsigned char out_buff[64]; + + int transfer_size = VREQ_DEFAULT_SIZE; + int current_usb_speed = get_usb_speed(); + if (current_usb_speed == 3) + transfer_size = VREQ_MAX_SIZE_USB3; + else if (current_usb_speed != 2) + throw uhd::io_error("load_fpga: get_usb_speed returned invalid USB speed (not 2 or 3)"); + + UHD_ASSERT_THROW(transfer_size <= VREQ_MAX_SIZE); + + unsigned char out_buff[VREQ_MAX_SIZE]; memset(out_buff, 0x00, sizeof(out_buff)); fx3_control_write(B200_VREQ_FPGA_CONFIG, 0, 0, out_buff, 1, 1000); @@ -535,7 +549,7 @@ public: size_t bytes_sent = 0; while(!file.eof()) { - file.read((char *) out_buff, sizeof(out_buff)); + file.read((char *) out_buff, transfer_size); const std::streamsize n = file.gcount(); if(n == 0) continue; -- cgit v1.2.3 From aaef714ac5db24090da8e6d5f338ebc23827e07f Mon Sep 17 00:00:00 2001 From: Balint Seeber Date: Tue, 19 Nov 2013 18:29:24 -0800 Subject: b200: auto-select VREQ xfer size regardless of FW version --- host/lib/usrp/b200/b200_iface.cpp | 18 +++++++++++++----- 1 file changed, 13 insertions(+), 5 deletions(-) (limited to 'host/lib/usrp/b200/b200_iface.cpp') diff --git a/host/lib/usrp/b200/b200_iface.cpp b/host/lib/usrp/b200/b200_iface.cpp index 5c512c1d9..1182ac78f 100644 --- a/host/lib/usrp/b200/b200_iface.cpp +++ b/host/lib/usrp/b200/b200_iface.cpp @@ -492,18 +492,21 @@ public: hash_type loaded_hash; usrp_get_fpga_hash(loaded_hash); if (hash == loaded_hash) return 0; + // Establish default largest possible control request transfer size based on operating USB speed int transfer_size = VREQ_DEFAULT_SIZE; int current_usb_speed = get_usb_speed(); if (current_usb_speed == 3) transfer_size = VREQ_MAX_SIZE_USB3; else if (current_usb_speed != 2) - throw uhd::io_error("load_fpga: get_usb_speed returned invalid USB speed (not 2 or 3)"); + throw uhd::io_error("load_fpga: get_usb_speed returned invalid USB speed (not 2 or 3)."); UHD_ASSERT_THROW(transfer_size <= VREQ_MAX_SIZE); - + unsigned char out_buff[VREQ_MAX_SIZE]; - memset(out_buff, 0x00, sizeof(out_buff)); - fx3_control_write(B200_VREQ_FPGA_CONFIG, 0, 0, out_buff, 1, 1000); + + // Request loopback read, which will indicate the firmware's current control request buffer size + int nread = fx3_control_read(B200_VREQ_LOOP, 0, 0, out_buff, sizeof(out_buff), 1000); + transfer_size = std::min(transfer_size, nread); // Select the smaller value size_t file_size = 0; { @@ -518,6 +521,9 @@ public: throw uhd::io_error("load_fpga: cannot open FPGA input file."); } + memset(out_buff, 0x00, sizeof(out_buff)); + fx3_control_write(B200_VREQ_FPGA_CONFIG, 0, 0, out_buff, 1, 1000); + wait_count = 0; do { fx3_state = get_fx3_status(); @@ -558,7 +564,9 @@ public: boost::uint16_t transfer_count = boost::uint16_t(n); /* Send the data to the device. */ - fx3_control_write(B200_VREQ_FPGA_DATA, 0, 0, out_buff, transfer_count, 5000); + int nwritten = fx3_control_write(B200_VREQ_FPGA_DATA, 0, 0, out_buff, transfer_count, 5000); + if (nwritten <= 0) + throw uhd::io_error("load_fpga: cannot write bitstream to FX3."); if (load_img_msg) { -- cgit v1.2.3 From f568b1984f77a525260b6a5157ce3a8f1ab56307 Mon Sep 17 00:00:00 2001 From: Balint Seeber Date: Tue, 19 Nov 2013 18:38:15 -0800 Subject: b200: extra check on loopback request to determine VREQ transfer size --- host/lib/usrp/b200/b200_iface.cpp | 2 ++ 1 file changed, 2 insertions(+) (limited to 'host/lib/usrp/b200/b200_iface.cpp') diff --git a/host/lib/usrp/b200/b200_iface.cpp b/host/lib/usrp/b200/b200_iface.cpp index 1182ac78f..959f77077 100644 --- a/host/lib/usrp/b200/b200_iface.cpp +++ b/host/lib/usrp/b200/b200_iface.cpp @@ -506,6 +506,8 @@ public: // Request loopback read, which will indicate the firmware's current control request buffer size int nread = fx3_control_read(B200_VREQ_LOOP, 0, 0, out_buff, sizeof(out_buff), 1000); + if (nread <= 0) + throw uhd::io_error("load_fpga: unable to complete firmware loopback request."); transfer_size = std::min(transfer_size, nread); // Select the smaller value size_t file_size = 0; -- cgit v1.2.3 From 58f4af976d64765c2402e1ce00ee78f4aae51881 Mon Sep 17 00:00:00 2001 From: Balint Seeber Date: Tue, 19 Nov 2013 18:41:27 -0800 Subject: b200: check return value from control write of FPGA bitstream for short transfer --- host/lib/usrp/b200/b200_iface.cpp | 2 ++ 1 file changed, 2 insertions(+) (limited to 'host/lib/usrp/b200/b200_iface.cpp') diff --git a/host/lib/usrp/b200/b200_iface.cpp b/host/lib/usrp/b200/b200_iface.cpp index 959f77077..a8e96f4ac 100644 --- a/host/lib/usrp/b200/b200_iface.cpp +++ b/host/lib/usrp/b200/b200_iface.cpp @@ -569,6 +569,8 @@ public: int nwritten = fx3_control_write(B200_VREQ_FPGA_DATA, 0, 0, out_buff, transfer_count, 5000); if (nwritten <= 0) throw uhd::io_error("load_fpga: cannot write bitstream to FX3."); + else if (nwritten != transfer_count) + throw uhd::io_error("load_fpga: short write while transferring bitstream to FX3."); if (load_img_msg) { -- cgit v1.2.3