From df91040196c536c1cf0a57379b946c89ea73ae6b Mon Sep 17 00:00:00 2001 From: Josh Blum Date: Mon, 4 Jul 2011 08:33:47 -0700 Subject: usrp: added clipping to link max rate when setting sample rate --- host/lib/usrp/b100/b100_impl.cpp | 2 ++ host/lib/usrp/b100/b100_impl.hpp | 1 + 2 files changed, 3 insertions(+) (limited to 'host/lib/usrp/b100') diff --git a/host/lib/usrp/b100/b100_impl.cpp b/host/lib/usrp/b100/b100_impl.cpp index 5410f57e5..b58e70694 100644 --- a/host/lib/usrp/b100/b100_impl.cpp +++ b/host/lib/usrp/b100/b100_impl.cpp @@ -273,6 +273,7 @@ b100_impl::b100_impl(const device_addr_t &device_addr){ _fpga_ctrl, B100_REG_SR_ADDR(B100_SR_RX_DSP1), B100_REG_SR_ADDR(B100_SR_RX_CTRL1), B100_RX_SID_BASE + 1 )); for (size_t dspno = 0; dspno < _rx_dsps.size(); dspno++){ + _rx_dsps[dspno]->set_link_rate(B100_LINK_RATE_BPS); _tree->access(mb_path / "tick_rate") .subscribe(boost::bind(&rx_dsp_core_200::set_tick_rate, _rx_dsps[dspno], _1)); property_tree::path_type rx_dsp_path = mb_path / str(boost::format("rx_dsps/%u") % dspno); @@ -293,6 +294,7 @@ b100_impl::b100_impl(const device_addr_t &device_addr){ _tx_dsp = tx_dsp_core_200::make( _fpga_ctrl, B100_REG_SR_ADDR(B100_SR_TX_DSP), B100_REG_SR_ADDR(B100_SR_TX_CTRL), B100_TX_ASYNC_SID ); + _tx_dsp->set_link_rate(B100_LINK_RATE_BPS); _tree->access(mb_path / "tick_rate") .subscribe(boost::bind(&tx_dsp_core_200::set_tick_rate, _tx_dsp, _1)); _tree->create(mb_path / "tx_dsps/0/rate/value") diff --git a/host/lib/usrp/b100/b100_impl.hpp b/host/lib/usrp/b100/b100_impl.hpp index 115fba985..62a22674e 100644 --- a/host/lib/usrp/b100/b100_impl.hpp +++ b/host/lib/usrp/b100/b100_impl.hpp @@ -42,6 +42,7 @@ #include #include +static const double B100_LINK_RATE_BPS = 256e6/8; //pratical link rate (< 480 Mbps) static const std::string B100_FW_FILE_NAME = "usrp_b100_fw.ihx"; static const std::string B100_FPGA_FILE_NAME = "usrp_b100_fpga.bin"; static const boost::uint16_t B100_FW_COMPAT_NUM = 0x02; -- cgit v1.2.3