From 7b03f4144a0dc7a1e745ac43a3997b0eab7042c0 Mon Sep 17 00:00:00 2001 From: Josh Blum Date: Sun, 30 Jan 2011 22:10:49 +0000 Subject: usrp-e100: work on clock control added vco calibration routine and readback to check for calibrated changed the counters/dividers calculation to be event driven and more mathematically calculated. --- host/lib/ic_reg_maps/gen_ad9522_regs.py | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'host/lib/ic_reg_maps') diff --git a/host/lib/ic_reg_maps/gen_ad9522_regs.py b/host/lib/ic_reg_maps/gen_ad9522_regs.py index a5debe568..86605c34a 100755 --- a/host/lib/ic_reg_maps/gen_ad9522_regs.py +++ b/host/lib/ic_reg_maps/gen_ad9522_regs.py @@ -80,6 +80,14 @@ external_zero_delay_fcds 0x01E[4:3] 0 enable_external_zero_delay 0x01E[2] 0 enable_zero_delay 0x01E[1] 0 ######################################################################## +vco_calibration_finished 0x01F[6] 0 +holdover_active 0x01F[5] 0 +ref2_selected 0x01F[4] 0 +vco_freq_gt_thresh 0x01F[3] 0 +ref2_freq_gt_thresh 0x01F[2] 0 +ref1_freq_gt_thresh 0x01F[1] 0 +digital_lock_detect 0x01F[0] 0 +######################################################################## #for $i in range(12) #set $addr = ($i + 0x0F0) out$(i)_format $(addr)[7] 0 lvds, cmos -- cgit v1.2.3