From ce5940f86e896b639e8fe60e2901a9d59f739785 Mon Sep 17 00:00:00 2001 From: Jason Abele Date: Mon, 26 Jul 2010 15:35:35 -0700 Subject: DBSRX support in UHD --- host/lib/ic_reg_maps/common.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'host/lib/ic_reg_maps/common.py') diff --git a/host/lib/ic_reg_maps/common.py b/host/lib/ic_reg_maps/common.py index 47325a7e3..986093004 100644 --- a/host/lib/ic_reg_maps/common.py +++ b/host/lib/ic_reg_maps/common.py @@ -173,7 +173,7 @@ class mreg: def get_type(self): return 'boost::uint%d_t'%max(2**math.ceil(math.log(self.get_bit_width(), 2)), 8) -def generate(name, regs_tmpl, body_tmpl='', file=__file__): +def generate(name, regs_tmpl, body_tmpl='', file=__file__, append=False): #evaluate the regs template and parse each line into a register regs = list(); mregs = list() for entry in parse_tmpl(regs_tmpl).splitlines(): @@ -193,4 +193,4 @@ def generate(name, regs_tmpl, body_tmpl='', file=__file__): ) #write the generated code to file specified by argv1 - open(sys.argv[1], 'w').write(code) + open(sys.argv[1], 'a' if append else 'w').write(code) -- cgit v1.2.3