From 275b29e07f97cdf638ecb22c602d26b7d340547a Mon Sep 17 00:00:00 2001 From: Josh Blum Date: Fri, 2 Apr 2010 17:54:06 -0700 Subject: some work on rfx board code --- host/lib/CMakeLists.txt | 1 + 1 file changed, 1 insertion(+) (limited to 'host/lib/CMakeLists.txt') diff --git a/host/lib/CMakeLists.txt b/host/lib/CMakeLists.txt index a5345cae4..a4bf46f1a 100644 --- a/host/lib/CMakeLists.txt +++ b/host/lib/CMakeLists.txt @@ -28,6 +28,7 @@ SET(libuhd_sources transport/udp_simple.cpp transport/vrt.cpp usrp/dboard/db_basic_and_lf.cpp + usrp/dboard/db_rfx.cpp usrp/dboard_base.cpp usrp/dboard_interface.cpp usrp/simple_usrp.cpp -- cgit v1.2.3 From b66a74ff1f629af714e26040b410d472c08be522 Mon Sep 17 00:00:00 2001 From: Josh Blum Date: Wed, 7 Apr 2010 00:46:42 -0700 Subject: Reworked the spi part of the dboard interface. It turns out to be more complicated. The integer type is better for holding the bits. The edges can be different, so the spi config hold 2 edge setting for mosi and miso. --- firmware/microblaze/apps/txrx.c | 25 ++------ host/include/uhd/usrp/dboard_interface.hpp | 100 ++++++++++++++++------------- host/lib/CMakeLists.txt | 1 - host/lib/usrp/dboard/db_rfx.cpp | 16 ++--- host/lib/usrp/dboard_interface.cpp | 53 --------------- host/lib/usrp/usrp2/dboard_interface.cpp | 95 ++++++++++++++++----------- host/lib/usrp/usrp2/fw_common.h | 7 +- 7 files changed, 128 insertions(+), 169 deletions(-) delete mode 100644 host/lib/usrp/dboard_interface.cpp (limited to 'host/lib/CMakeLists.txt') diff --git a/firmware/microblaze/apps/txrx.c b/firmware/microblaze/apps/txrx.c index 69a04d771..561f3148f 100644 --- a/firmware/microblaze/apps/txrx.c +++ b/firmware/microblaze/apps/txrx.c @@ -253,29 +253,18 @@ void handle_udp_ctrl_packet( * SPI ******************************************************************/ case USRP2_CTRL_ID_TRANSACT_ME_SOME_SPI_BRO:{ - uint8_t num_bytes = ctrl_data_in->data.spi_args.bytes; - - //load the data from the array of bytes - uint32_t data = 0x0; - for (size_t i = 0; i < num_bytes; i++){ - data = (data << 8) | ctrl_data_in->data.spi_args.data[i]; - } - //transact uint32_t result = spi_transact( (ctrl_data_in->data.spi_args.readback == 0)? SPI_TXONLY : SPI_TXRX, - ctrl_data_in->data.spi_args.dev, - data, num_bytes*8, //length in bits - (ctrl_data_in->data.spi_args.edge == USRP2_CLK_EDGE_RISE)? SPIF_PUSH_RISE : SPIF_PUSH_FALL | - (ctrl_data_in->data.spi_args.edge == USRP2_CLK_EDGE_RISE)? SPIF_LATCH_RISE : SPIF_LATCH_FALL + ctrl_data_in->data.spi_args.dev, //which device + ctrl_data_in->data.spi_args.data, //32 bit data + ctrl_data_in->data.spi_args.num_bits, //length in bits + (ctrl_data_in->data.spi_args.mosi_edge == USRP2_CLK_EDGE_RISE)? SPIF_PUSH_FALL : SPIF_PUSH_RISE | + (ctrl_data_in->data.spi_args.miso_edge == USRP2_CLK_EDGE_RISE)? SPIF_LATCH_RISE : SPIF_LATCH_FALL ); - //load the result into the array of bytes - for (size_t i = 0; i < num_bytes; i++){ - uint8_t byte_shift = num_bytes - i - 1; - ctrl_data_out.data.spi_args.data[i] = (result >> (byte_shift*8)) & 0xff; - } - ctrl_data_out.data.spi_args.bytes = num_bytes; + //load output + ctrl_data_out.data.spi_args.data = result; ctrl_data_out.id = USRP2_CTRL_ID_OMG_TRANSACTED_SPI_DUDE; } break; diff --git a/host/include/uhd/usrp/dboard_interface.hpp b/host/include/uhd/usrp/dboard_interface.hpp index b3bab131d..dab5a2281 100644 --- a/host/include/uhd/usrp/dboard_interface.hpp +++ b/host/include/uhd/usrp/dboard_interface.hpp @@ -42,16 +42,31 @@ public: UNIT_TYPE_TX = 't' }; - //tells the host which device to use - enum spi_dev_t{ - SPI_DEV_RX = 'r', - SPI_DEV_TX = 't' - }; - - //args for spi format - enum spi_edge_t{ - SPI_EDGE_RISE = 'r', - SPI_EDGE_FALL = 'f' + //spi configuration struct + struct UHD_API spi_config_t{ + /*! + * The edge type specifies when data is valid + * relative to the edge of the serial clock. + */ + enum edge_t{ + EDGE_RISE = 'r', + EDGE_FALL = 'f' + }; + + //! on what edge is the mosi data valid? + edge_t mosi_edge; + + //! on what edge is the miso data valid? + edge_t miso_edge; + + /*! + * Create a new spi config. + * \param edge the default edge for mosi and miso + */ + spi_config_t(edge_t edge = EDGE_RISE){ + mosi_edge = edge; + miso_edge = edge; + } }; //tell the host which gpio bank @@ -68,10 +83,6 @@ public: ATR_REG_FULL_DUPLEX = 'f' }; - //structors - dboard_interface(void); - virtual ~dboard_interface(void); - /*! * Write to an aux dac. * \param unit which unit rx or tx @@ -131,61 +142,60 @@ public: /*! * \brief Write data to SPI bus peripheral. * - * \param dev which spi device - * \param edge args for format - * \param buf the data to write + * \param unit which unit, rx or tx + * \param config configuration settings + * \param data the bits to write LSB first + * \param num_bits the number of bits in data */ - void write_spi(spi_dev_t dev, spi_edge_t edge, const byte_vector_t &buf); + virtual void write_spi( + unit_type_t unit, + const spi_config_t &config, + boost::uint32_t data, + size_t num_bits + ) = 0; /*! * \brief Read data to SPI bus peripheral. * - * \param dev which spi device - * \param edge args for format - * \param num_bytes number of bytes to read + * \param unit which unit, rx or tx + * \param config configuration settings + * \param num_bits the number of bits * \return the data that was read */ - byte_vector_t read_spi(spi_dev_t dev, spi_edge_t edge, size_t num_bytes); + virtual boost::uint32_t read_spi( + unit_type_t unit, + const spi_config_t &config, + size_t num_bits + ) = 0; /*! * \brief Read and write data to SPI bus peripheral. * The data read back will be the same length as the input buffer. * - * \param dev which spi device - * \param edge args for format - * \param buf the data to write + * \param unit which unit, rx or tx + * \param config configuration settings + * \param data the bits to write LSB first + * \param num_bits the number of bits in data * \return the data that was read */ - byte_vector_t read_write_spi(spi_dev_t dev, spi_edge_t edge, const byte_vector_t &buf); + virtual boost::uint32_t read_write_spi( + unit_type_t unit, + const spi_config_t &config, + boost::uint32_t data, + size_t num_bits + ) = 0; /*! * \brief Get the rate of the rx dboard clock. - * \return the clock rate + * \return the clock rate in Hz */ virtual double get_rx_clock_rate(void) = 0; /*! * \brief Get the rate of the tx dboard clock. - * \return the clock rate + * \return the clock rate in Hz */ virtual double get_tx_clock_rate(void) = 0; - -private: - /*! - * \brief Read and write data to SPI bus peripheral. - * - * \param dev which spi device - * \param edge args for format - * \param buf the data to write - * \param readback false for write only - * \return the data that was read - */ - virtual byte_vector_t transact_spi( - spi_dev_t dev, - spi_edge_t edge, - const byte_vector_t &buf, - bool readback - ) = 0; }; }} //namespace diff --git a/host/lib/CMakeLists.txt b/host/lib/CMakeLists.txt index a4bf46f1a..f21a4a491 100644 --- a/host/lib/CMakeLists.txt +++ b/host/lib/CMakeLists.txt @@ -30,7 +30,6 @@ SET(libuhd_sources usrp/dboard/db_basic_and_lf.cpp usrp/dboard/db_rfx.cpp usrp/dboard_base.cpp - usrp/dboard_interface.cpp usrp/simple_usrp.cpp usrp/dboard_manager.cpp usrp/tune_helper.cpp diff --git a/host/lib/usrp/dboard/db_rfx.cpp b/host/lib/usrp/dboard/db_rfx.cpp index 57ea03da5..68fa51144 100644 --- a/host/lib/usrp/dboard/db_rfx.cpp +++ b/host/lib/usrp/dboard/db_rfx.cpp @@ -136,17 +136,11 @@ void rfx_xcvr::reload_adf4360_regs(void){ (adf4360_regs_t::ADDR_RCOUNTER) ; BOOST_FOREACH(adf4360_regs_t::addr_t addr, addrs){ - boost::uint32_t reg = _adf4360_regs.get_reg(addr); - dboard_interface::byte_vector_t spi_bytes = list_of - ((reg >> 16) & 0xff) - ((reg >> 8) & 0xff) - ((reg >> 0) & 0xff) - ; - //this->get_interface.write_spi( - // dboard_interface::SPI_DEV_TX, - // dboard_interface::SPI_EDGE_FALL, - // spi_bytes - //); + this->get_interface()->write_spi( + dboard_interface::UNIT_TYPE_TX, + dboard_interface::spi_config_t::EDGE_RISE, + _adf4360_regs.get_reg(addr), 24 + ); } } diff --git a/host/lib/usrp/dboard_interface.cpp b/host/lib/usrp/dboard_interface.cpp deleted file mode 100644 index c40c9b398..000000000 --- a/host/lib/usrp/dboard_interface.cpp +++ /dev/null @@ -1,53 +0,0 @@ -// -// Copyright 2010 Ettus Research LLC -// -// This program is free software: you can redistribute it and/or modify -// it under the terms of the GNU General Public License as published by -// the Free Software Foundation, either version 3 of the License, or -// (at your option) any later version. -// -// This program is distributed in the hope that it will be useful, -// but WITHOUT ANY WARRANTY; without even the implied warranty of -// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -// GNU General Public License for more details. -// -// You should have received a copy of the GNU General Public License -// along with this program. If not, see . -// - -#include - -using namespace uhd::usrp; - -dboard_interface::dboard_interface(void){ - /* NOP */ -} - -dboard_interface::~dboard_interface(void){ - /* NOP */ -} - -void dboard_interface::write_spi( - spi_dev_t dev, - spi_edge_t edge, - const byte_vector_t &buf -){ - transact_spi(dev, edge, buf, false); //dont readback -} - -dboard_interface::byte_vector_t dboard_interface::read_spi( - spi_dev_t dev, - spi_edge_t edge, - size_t num_bytes -){ - byte_vector_t buf(num_bytes, 0x00); //dummy data - return transact_spi(dev, edge, buf, true); //readback -} - -dboard_interface::byte_vector_t dboard_interface::read_write_spi( - spi_dev_t dev, - spi_edge_t edge, - const byte_vector_t &buf -){ - return transact_spi(dev, edge, buf, true); //readback -} diff --git a/host/lib/usrp/usrp2/dboard_interface.cpp b/host/lib/usrp/usrp2/dboard_interface.cpp index 6dd756420..eee7c087a 100644 --- a/host/lib/usrp/usrp2/dboard_interface.cpp +++ b/host/lib/usrp/usrp2/dboard_interface.cpp @@ -42,9 +42,35 @@ public: double get_rx_clock_rate(void); double get_tx_clock_rate(void); + void write_spi( + unit_type_t unit, + const spi_config_t &config, + boost::uint32_t data, + size_t num_bits + ){ + transact_spi(unit, config, data, num_bits, false /*no rb*/); + } + + boost::uint32_t read_spi( + unit_type_t unit, + const spi_config_t &config, + size_t num_bits + ){ + return transact_spi(unit, config, 0, num_bits, true /*rb*/); + } + + boost::uint32_t read_write_spi( + unit_type_t unit, + const spi_config_t &config, + boost::uint32_t data, + size_t num_bits + ){ + return transact_spi(unit, config, data, num_bits, true /*rb*/); + } + private: - byte_vector_t transact_spi( - spi_dev_t, spi_edge_t, const byte_vector_t &, bool + boost::uint32_t transact_spi( + unit_type_t, const spi_config_t &, boost::uint32_t, size_t, bool ); usrp2_impl *_impl; @@ -136,17 +162,17 @@ void usrp2_dboard_interface::set_atr_reg(gpio_bank_t bank, atr_reg_t atr, boost: * SPI **********************************************************************/ /*! - * Static function to convert a spi dev enum - * to an over-the-wire value for the usrp2 control. - * \param dev the dboard interface spi dev enum + * Static function to convert a unit type enum + * to an over-the-wire value for the spi device. + * \param unit the dboard interface unit type enum * \return an over the wire representation */ -static boost::uint8_t spi_dev_to_otw(dboard_interface::spi_dev_t dev){ - switch(dev){ - case uhd::usrp::dboard_interface::SPI_DEV_TX: return SPI_SS_TX_DB; - case uhd::usrp::dboard_interface::SPI_DEV_RX: return SPI_SS_RX_DB; +static boost::uint8_t unit_to_otw_dev(dboard_interface::unit_type_t unit){ + switch(unit){ + case dboard_interface::UNIT_TYPE_TX: return SPI_SS_TX_DB; + case dboard_interface::UNIT_TYPE_RX: return SPI_SS_RX_DB; } - throw std::invalid_argument("unknown spi device type"); + throw std::invalid_argument("unknown unit type type"); } /*! @@ -155,43 +181,36 @@ static boost::uint8_t spi_dev_to_otw(dboard_interface::spi_dev_t dev){ * \param edge the dboard interface spi edge enum * \return an over the wire representation */ -static boost::uint8_t spi_edge_to_otw(dboard_interface::spi_edge_t edge){ +static boost::uint8_t spi_edge_to_otw(dboard_interface::spi_config_t::edge_t edge){ switch(edge){ - case uhd::usrp::dboard_interface::SPI_EDGE_RISE: return USRP2_CLK_EDGE_RISE; - case uhd::usrp::dboard_interface::SPI_EDGE_FALL: return USRP2_CLK_EDGE_FALL; + case dboard_interface::spi_config_t::EDGE_RISE: return USRP2_CLK_EDGE_RISE; + case dboard_interface::spi_config_t::EDGE_FALL: return USRP2_CLK_EDGE_FALL; } throw std::invalid_argument("unknown spi edge type"); } -dboard_interface::byte_vector_t usrp2_dboard_interface::transact_spi( - spi_dev_t dev, - spi_edge_t edge, - const byte_vector_t &buf, +boost::uint32_t usrp2_dboard_interface::transact_spi( + unit_type_t unit, + const spi_config_t &config, + boost::uint32_t data, + size_t num_bits, bool readback ){ //setup the out data usrp2_ctrl_data_t out_data; out_data.id = htonl(USRP2_CTRL_ID_TRANSACT_ME_SOME_SPI_BRO); - out_data.data.spi_args.dev = spi_dev_to_otw(dev); - out_data.data.spi_args.edge = spi_edge_to_otw(edge); + out_data.data.spi_args.dev = unit_to_otw_dev(unit); + out_data.data.spi_args.miso_edge = spi_edge_to_otw(config.miso_edge); + out_data.data.spi_args.mosi_edge = spi_edge_to_otw(config.mosi_edge); out_data.data.spi_args.readback = (readback)? 1 : 0; - out_data.data.spi_args.bytes = buf.size(); - - //limitation of spi transaction size - ASSERT_THROW(buf.size() <= sizeof(out_data.data.spi_args.data)); - - //copy in the data - std::copy(buf.begin(), buf.end(), out_data.data.spi_args.data); + out_data.data.spi_args.num_bits = num_bits; + out_data.data.spi_args.data = htonl(data); //send and recv usrp2_ctrl_data_t in_data = _impl->ctrl_send_and_recv(out_data); ASSERT_THROW(htonl(in_data.id) == USRP2_CTRL_ID_OMG_TRANSACTED_SPI_DUDE); - ASSERT_THROW(in_data.data.spi_args.bytes == buf.size()); - //copy out the data - byte_vector_t result(buf.size()); - std::copy(in_data.data.spi_args.data, in_data.data.spi_args.data + buf.size(), result.begin()); - return result; + return ntohl(out_data.data.spi_args.data); } /*********************************************************************** @@ -245,19 +264,19 @@ dboard_interface::byte_vector_t usrp2_dboard_interface::read_i2c(int i2c_addr, s * \param unit the dboard interface unit type enum * \return an over the wire representation */ -static boost::uint8_t spi_dev_to_otw(dboard_interface::unit_type_t unit){ +static boost::uint8_t unit_to_otw(dboard_interface::unit_type_t unit){ switch(unit){ - case uhd::usrp::dboard_interface::UNIT_TYPE_TX: return USRP2_DIR_TX; - case uhd::usrp::dboard_interface::UNIT_TYPE_RX: return USRP2_DIR_RX; + case dboard_interface::UNIT_TYPE_TX: return USRP2_DIR_TX; + case dboard_interface::UNIT_TYPE_RX: return USRP2_DIR_RX; } throw std::invalid_argument("unknown unit type type"); } -void usrp2_dboard_interface::write_aux_dac(dboard_interface::unit_type_t unit, int which, int value){ +void usrp2_dboard_interface::write_aux_dac(unit_type_t unit, int which, int value){ //setup the out data usrp2_ctrl_data_t out_data; out_data.id = htonl(USRP2_CTRL_ID_WRITE_THIS_TO_THE_AUX_DAC_BRO); - out_data.data.aux_args.dir = spi_dev_to_otw(unit); + out_data.data.aux_args.dir = unit_to_otw(unit); out_data.data.aux_args.which = which; out_data.data.aux_args.value = htonl(value); @@ -266,11 +285,11 @@ void usrp2_dboard_interface::write_aux_dac(dboard_interface::unit_type_t unit, i ASSERT_THROW(htonl(in_data.id) == USRP2_CTRL_ID_DONE_WITH_THAT_AUX_DAC_DUDE); } -int usrp2_dboard_interface::read_aux_adc(dboard_interface::unit_type_t unit, int which){ +int usrp2_dboard_interface::read_aux_adc(unit_type_t unit, int which){ //setup the out data usrp2_ctrl_data_t out_data; out_data.id = htonl(USRP2_CTRL_ID_READ_FROM_THIS_AUX_ADC_BRO); - out_data.data.aux_args.dir = spi_dev_to_otw(unit); + out_data.data.aux_args.dir = unit_to_otw(unit); out_data.data.aux_args.which = which; //send and recv diff --git a/host/lib/usrp/usrp2/fw_common.h b/host/lib/usrp/usrp2/fw_common.h index 019f3b931..b600a2a70 100644 --- a/host/lib/usrp/usrp2/fw_common.h +++ b/host/lib/usrp/usrp2/fw_common.h @@ -110,10 +110,11 @@ typedef struct{ } dboard_ids; struct { _SINS_ uint8_t dev; - _SINS_ uint8_t edge; + _SINS_ uint8_t miso_edge; + _SINS_ uint8_t mosi_edge; _SINS_ uint8_t readback; - _SINS_ uint8_t bytes; - _SINS_ uint8_t data[sizeof(_SINS_ uint32_t)]; + _SINS_ uint32_t data; + _SINS_ uint8_t num_bits; } spi_args; struct { _SINS_ uint8_t addr; -- cgit v1.2.3 From fdd80e548dcda3e4ee0c022d7d04b5ba581c5ad9 Mon Sep 17 00:00:00 2001 From: Josh Blum Date: Fri, 9 Apr 2010 08:13:19 -0700 Subject: added python+cheetah build requirement, generating vrt.cpp --- host/CMakeLists.txt | 20 +- host/lib/CMakeLists.txt | 46 +++- host/lib/transport/gen_vrt.py | 3 +- host/lib/transport/vrt.cpp | 549 ------------------------------------------ 4 files changed, 57 insertions(+), 561 deletions(-) delete mode 100644 host/lib/transport/vrt.cpp (limited to 'host/lib/CMakeLists.txt') diff --git a/host/CMakeLists.txt b/host/CMakeLists.txt index baae90861..6334b44ff 100644 --- a/host/CMakeLists.txt +++ b/host/CMakeLists.txt @@ -25,8 +25,8 @@ ENABLE_TESTING() SET(CPACK_PACKAGE_VERSION_MAJOR 0) SET(CPACK_PACKAGE_VERSION_MINOR 0) SET(CPACK_PACKAGE_VERSION_PATCH 0) -SET(CPACK_RESOURCE_FILE_README ${CMAKE_SOURCE_DIR}/README) -SET(CPACK_RESOURCE_FILE_LICENSE ${CMAKE_SOURCE_DIR}/LICENSE) +SET(CPACK_RESOURCE_FILE_README ${CMAKE_CURRENT_SOURCE_DIR}/README) +SET(CPACK_RESOURCE_FILE_LICENSE ${CMAKE_CURRENT_SOURCE_DIR}/LICENSE) INCLUDE(CPack) #include after setting vars ######################################################################## @@ -42,18 +42,18 @@ MESSAGE(STATUS "Using install prefix: ${CMAKE_INSTALL_PREFIX}") ######################################################################## # Local Include Dir ######################################################################## -INCLUDE_DIRECTORIES(${CMAKE_SOURCE_DIR}/include) +INCLUDE_DIRECTORIES(${CMAKE_CURRENT_SOURCE_DIR}/include) ######################################################################## # Optional Compiler Flags ######################################################################## INCLUDE(CheckCXXCompilerFlag) -FUNCTION(UHD_ADD_OPTIONAL_CXX_COMPILER_FLAG flag have) +MACRO(UHD_ADD_OPTIONAL_CXX_COMPILER_FLAG flag have) CHECK_CXX_COMPILER_FLAG(${flag} ${have}) IF(${have}) ADD_DEFINITIONS(${flag}) ENDIF(${have}) -ENDFUNCTION(UHD_ADD_OPTIONAL_CXX_COMPILER_FLAG) +ENDMACRO(UHD_ADD_OPTIONAL_CXX_COMPILER_FLAG) IF(UNIX) UHD_ADD_OPTIONAL_CXX_COMPILER_FLAG(-Wall HAVE_WALL) @@ -114,7 +114,7 @@ ADD_CUSTOM_TARGET(uninstall # Create Pkg Config File ######################################################################## CONFIGURE_FILE( - ${CMAKE_SOURCE_DIR}/uhd.pc.in + ${CMAKE_CURRENT_SOURCE_DIR}/uhd.pc.in ${CMAKE_CURRENT_BINARY_DIR}/uhd.pc @ONLY) @@ -131,7 +131,7 @@ INCLUDE(FindDoxygen) IF(DOXYGEN_FOUND) SET(CMAKE_CURRENT_BINARY_DIR_DOXYGEN ${CMAKE_CURRENT_BINARY_DIR}/doxygen) CONFIGURE_FILE( - ${CMAKE_SOURCE_DIR}/Doxyfile.in + ${CMAKE_CURRENT_SOURCE_DIR}/Doxyfile.in ${CMAKE_CURRENT_BINARY_DIR}/Doxyfile @ONLY) ADD_CUSTOM_COMMAND(OUTPUT ${CMAKE_CURRENT_BINARY_DIR_DOXYGEN} @@ -143,9 +143,9 @@ IF(DOXYGEN_FOUND) ENDIF(DOXYGEN_FOUND) INSTALL(FILES - ${CMAKE_SOURCE_DIR}/README - ${CMAKE_SOURCE_DIR}/LICENSE - ${CMAKE_SOURCE_DIR}/AUTHORS + ${CMAKE_CURRENT_SOURCE_DIR}/README + ${CMAKE_CURRENT_SOURCE_DIR}/LICENSE + ${CMAKE_CURRENT_SOURCE_DIR}/AUTHORS DESTINATION ${PKG_DOC_DIR} ) diff --git a/host/lib/CMakeLists.txt b/host/lib/CMakeLists.txt index f21a4a491..87e35f412 100644 --- a/host/lib/CMakeLists.txt +++ b/host/lib/CMakeLists.txt @@ -15,6 +15,33 @@ # along with this program. If not, see . # + +######################################################################## +# Setup Python +######################################################################## +INCLUDE(FindPythonInterp) + +MACRO(PYTHON_CHECK_MODULE module have) + MESSAGE(STATUS "Checking for python module ${module}") + EXECUTE_PROCESS( + COMMAND ${PYTHON_EXECUTABLE} -c "import ${module}" + RESULT_VARIABLE ${have} + ) + IF(${have} EQUAL 0) + MESSAGE(STATUS "Checking for python module ${module} - found") + SET(${have} TRUE) + ELSE(${have} EQUAL 0) + MESSAGE(STATUS "Checking for python module ${module} - not found") + SET(${have} FALSE) + ENDIF(${have} EQUAL 0) +ENDMACRO(PYTHON_CHECK_MODULE) + +PYTHON_CHECK_MODULE("Cheetah" HAVE_PYTHON_MODULE_CHEETAH) + +IF(NOT HAVE_PYTHON_MODULE_CHEETAH) + MESSAGE(FATAL_ERROR "Error: Cheetah Templates needed for pre-build generation.") +ENDIF(NOT HAVE_PYTHON_MODULE_CHEETAH) + ######################################################################## # Create a list of libuhd sources ######################################################################## @@ -26,7 +53,6 @@ SET(libuhd_sources wax.cpp transport/if_addrs.cpp transport/udp_simple.cpp - transport/vrt.cpp usrp/dboard/db_basic_and_lf.cpp usrp/dboard/db_rfx.cpp usrp/dboard_base.cpp @@ -41,6 +67,24 @@ SET(libuhd_sources usrp/usrp2/usrp2_impl.cpp ) +######################################################################## +# Generate Files +######################################################################## +MACRO(UHD_PYTHON_GEN_FILE pyfile outfile) + ADD_CUSTOM_COMMAND( + OUTPUT ${outfile} DEPENDS ${pyfile} + COMMAND ${PYTHON_EXECUTABLE} ${pyfile} ${outfile} + COMMENT "Calling ${pyfile} to generate ${outfile}" + ) +ENDMACRO(UHD_PYTHON_GEN_FILE) +UHD_PYTHON_GEN_FILE( + ${CMAKE_CURRENT_SOURCE_DIR}/transport/gen_vrt.py + ${CMAKE_CURRENT_BINARY_DIR}/transport/vrt.cpp +) +LIST(APPEND libuhd_sources + ${CMAKE_CURRENT_BINARY_DIR}/transport/vrt.cpp +) + ######################################################################## # Conditionally add the udp sources ######################################################################## diff --git a/host/lib/transport/gen_vrt.py b/host/lib/transport/gen_vrt.py index bc6635d78..0f961efc2 100755 --- a/host/lib/transport/gen_vrt.py +++ b/host/lib/transport/gen_vrt.py @@ -200,9 +200,10 @@ void vrt::unpack( } """ +import sys from Cheetah import Template def parse_str(_tmpl_text, **kwargs): return str(Template.Template(_tmpl_text, kwargs)) if __name__ == '__main__': from Cheetah import Template - print parse_str(TMPL_TEXT, file=__file__) + open(sys.argv[1], 'w').write(parse_str(TMPL_TEXT, file=__file__)) diff --git a/host/lib/transport/vrt.cpp b/host/lib/transport/vrt.cpp deleted file mode 100644 index 78c3cf2cb..000000000 --- a/host/lib/transport/vrt.cpp +++ /dev/null @@ -1,549 +0,0 @@ - - - -/*********************************************************************** - * This file was generated by gen_vrt.py on 04/08/10 10:55:26 - **********************************************************************/ - -#include -#include //endianness conversion -#include - -using namespace uhd; -using namespace uhd::transport; - -void vrt::pack( - const tx_metadata_t &metadata, //input - boost::uint32_t *header_buff, //output - size_t &num_header_words32, //output - size_t num_payload_words32, //input - size_t &num_packet_words32, //output - size_t packet_count, //input - double tick_rate //input -){ - boost::uint32_t vrt_hdr_flags; - - boost::uint8_t pred = 0; - if (metadata.has_stream_id) pred |= 0x1; - if (metadata.has_time_spec) pred |= 0xc; - - switch(pred){ - case 0: - num_header_words32 = 1; - num_packet_words32 = 1 + num_payload_words32; - vrt_hdr_flags = 0x0; - break; - case 1: - header_buff[1] = htonl(metadata.stream_id); - num_header_words32 = 2; - num_packet_words32 = 2 + num_payload_words32; - vrt_hdr_flags = 0x10000000; - break; - case 2: - header_buff[1] = htonl(0); - header_buff[2] = htonl(0); - num_header_words32 = 3; - num_packet_words32 = 3 + num_payload_words32; - vrt_hdr_flags = 0x8000000; - break; - case 3: - header_buff[1] = htonl(metadata.stream_id); - header_buff[2] = htonl(0); - header_buff[3] = htonl(0); - num_header_words32 = 4; - num_packet_words32 = 4 + num_payload_words32; - vrt_hdr_flags = 0x18000000; - break; - case 4: - header_buff[1] = htonl(metadata.time_spec.secs); - num_header_words32 = 2; - num_packet_words32 = 2 + num_payload_words32; - vrt_hdr_flags = 0xc00000; - break; - case 5: - header_buff[1] = htonl(metadata.stream_id); - header_buff[2] = htonl(metadata.time_spec.secs); - num_header_words32 = 3; - num_packet_words32 = 3 + num_payload_words32; - vrt_hdr_flags = 0x10c00000; - break; - case 6: - header_buff[1] = htonl(0); - header_buff[2] = htonl(0); - header_buff[3] = htonl(metadata.time_spec.secs); - num_header_words32 = 4; - num_packet_words32 = 4 + num_payload_words32; - vrt_hdr_flags = 0x8c00000; - break; - case 7: - header_buff[1] = htonl(metadata.stream_id); - header_buff[2] = htonl(0); - header_buff[3] = htonl(0); - header_buff[4] = htonl(metadata.time_spec.secs); - num_header_words32 = 5; - num_packet_words32 = 5 + num_payload_words32; - vrt_hdr_flags = 0x18c00000; - break; - case 8: - header_buff[1] = htonl(0); - header_buff[2] = htonl(metadata.time_spec.get_ticks(tick_rate)); - num_header_words32 = 3; - num_packet_words32 = 3 + num_payload_words32; - vrt_hdr_flags = 0x100000; - break; - case 9: - header_buff[1] = htonl(metadata.stream_id); - header_buff[2] = htonl(0); - header_buff[3] = htonl(metadata.time_spec.get_ticks(tick_rate)); - num_header_words32 = 4; - num_packet_words32 = 4 + num_payload_words32; - vrt_hdr_flags = 0x10100000; - break; - case 10: - header_buff[1] = htonl(0); - header_buff[2] = htonl(0); - header_buff[3] = htonl(0); - header_buff[4] = htonl(metadata.time_spec.get_ticks(tick_rate)); - num_header_words32 = 5; - num_packet_words32 = 5 + num_payload_words32; - vrt_hdr_flags = 0x8100000; - break; - case 11: - header_buff[1] = htonl(metadata.stream_id); - header_buff[2] = htonl(0); - header_buff[3] = htonl(0); - header_buff[4] = htonl(0); - header_buff[5] = htonl(metadata.time_spec.get_ticks(tick_rate)); - num_header_words32 = 6; - num_packet_words32 = 6 + num_payload_words32; - vrt_hdr_flags = 0x18100000; - break; - case 12: - header_buff[1] = htonl(metadata.time_spec.secs); - header_buff[2] = htonl(0); - header_buff[3] = htonl(metadata.time_spec.get_ticks(tick_rate)); - num_header_words32 = 4; - num_packet_words32 = 4 + num_payload_words32; - vrt_hdr_flags = 0xd00000; - break; - case 13: - header_buff[1] = htonl(metadata.stream_id); - header_buff[2] = htonl(metadata.time_spec.secs); - header_buff[3] = htonl(0); - header_buff[4] = htonl(metadata.time_spec.get_ticks(tick_rate)); - num_header_words32 = 5; - num_packet_words32 = 5 + num_payload_words32; - vrt_hdr_flags = 0x10d00000; - break; - case 14: - header_buff[1] = htonl(0); - header_buff[2] = htonl(0); - header_buff[3] = htonl(metadata.time_spec.secs); - header_buff[4] = htonl(0); - header_buff[5] = htonl(metadata.time_spec.get_ticks(tick_rate)); - num_header_words32 = 6; - num_packet_words32 = 6 + num_payload_words32; - vrt_hdr_flags = 0x8d00000; - break; - case 15: - header_buff[1] = htonl(metadata.stream_id); - header_buff[2] = htonl(0); - header_buff[3] = htonl(0); - header_buff[4] = htonl(metadata.time_spec.secs); - header_buff[5] = htonl(0); - header_buff[6] = htonl(metadata.time_spec.get_ticks(tick_rate)); - num_header_words32 = 7; - num_packet_words32 = 7 + num_payload_words32; - vrt_hdr_flags = 0x18d00000; - break; - case 16: - num_header_words32 = 1; - num_packet_words32 = 2 + num_payload_words32; - vrt_hdr_flags = 0x4000000; - break; - case 17: - header_buff[1] = htonl(metadata.stream_id); - num_header_words32 = 2; - num_packet_words32 = 3 + num_payload_words32; - vrt_hdr_flags = 0x14000000; - break; - case 18: - header_buff[1] = htonl(0); - header_buff[2] = htonl(0); - num_header_words32 = 3; - num_packet_words32 = 4 + num_payload_words32; - vrt_hdr_flags = 0xc000000; - break; - case 19: - header_buff[1] = htonl(metadata.stream_id); - header_buff[2] = htonl(0); - header_buff[3] = htonl(0); - num_header_words32 = 4; - num_packet_words32 = 5 + num_payload_words32; - vrt_hdr_flags = 0x1c000000; - break; - case 20: - header_buff[1] = htonl(metadata.time_spec.secs); - num_header_words32 = 2; - num_packet_words32 = 3 + num_payload_words32; - vrt_hdr_flags = 0x4c00000; - break; - case 21: - header_buff[1] = htonl(metadata.stream_id); - header_buff[2] = htonl(metadata.time_spec.secs); - num_header_words32 = 3; - num_packet_words32 = 4 + num_payload_words32; - vrt_hdr_flags = 0x14c00000; - break; - case 22: - header_buff[1] = htonl(0); - header_buff[2] = htonl(0); - header_buff[3] = htonl(metadata.time_spec.secs); - num_header_words32 = 4; - num_packet_words32 = 5 + num_payload_words32; - vrt_hdr_flags = 0xcc00000; - break; - case 23: - header_buff[1] = htonl(metadata.stream_id); - header_buff[2] = htonl(0); - header_buff[3] = htonl(0); - header_buff[4] = htonl(metadata.time_spec.secs); - num_header_words32 = 5; - num_packet_words32 = 6 + num_payload_words32; - vrt_hdr_flags = 0x1cc00000; - break; - case 24: - header_buff[1] = htonl(0); - header_buff[2] = htonl(metadata.time_spec.get_ticks(tick_rate)); - num_header_words32 = 3; - num_packet_words32 = 4 + num_payload_words32; - vrt_hdr_flags = 0x4100000; - break; - case 25: - header_buff[1] = htonl(metadata.stream_id); - header_buff[2] = htonl(0); - header_buff[3] = htonl(metadata.time_spec.get_ticks(tick_rate)); - num_header_words32 = 4; - num_packet_words32 = 5 + num_payload_words32; - vrt_hdr_flags = 0x14100000; - break; - case 26: - header_buff[1] = htonl(0); - header_buff[2] = htonl(0); - header_buff[3] = htonl(0); - header_buff[4] = htonl(metadata.time_spec.get_ticks(tick_rate)); - num_header_words32 = 5; - num_packet_words32 = 6 + num_payload_words32; - vrt_hdr_flags = 0xc100000; - break; - case 27: - header_buff[1] = htonl(metadata.stream_id); - header_buff[2] = htonl(0); - header_buff[3] = htonl(0); - header_buff[4] = htonl(0); - header_buff[5] = htonl(metadata.time_spec.get_ticks(tick_rate)); - num_header_words32 = 6; - num_packet_words32 = 7 + num_payload_words32; - vrt_hdr_flags = 0x1c100000; - break; - case 28: - header_buff[1] = htonl(metadata.time_spec.secs); - header_buff[2] = htonl(0); - header_buff[3] = htonl(metadata.time_spec.get_ticks(tick_rate)); - num_header_words32 = 4; - num_packet_words32 = 5 + num_payload_words32; - vrt_hdr_flags = 0x4d00000; - break; - case 29: - header_buff[1] = htonl(metadata.stream_id); - header_buff[2] = htonl(metadata.time_spec.secs); - header_buff[3] = htonl(0); - header_buff[4] = htonl(metadata.time_spec.get_ticks(tick_rate)); - num_header_words32 = 5; - num_packet_words32 = 6 + num_payload_words32; - vrt_hdr_flags = 0x14d00000; - break; - case 30: - header_buff[1] = htonl(0); - header_buff[2] = htonl(0); - header_buff[3] = htonl(metadata.time_spec.secs); - header_buff[4] = htonl(0); - header_buff[5] = htonl(metadata.time_spec.get_ticks(tick_rate)); - num_header_words32 = 6; - num_packet_words32 = 7 + num_payload_words32; - vrt_hdr_flags = 0xcd00000; - break; - case 31: - header_buff[1] = htonl(metadata.stream_id); - header_buff[2] = htonl(0); - header_buff[3] = htonl(0); - header_buff[4] = htonl(metadata.time_spec.secs); - header_buff[5] = htonl(0); - header_buff[6] = htonl(metadata.time_spec.get_ticks(tick_rate)); - num_header_words32 = 7; - num_packet_words32 = 8 + num_payload_words32; - vrt_hdr_flags = 0x1cd00000; - break; - } - - //set the burst flags - if (metadata.start_of_burst) vrt_hdr_flags |= 0x2000000; - if (metadata.end_of_burst) vrt_hdr_flags |= 0x1000000; - - //fill in complete header word - header_buff[0] = htonl(vrt_hdr_flags | - ((packet_count & 0xf) << 16) | - (num_packet_words32 & 0xffff) - ); -} - -void vrt::unpack( - rx_metadata_t &metadata, //output - const boost::uint32_t *header_buff, //input - size_t &num_header_words32, //output - size_t &num_payload_words32, //output - size_t num_packet_words32, //input - size_t &packet_count, //output - double tick_rate //input -){ - //clear the metadata - metadata = rx_metadata_t(); - - //extract vrt header - boost::uint32_t vrt_hdr_word = ntohl(header_buff[0]); - size_t packet_words32 = vrt_hdr_word & 0xffff; - packet_count = (vrt_hdr_word >> 16) & 0xf; - - //failure cases - if (packet_words32 == 0 or num_packet_words32 < packet_words32) - throw std::runtime_error("bad vrt header or packet fragment"); - if (vrt_hdr_word & (0x7 << 29)) - throw std::runtime_error("unsupported vrt packet type"); - - boost::uint8_t pred = 0; - if(vrt_hdr_word & 0x10000000) pred |= 0x1; - if(vrt_hdr_word & 0x8000000) pred |= 0x2; - if(vrt_hdr_word & 0xc00000) pred |= 0x4; - if(vrt_hdr_word & 0x300000) pred |= 0x8; - if(vrt_hdr_word & 0x4000000) pred |= 0x10; - - switch(pred){ - case 0: - num_header_words32 = 1; - num_payload_words32 = packet_words32 - 1; - break; - case 1: - metadata.has_stream_id = true; - metadata.stream_id = ntohl(header_buff[1]); - num_header_words32 = 2; - num_payload_words32 = packet_words32 - 2; - break; - case 2: - num_header_words32 = 3; - num_payload_words32 = packet_words32 - 3; - break; - case 3: - metadata.has_stream_id = true; - metadata.stream_id = ntohl(header_buff[1]); - num_header_words32 = 4; - num_payload_words32 = packet_words32 - 4; - break; - case 4: - metadata.has_time_spec = true; - metadata.time_spec.secs = ntohl(header_buff[1]); - num_header_words32 = 2; - num_payload_words32 = packet_words32 - 2; - break; - case 5: - metadata.has_stream_id = true; - metadata.stream_id = ntohl(header_buff[1]); - metadata.has_time_spec = true; - metadata.time_spec.secs = ntohl(header_buff[2]); - num_header_words32 = 3; - num_payload_words32 = packet_words32 - 3; - break; - case 6: - metadata.has_time_spec = true; - metadata.time_spec.secs = ntohl(header_buff[3]); - num_header_words32 = 4; - num_payload_words32 = packet_words32 - 4; - break; - case 7: - metadata.has_stream_id = true; - metadata.stream_id = ntohl(header_buff[1]); - metadata.has_time_spec = true; - metadata.time_spec.secs = ntohl(header_buff[4]); - num_header_words32 = 5; - num_payload_words32 = packet_words32 - 5; - break; - case 8: - metadata.has_time_spec = true; - metadata.time_spec.set_ticks(ntohl(header_buff[2]), tick_rate); - num_header_words32 = 3; - num_payload_words32 = packet_words32 - 3; - break; - case 9: - metadata.has_stream_id = true; - metadata.stream_id = ntohl(header_buff[1]); - metadata.has_time_spec = true; - metadata.time_spec.set_ticks(ntohl(header_buff[3]), tick_rate); - num_header_words32 = 4; - num_payload_words32 = packet_words32 - 4; - break; - case 10: - metadata.has_time_spec = true; - metadata.time_spec.set_ticks(ntohl(header_buff[4]), tick_rate); - num_header_words32 = 5; - num_payload_words32 = packet_words32 - 5; - break; - case 11: - metadata.has_stream_id = true; - metadata.stream_id = ntohl(header_buff[1]); - metadata.has_time_spec = true; - metadata.time_spec.set_ticks(ntohl(header_buff[5]), tick_rate); - num_header_words32 = 6; - num_payload_words32 = packet_words32 - 6; - break; - case 12: - metadata.has_time_spec = true; - metadata.time_spec.secs = ntohl(header_buff[1]); - metadata.time_spec.set_ticks(ntohl(header_buff[3]), tick_rate); - num_header_words32 = 4; - num_payload_words32 = packet_words32 - 4; - break; - case 13: - metadata.has_stream_id = true; - metadata.stream_id = ntohl(header_buff[1]); - metadata.has_time_spec = true; - metadata.time_spec.secs = ntohl(header_buff[2]); - metadata.time_spec.set_ticks(ntohl(header_buff[4]), tick_rate); - num_header_words32 = 5; - num_payload_words32 = packet_words32 - 5; - break; - case 14: - metadata.has_time_spec = true; - metadata.time_spec.secs = ntohl(header_buff[3]); - metadata.time_spec.set_ticks(ntohl(header_buff[5]), tick_rate); - num_header_words32 = 6; - num_payload_words32 = packet_words32 - 6; - break; - case 15: - metadata.has_stream_id = true; - metadata.stream_id = ntohl(header_buff[1]); - metadata.has_time_spec = true; - metadata.time_spec.secs = ntohl(header_buff[4]); - metadata.time_spec.set_ticks(ntohl(header_buff[6]), tick_rate); - num_header_words32 = 7; - num_payload_words32 = packet_words32 - 7; - break; - case 16: - num_header_words32 = 1; - num_payload_words32 = packet_words32 - 2; - break; - case 17: - metadata.has_stream_id = true; - metadata.stream_id = ntohl(header_buff[1]); - num_header_words32 = 2; - num_payload_words32 = packet_words32 - 3; - break; - case 18: - num_header_words32 = 3; - num_payload_words32 = packet_words32 - 4; - break; - case 19: - metadata.has_stream_id = true; - metadata.stream_id = ntohl(header_buff[1]); - num_header_words32 = 4; - num_payload_words32 = packet_words32 - 5; - break; - case 20: - metadata.has_time_spec = true; - metadata.time_spec.secs = ntohl(header_buff[1]); - num_header_words32 = 2; - num_payload_words32 = packet_words32 - 3; - break; - case 21: - metadata.has_stream_id = true; - metadata.stream_id = ntohl(header_buff[1]); - metadata.has_time_spec = true; - metadata.time_spec.secs = ntohl(header_buff[2]); - num_header_words32 = 3; - num_payload_words32 = packet_words32 - 4; - break; - case 22: - metadata.has_time_spec = true; - metadata.time_spec.secs = ntohl(header_buff[3]); - num_header_words32 = 4; - num_payload_words32 = packet_words32 - 5; - break; - case 23: - metadata.has_stream_id = true; - metadata.stream_id = ntohl(header_buff[1]); - metadata.has_time_spec = true; - metadata.time_spec.secs = ntohl(header_buff[4]); - num_header_words32 = 5; - num_payload_words32 = packet_words32 - 6; - break; - case 24: - metadata.has_time_spec = true; - metadata.time_spec.set_ticks(ntohl(header_buff[2]), tick_rate); - num_header_words32 = 3; - num_payload_words32 = packet_words32 - 4; - break; - case 25: - metadata.has_stream_id = true; - metadata.stream_id = ntohl(header_buff[1]); - metadata.has_time_spec = true; - metadata.time_spec.set_ticks(ntohl(header_buff[3]), tick_rate); - num_header_words32 = 4; - num_payload_words32 = packet_words32 - 5; - break; - case 26: - metadata.has_time_spec = true; - metadata.time_spec.set_ticks(ntohl(header_buff[4]), tick_rate); - num_header_words32 = 5; - num_payload_words32 = packet_words32 - 6; - break; - case 27: - metadata.has_stream_id = true; - metadata.stream_id = ntohl(header_buff[1]); - metadata.has_time_spec = true; - metadata.time_spec.set_ticks(ntohl(header_buff[5]), tick_rate); - num_header_words32 = 6; - num_payload_words32 = packet_words32 - 7; - break; - case 28: - metadata.has_time_spec = true; - metadata.time_spec.secs = ntohl(header_buff[1]); - metadata.time_spec.set_ticks(ntohl(header_buff[3]), tick_rate); - num_header_words32 = 4; - num_payload_words32 = packet_words32 - 5; - break; - case 29: - metadata.has_stream_id = true; - metadata.stream_id = ntohl(header_buff[1]); - metadata.has_time_spec = true; - metadata.time_spec.secs = ntohl(header_buff[2]); - metadata.time_spec.set_ticks(ntohl(header_buff[4]), tick_rate); - num_header_words32 = 5; - num_payload_words32 = packet_words32 - 6; - break; - case 30: - metadata.has_time_spec = true; - metadata.time_spec.secs = ntohl(header_buff[3]); - metadata.time_spec.set_ticks(ntohl(header_buff[5]), tick_rate); - num_header_words32 = 6; - num_payload_words32 = packet_words32 - 7; - break; - case 31: - metadata.has_stream_id = true; - metadata.stream_id = ntohl(header_buff[1]); - metadata.has_time_spec = true; - metadata.time_spec.secs = ntohl(header_buff[4]); - metadata.time_spec.set_ticks(ntohl(header_buff[6]), tick_rate); - num_header_words32 = 7; - num_payload_words32 = packet_words32 - 8; - break; - } -} - -- cgit v1.2.3 From 01cb9070c7b136d44d3de36d102d302d2f2de55f Mon Sep 17 00:00:00 2001 From: Josh Blum Date: Fri, 9 Apr 2010 14:01:10 -0700 Subject: generate the register file, added lib include dir --- host/lib/CMakeLists.txt | 22 +++- host/lib/include/gen_adf4360_regs.py | 169 ++++++++++++++++++++++++++++ host/lib/usrp/dboard/adf4360_regs.hpp | 185 ------------------------------- host/lib/usrp/dboard/gen_adf4360_regs.py | 168 ---------------------------- 4 files changed, 186 insertions(+), 358 deletions(-) create mode 100755 host/lib/include/gen_adf4360_regs.py delete mode 100644 host/lib/usrp/dboard/adf4360_regs.hpp delete mode 100755 host/lib/usrp/dboard/gen_adf4360_regs.py (limited to 'host/lib/CMakeLists.txt') diff --git a/host/lib/CMakeLists.txt b/host/lib/CMakeLists.txt index 87e35f412..dc4986f8c 100644 --- a/host/lib/CMakeLists.txt +++ b/host/lib/CMakeLists.txt @@ -16,6 +16,14 @@ # +######################################################################## +# Library Includes (not part of API) +######################################################################## +INCLUDE_DIRECTORIES( + ${CMAKE_CURRENT_SOURCE_DIR}/include + ${CMAKE_CURRENT_BINARY_DIR}/include #generated includes +) + ######################################################################## # Setup Python ######################################################################## @@ -70,19 +78,23 @@ SET(libuhd_sources ######################################################################## # Generate Files ######################################################################## -MACRO(UHD_PYTHON_GEN_FILE pyfile outfile) +MACRO(UHD_PYTHON_GEN_SOURCE_FILE pyfile outfile) ADD_CUSTOM_COMMAND( OUTPUT ${outfile} DEPENDS ${pyfile} COMMAND ${PYTHON_EXECUTABLE} ${pyfile} ${outfile} COMMENT "Calling ${pyfile} to generate ${outfile}" ) -ENDMACRO(UHD_PYTHON_GEN_FILE) -UHD_PYTHON_GEN_FILE( + LIST(APPEND libuhd_sources ${outfile}) +ENDMACRO(UHD_PYTHON_GEN_SOURCE_FILE) + +UHD_PYTHON_GEN_SOURCE_FILE( ${CMAKE_CURRENT_SOURCE_DIR}/transport/gen_vrt.py ${CMAKE_CURRENT_BINARY_DIR}/transport/vrt.cpp ) -LIST(APPEND libuhd_sources - ${CMAKE_CURRENT_BINARY_DIR}/transport/vrt.cpp + +UHD_PYTHON_GEN_SOURCE_FILE( + ${CMAKE_CURRENT_SOURCE_DIR}/include/gen_adf4360_regs.py + ${CMAKE_CURRENT_BINARY_DIR}/include/adf4360_regs.hpp ) ######################################################################## diff --git a/host/lib/include/gen_adf4360_regs.py b/host/lib/include/gen_adf4360_regs.py new file mode 100755 index 000000000..702c3060f --- /dev/null +++ b/host/lib/include/gen_adf4360_regs.py @@ -0,0 +1,169 @@ +#!/usr/bin/env python +# +# Copyright 2008,2009 Free Software Foundation, Inc. +# +# This file is part of GNU Radio +# +# GNU Radio is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either asversion 3, or (at your option) +# any later version. +# +# GNU Radio is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with GNU Radio; see the file COPYING. If not, write to +# the Free Software Foundation, Inc., 51 Franklin Street, +# Boston, MA 02110-1301, USA. + +import re +import sys +from Cheetah.Template import Template +def parse_tmpl(_tmpl_text, **kwargs): + return str(Template(_tmpl_text, kwargs)) + +######################################################################## +# Template for raw text data describing registers +# name addr[bit range inclusive] default optional enums +######################################################################## +REGS_DATA_TMPL="""\ +######################################################################## +## address 0 +######################################################################## +core_power_level 0[2:3] 0 5ma, 10ma, 15ma, 20ma +counter_reset 0[4] 0 normal, reset +muxout_control 0[5:7] 0 3state, dld, ndiv, dvdd, rdiv, nchan_od_ld, sdo, dgnd +phase_detector_polarity 0[8] 0 neg, pos +cp_three_state 0[9] 0 normal, 3state +cp_gain_0 0[10] 0 set1, set2 +mute_till_ld 0[11] 0 dis, enb +output_power_level 0[12:13] 0 3_5ma, 5_0ma, 7_5ma, 11_0ma +#set $current_setting_enums = "0_31, 0_62, 0_93, 1_25, 1_56, 1_87, 2_18, 2_50" +current_setting1 0[14:16] 0 $current_setting_enums +current_setting2 0[17:19] 0 $current_setting_enums +power_down 0[20:21] 0 normal_op=0, async_pd=1, sync_pd=3 +prescaler_value 0[22:23] 0 8_9, 16_17, 32_33 +######################################################################## +## address 2 +######################################################################## +a_counter 2[2:6] 0 +b_counter 2[8:20] 0 +cp_gain_1 2[21] 0 set1, set2 +divide_by_2_output 2[22] 0 fund, div2 +divide_by_2_prescaler 2[23] 0 fund, div2 +######################################################################## +## address 1 +######################################################################## +r_counter 1[2:15] 0 +ablpw 1[16:17] 0 3_0ns, 1_3ns, 6_0ns +lock_detect_precision 1[18] 0 3cycles, 5cycles +test_mode_bit 1[19] 0 +band_select_clock_div 1[20:21] 0 1, 2, 4, 8 +""" + +######################################################################## +# Header and Source templates below +######################################################################## +HEADER_TEXT=""" +#import time + +/*********************************************************************** + * This file was generated by $file on $time.strftime("%c") + **********************************************************************/ + +\#ifndef INCLUDED_ADF4360_REGS_HPP +\#define INCLUDED_ADF4360_REGS_HPP + +\#include + +struct adf4360_regs_t{ +#for $reg in $regs + #if $reg.get_enums() + enum $(reg.get_name())_t{ + #for $i, $enum in enumerate($reg.get_enums()) + #set $end_comma = ',' if $i < len($reg.get_enums())-1 else '' + $(reg.get_name().upper())_$(enum[0].upper()) = $enum[1]$end_comma + #end for + } $reg.get_name(); + #else + boost::$reg.get_stdint_type() $reg.get_name(); + #end if +#end for + + adf4360_regs_t(void){ +#for $reg in $regs + $reg.get_name() = $reg.get_default(); +#end for + } + + enum addr_t{ + ADDR_CONTROL = 0, + ADDR_NCOUNTER = 2, + ADDR_RCOUNTER = 1 + }; + + boost::uint32_t get_reg(addr_t addr){ + boost::uint32_t reg = addr & 0x3; + switch(addr){ + #for $addr in (0, 1, 2) + case $addr: + #for $reg in filter(lambda r: r.get_addr() == addr, $regs) + reg |= (boost::uint32_t($reg.get_name()) & $reg.get_mask()) << $reg.get_shift(); + #end for + break; + #end for + } + return reg; + } +}; + +\#endif /* INCLUDED_ADF4360_REGS_HPP */ +""" + +class reg: + def __init__(self, reg_des): + x = re.match('^(\w*)\s*(\w*)\[(.*)\]\s*(\w*)\s*(.*)$', reg_des) + name, addr, bit_range, default, enums = x.groups() + + #store variables + self._name = name + self._addr = int(addr) + if ':' in bit_range: self._addr_spec = map(int, bit_range.split(':')) + else: self._addr_spec = int(bit_range), int(bit_range) + self._default = int(default) + + #extract enum + self._enums = list() + if enums: + enum_val = 0 + for enum_str in map(str.strip, enums.split(',')): + if '=' in enum_str: + enum_name, enum_val = enum_str.split('=') + enum_val = int(enum_val) + else: enum_name = enum_str + self._enums.append((enum_name, enum_val)) + enum_val += 1 + + def get_addr(self): return self._addr + def get_enums(self): return self._enums + def get_name(self): return self._name + def get_default(self): + for key, val in self.get_enums(): + if val == self._default: return str.upper('%s_%s'%(self.get_name(), key)) + return self._default + def get_stdint_type(self): + if self.get_bit_width() <= 8: return 'uint8_t' + if self.get_bit_width() <= 16: return 'uint16_t' + if self.get_bit_width() <= 32: return 'uint32_t' + if self.get_bit_width() <= 64: return 'uint64_t' + raise Exception, 'too damn big' + def get_shift(self): return self._addr_spec[0] + def get_mask(self): return hex(int('1'*self.get_bit_width(), 2)) + def get_bit_width(self): return self._addr_spec[1] - self._addr_spec[0] + 1 + +if __name__ == '__main__': + regs = map(reg, parse_tmpl(REGS_DATA_TMPL).splitlines()) + open(sys.argv[1], 'w').write(parse_tmpl(HEADER_TEXT, regs=regs, file=__file__)) diff --git a/host/lib/usrp/dboard/adf4360_regs.hpp b/host/lib/usrp/dboard/adf4360_regs.hpp deleted file mode 100644 index 309ff50e9..000000000 --- a/host/lib/usrp/dboard/adf4360_regs.hpp +++ /dev/null @@ -1,185 +0,0 @@ - - -/*********************************************************************** - * This file was generated by gen_adf4360_regs.py on Tue Apr 6 18:40:51 2010 - **********************************************************************/ - -#ifndef INCLUDED_ADF4360_REGS_HPP -#define INCLUDED_ADF4360_REGS_HPP - -#include - -struct adf4360_regs_t{ - enum core_power_level_t{ - CORE_POWER_LEVEL_5MA = 0, - CORE_POWER_LEVEL_10MA = 1, - CORE_POWER_LEVEL_15MA = 2, - CORE_POWER_LEVEL_20MA = 3 - } core_power_level; - enum counter_reset_t{ - COUNTER_RESET_NORMAL = 0, - COUNTER_RESET_RESET = 1 - } counter_reset; - enum muxout_control_t{ - MUXOUT_CONTROL_3STATE = 0, - MUXOUT_CONTROL_DLD = 1, - MUXOUT_CONTROL_NDIV = 2, - MUXOUT_CONTROL_DVDD = 3, - MUXOUT_CONTROL_RDIV = 4, - MUXOUT_CONTROL_NCHAN_OD_LD = 5, - MUXOUT_CONTROL_SDO = 6, - MUXOUT_CONTROL_DGND = 7 - } muxout_control; - enum phase_detector_polarity_t{ - PHASE_DETECTOR_POLARITY_NEG = 0, - PHASE_DETECTOR_POLARITY_POS = 1 - } phase_detector_polarity; - enum cp_three_state_t{ - CP_THREE_STATE_NORMAL = 0, - CP_THREE_STATE_3STATE = 1 - } cp_three_state; - enum cp_gain_0_t{ - CP_GAIN_0_SET1 = 0, - CP_GAIN_0_SET2 = 1 - } cp_gain_0; - enum mute_till_ld_t{ - MUTE_TILL_LD_DIS = 0, - MUTE_TILL_LD_ENB = 1 - } mute_till_ld; - enum output_power_level_t{ - OUTPUT_POWER_LEVEL_3_5MA = 0, - OUTPUT_POWER_LEVEL_5_0MA = 1, - OUTPUT_POWER_LEVEL_7_5MA = 2, - OUTPUT_POWER_LEVEL_11_0MA = 3 - } output_power_level; - enum current_setting1_t{ - CURRENT_SETTING1_0_31 = 0, - CURRENT_SETTING1_0_62 = 1, - CURRENT_SETTING1_0_93 = 2, - CURRENT_SETTING1_1_25 = 3, - CURRENT_SETTING1_1_56 = 4, - CURRENT_SETTING1_1_87 = 5, - CURRENT_SETTING1_2_18 = 6, - CURRENT_SETTING1_2_50 = 7 - } current_setting1; - enum current_setting2_t{ - CURRENT_SETTING2_0_31 = 0, - CURRENT_SETTING2_0_62 = 1, - CURRENT_SETTING2_0_93 = 2, - CURRENT_SETTING2_1_25 = 3, - CURRENT_SETTING2_1_56 = 4, - CURRENT_SETTING2_1_87 = 5, - CURRENT_SETTING2_2_18 = 6, - CURRENT_SETTING2_2_50 = 7 - } current_setting2; - enum power_down_t{ - POWER_DOWN_NORMAL_OP = 0, - POWER_DOWN_ASYNC_PD = 1, - POWER_DOWN_SYNC_PD = 3 - } power_down; - enum prescaler_value_t{ - PRESCALER_VALUE_8_9 = 0, - PRESCALER_VALUE_16_17 = 1, - PRESCALER_VALUE_32_33 = 2 - } prescaler_value; - boost::uint8_t a_counter; - boost::uint16_t b_counter; - enum cp_gain_1_t{ - CP_GAIN_1_SET1 = 0, - CP_GAIN_1_SET2 = 1 - } cp_gain_1; - enum divide_by_2_output_t{ - DIVIDE_BY_2_OUTPUT_FUND = 0, - DIVIDE_BY_2_OUTPUT_DIV2 = 1 - } divide_by_2_output; - enum divide_by_2_prescaler_t{ - DIVIDE_BY_2_PRESCALER_FUND = 0, - DIVIDE_BY_2_PRESCALER_DIV2 = 1 - } divide_by_2_prescaler; - boost::uint16_t r_counter; - enum ablpw_t{ - ABLPW_3_0NS = 0, - ABLPW_1_3NS = 1, - ABLPW_6_0NS = 2 - } ablpw; - enum lock_detect_precision_t{ - LOCK_DETECT_PRECISION_3CYCLES = 0, - LOCK_DETECT_PRECISION_5CYCLES = 1 - } lock_detect_precision; - boost::uint8_t test_mode_bit; - enum band_select_clock_div_t{ - BAND_SELECT_CLOCK_DIV_1 = 0, - BAND_SELECT_CLOCK_DIV_2 = 1, - BAND_SELECT_CLOCK_DIV_4 = 2, - BAND_SELECT_CLOCK_DIV_8 = 3 - } band_select_clock_div; - - adf4360_regs_t(void){ - core_power_level = CORE_POWER_LEVEL_5MA; - counter_reset = COUNTER_RESET_NORMAL; - muxout_control = MUXOUT_CONTROL_3STATE; - phase_detector_polarity = PHASE_DETECTOR_POLARITY_NEG; - cp_three_state = CP_THREE_STATE_NORMAL; - cp_gain_0 = CP_GAIN_0_SET1; - mute_till_ld = MUTE_TILL_LD_DIS; - output_power_level = OUTPUT_POWER_LEVEL_3_5MA; - current_setting1 = CURRENT_SETTING1_0_31; - current_setting2 = CURRENT_SETTING2_0_31; - power_down = POWER_DOWN_NORMAL_OP; - prescaler_value = PRESCALER_VALUE_8_9; - a_counter = 0; - b_counter = 0; - cp_gain_1 = CP_GAIN_1_SET1; - divide_by_2_output = DIVIDE_BY_2_OUTPUT_FUND; - divide_by_2_prescaler = DIVIDE_BY_2_PRESCALER_FUND; - r_counter = 0; - ablpw = ABLPW_3_0NS; - lock_detect_precision = LOCK_DETECT_PRECISION_3CYCLES; - test_mode_bit = 0; - band_select_clock_div = BAND_SELECT_CLOCK_DIV_1; - } - - enum addr_t{ - ADDR_CONTROL = 0, - ADDR_NCOUNTER = 2, - ADDR_RCOUNTER = 1 - }; - - boost::uint32_t get_reg(addr_t addr){ - boost::uint32_t reg = addr & 0x3; - switch(addr){ - case 0: - reg |= (boost::uint32_t(core_power_level) & 0x3) << 2; - reg |= (boost::uint32_t(counter_reset) & 0x1) << 4; - reg |= (boost::uint32_t(muxout_control) & 0x7) << 5; - reg |= (boost::uint32_t(phase_detector_polarity) & 0x1) << 8; - reg |= (boost::uint32_t(cp_three_state) & 0x1) << 9; - reg |= (boost::uint32_t(cp_gain_0) & 0x1) << 10; - reg |= (boost::uint32_t(mute_till_ld) & 0x1) << 11; - reg |= (boost::uint32_t(output_power_level) & 0x3) << 12; - reg |= (boost::uint32_t(current_setting1) & 0x7) << 14; - reg |= (boost::uint32_t(current_setting2) & 0x7) << 17; - reg |= (boost::uint32_t(power_down) & 0x3) << 20; - reg |= (boost::uint32_t(prescaler_value) & 0x3) << 22; - break; - case 1: - reg |= (boost::uint32_t(r_counter) & 0x3fff) << 2; - reg |= (boost::uint32_t(ablpw) & 0x3) << 16; - reg |= (boost::uint32_t(lock_detect_precision) & 0x1) << 18; - reg |= (boost::uint32_t(test_mode_bit) & 0x1) << 19; - reg |= (boost::uint32_t(band_select_clock_div) & 0x3) << 20; - break; - case 2: - reg |= (boost::uint32_t(a_counter) & 0x1f) << 2; - reg |= (boost::uint32_t(b_counter) & 0x1fff) << 8; - reg |= (boost::uint32_t(cp_gain_1) & 0x1) << 21; - reg |= (boost::uint32_t(divide_by_2_output) & 0x1) << 22; - reg |= (boost::uint32_t(divide_by_2_prescaler) & 0x1) << 23; - break; - } - return reg; - } -}; - -#endif /* INCLUDED_ADF4360_REGS_HPP */ - diff --git a/host/lib/usrp/dboard/gen_adf4360_regs.py b/host/lib/usrp/dboard/gen_adf4360_regs.py deleted file mode 100755 index f16e59e2a..000000000 --- a/host/lib/usrp/dboard/gen_adf4360_regs.py +++ /dev/null @@ -1,168 +0,0 @@ -#!/usr/bin/env python -# -# Copyright 2008,2009 Free Software Foundation, Inc. -# -# This file is part of GNU Radio -# -# GNU Radio is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either asversion 3, or (at your option) -# any later version. -# -# GNU Radio is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with GNU Radio; see the file COPYING. If not, write to -# the Free Software Foundation, Inc., 51 Franklin Street, -# Boston, MA 02110-1301, USA. - -import re -from Cheetah.Template import Template -def parse_tmpl(_tmpl_text, **kwargs): - return str(Template(_tmpl_text, kwargs)) - -######################################################################## -# Template for raw text data describing registers -# name addr[bit range inclusive] default optional enums -######################################################################## -REGS_DATA_TMPL="""\ -######################################################################## -## address 0 -######################################################################## -core_power_level 0[2:3] 0 5ma, 10ma, 15ma, 20ma -counter_reset 0[4] 0 normal, reset -muxout_control 0[5:7] 0 3state, dld, ndiv, dvdd, rdiv, nchan_od_ld, sdo, dgnd -phase_detector_polarity 0[8] 0 neg, pos -cp_three_state 0[9] 0 normal, 3state -cp_gain_0 0[10] 0 set1, set2 -mute_till_ld 0[11] 0 dis, enb -output_power_level 0[12:13] 0 3_5ma, 5_0ma, 7_5ma, 11_0ma -#set $current_setting_enums = "0_31, 0_62, 0_93, 1_25, 1_56, 1_87, 2_18, 2_50" -current_setting1 0[14:16] 0 $current_setting_enums -current_setting2 0[17:19] 0 $current_setting_enums -power_down 0[20:21] 0 normal_op=0, async_pd=1, sync_pd=3 -prescaler_value 0[22:23] 0 8_9, 16_17, 32_33 -######################################################################## -## address 2 -######################################################################## -a_counter 2[2:6] 0 -b_counter 2[8:20] 0 -cp_gain_1 2[21] 0 set1, set2 -divide_by_2_output 2[22] 0 fund, div2 -divide_by_2_prescaler 2[23] 0 fund, div2 -######################################################################## -## address 1 -######################################################################## -r_counter 1[2:15] 0 -ablpw 1[16:17] 0 3_0ns, 1_3ns, 6_0ns -lock_detect_precision 1[18] 0 3cycles, 5cycles -test_mode_bit 1[19] 0 -band_select_clock_div 1[20:21] 0 1, 2, 4, 8 -""" - -######################################################################## -# Header and Source templates below -######################################################################## -HEADER_TEXT=""" -#import time - -/*********************************************************************** - * This file was generated by $file on $time.strftime("%c") - **********************************************************************/ - -\#ifndef INCLUDED_ADF4360_REGS_HPP -\#define INCLUDED_ADF4360_REGS_HPP - -\#include - -struct adf4360_regs_t{ -#for $reg in $regs - #if $reg.get_enums() - enum $(reg.get_name())_t{ - #for $i, $enum in enumerate($reg.get_enums()) - #set $end_comma = ',' if $i < len($reg.get_enums())-1 else '' - $(reg.get_name().upper())_$(enum[0].upper()) = $enum[1]$end_comma - #end for - } $reg.get_name(); - #else - boost::$reg.get_stdint_type() $reg.get_name(); - #end if -#end for - - adf4360_regs_t(void){ -#for $reg in $regs - $reg.get_name() = $reg.get_default(); -#end for - } - - enum addr_t{ - ADDR_CONTROL = 0, - ADDR_NCOUNTER = 2, - ADDR_RCOUNTER = 1 - }; - - boost::uint32_t get_reg(addr_t addr){ - boost::uint32_t reg = addr & 0x3; - switch(addr){ - #for $addr in (0, 1, 2) - case $addr: - #for $reg in filter(lambda r: r.get_addr() == addr, $regs) - reg |= (boost::uint32_t($reg.get_name()) & $reg.get_mask()) << $reg.get_shift(); - #end for - break; - #end for - } - return reg; - } -}; - -\#endif /* INCLUDED_ADF4360_REGS_HPP */ -""" - -class reg: - def __init__(self, reg_des): - x = re.match('^(\w*)\s*(\w*)\[(.*)\]\s*(\w*)\s*(.*)$', reg_des) - name, addr, bit_range, default, enums = x.groups() - - #store variables - self._name = name - self._addr = int(addr) - if ':' in bit_range: self._addr_spec = map(int, bit_range.split(':')) - else: self._addr_spec = int(bit_range), int(bit_range) - self._default = int(default) - - #extract enum - self._enums = list() - if enums: - enum_val = 0 - for enum_str in map(str.strip, enums.split(',')): - if '=' in enum_str: - enum_name, enum_val = enum_str.split('=') - enum_val = int(enum_val) - else: enum_name = enum_str - self._enums.append((enum_name, enum_val)) - enum_val += 1 - - def get_addr(self): return self._addr - def get_enums(self): return self._enums - def get_name(self): return self._name - def get_default(self): - for key, val in self.get_enums(): - if val == self._default: return str.upper('%s_%s'%(self.get_name(), key)) - return self._default - def get_stdint_type(self): - if self.get_bit_width() <= 8: return 'uint8_t' - if self.get_bit_width() <= 16: return 'uint16_t' - if self.get_bit_width() <= 32: return 'uint32_t' - if self.get_bit_width() <= 64: return 'uint64_t' - raise Exception, 'too damn big' - def get_shift(self): return self._addr_spec[0] - def get_mask(self): return hex(int('1'*self.get_bit_width(), 2)) - def get_bit_width(self): return self._addr_spec[1] - self._addr_spec[0] + 1 - -if __name__ == '__main__': - regs = map(reg, parse_tmpl(REGS_DATA_TMPL).splitlines()) - print parse_tmpl(HEADER_TEXT, regs=regs, file=__file__) -- cgit v1.2.3 From fa96b25b99dbd19ac0689cab9bcab84063287ad3 Mon Sep 17 00:00:00 2001 From: Josh Blum Date: Sat, 10 Apr 2010 07:20:16 -0700 Subject: moved regs generator to ic reg maps folder, others will go there as well --- host/lib/CMakeLists.txt | 14 +-- host/lib/ic_reg_maps/gen_adf4360_regs.py | 169 +++++++++++++++++++++++++++++++ host/lib/include/gen_adf4360_regs.py | 169 ------------------------------- 3 files changed, 173 insertions(+), 179 deletions(-) create mode 100755 host/lib/ic_reg_maps/gen_adf4360_regs.py delete mode 100755 host/lib/include/gen_adf4360_regs.py (limited to 'host/lib/CMakeLists.txt') diff --git a/host/lib/CMakeLists.txt b/host/lib/CMakeLists.txt index dc4986f8c..58afe099d 100644 --- a/host/lib/CMakeLists.txt +++ b/host/lib/CMakeLists.txt @@ -16,14 +16,6 @@ # -######################################################################## -# Library Includes (not part of API) -######################################################################## -INCLUDE_DIRECTORIES( - ${CMAKE_CURRENT_SOURCE_DIR}/include - ${CMAKE_CURRENT_BINARY_DIR}/include #generated includes -) - ######################################################################## # Setup Python ######################################################################## @@ -92,9 +84,11 @@ UHD_PYTHON_GEN_SOURCE_FILE( ${CMAKE_CURRENT_BINARY_DIR}/transport/vrt.cpp ) +INCLUDE_DIRECTORIES(${CMAKE_CURRENT_BINARY_DIR}/ic_reg_maps) + UHD_PYTHON_GEN_SOURCE_FILE( - ${CMAKE_CURRENT_SOURCE_DIR}/include/gen_adf4360_regs.py - ${CMAKE_CURRENT_BINARY_DIR}/include/adf4360_regs.hpp + ${CMAKE_CURRENT_SOURCE_DIR}/ic_reg_maps/gen_adf4360_regs.py + ${CMAKE_CURRENT_BINARY_DIR}/ic_reg_maps/adf4360_regs.hpp ) ######################################################################## diff --git a/host/lib/ic_reg_maps/gen_adf4360_regs.py b/host/lib/ic_reg_maps/gen_adf4360_regs.py new file mode 100755 index 000000000..702c3060f --- /dev/null +++ b/host/lib/ic_reg_maps/gen_adf4360_regs.py @@ -0,0 +1,169 @@ +#!/usr/bin/env python +# +# Copyright 2008,2009 Free Software Foundation, Inc. +# +# This file is part of GNU Radio +# +# GNU Radio is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either asversion 3, or (at your option) +# any later version. +# +# GNU Radio is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with GNU Radio; see the file COPYING. If not, write to +# the Free Software Foundation, Inc., 51 Franklin Street, +# Boston, MA 02110-1301, USA. + +import re +import sys +from Cheetah.Template import Template +def parse_tmpl(_tmpl_text, **kwargs): + return str(Template(_tmpl_text, kwargs)) + +######################################################################## +# Template for raw text data describing registers +# name addr[bit range inclusive] default optional enums +######################################################################## +REGS_DATA_TMPL="""\ +######################################################################## +## address 0 +######################################################################## +core_power_level 0[2:3] 0 5ma, 10ma, 15ma, 20ma +counter_reset 0[4] 0 normal, reset +muxout_control 0[5:7] 0 3state, dld, ndiv, dvdd, rdiv, nchan_od_ld, sdo, dgnd +phase_detector_polarity 0[8] 0 neg, pos +cp_three_state 0[9] 0 normal, 3state +cp_gain_0 0[10] 0 set1, set2 +mute_till_ld 0[11] 0 dis, enb +output_power_level 0[12:13] 0 3_5ma, 5_0ma, 7_5ma, 11_0ma +#set $current_setting_enums = "0_31, 0_62, 0_93, 1_25, 1_56, 1_87, 2_18, 2_50" +current_setting1 0[14:16] 0 $current_setting_enums +current_setting2 0[17:19] 0 $current_setting_enums +power_down 0[20:21] 0 normal_op=0, async_pd=1, sync_pd=3 +prescaler_value 0[22:23] 0 8_9, 16_17, 32_33 +######################################################################## +## address 2 +######################################################################## +a_counter 2[2:6] 0 +b_counter 2[8:20] 0 +cp_gain_1 2[21] 0 set1, set2 +divide_by_2_output 2[22] 0 fund, div2 +divide_by_2_prescaler 2[23] 0 fund, div2 +######################################################################## +## address 1 +######################################################################## +r_counter 1[2:15] 0 +ablpw 1[16:17] 0 3_0ns, 1_3ns, 6_0ns +lock_detect_precision 1[18] 0 3cycles, 5cycles +test_mode_bit 1[19] 0 +band_select_clock_div 1[20:21] 0 1, 2, 4, 8 +""" + +######################################################################## +# Header and Source templates below +######################################################################## +HEADER_TEXT=""" +#import time + +/*********************************************************************** + * This file was generated by $file on $time.strftime("%c") + **********************************************************************/ + +\#ifndef INCLUDED_ADF4360_REGS_HPP +\#define INCLUDED_ADF4360_REGS_HPP + +\#include + +struct adf4360_regs_t{ +#for $reg in $regs + #if $reg.get_enums() + enum $(reg.get_name())_t{ + #for $i, $enum in enumerate($reg.get_enums()) + #set $end_comma = ',' if $i < len($reg.get_enums())-1 else '' + $(reg.get_name().upper())_$(enum[0].upper()) = $enum[1]$end_comma + #end for + } $reg.get_name(); + #else + boost::$reg.get_stdint_type() $reg.get_name(); + #end if +#end for + + adf4360_regs_t(void){ +#for $reg in $regs + $reg.get_name() = $reg.get_default(); +#end for + } + + enum addr_t{ + ADDR_CONTROL = 0, + ADDR_NCOUNTER = 2, + ADDR_RCOUNTER = 1 + }; + + boost::uint32_t get_reg(addr_t addr){ + boost::uint32_t reg = addr & 0x3; + switch(addr){ + #for $addr in (0, 1, 2) + case $addr: + #for $reg in filter(lambda r: r.get_addr() == addr, $regs) + reg |= (boost::uint32_t($reg.get_name()) & $reg.get_mask()) << $reg.get_shift(); + #end for + break; + #end for + } + return reg; + } +}; + +\#endif /* INCLUDED_ADF4360_REGS_HPP */ +""" + +class reg: + def __init__(self, reg_des): + x = re.match('^(\w*)\s*(\w*)\[(.*)\]\s*(\w*)\s*(.*)$', reg_des) + name, addr, bit_range, default, enums = x.groups() + + #store variables + self._name = name + self._addr = int(addr) + if ':' in bit_range: self._addr_spec = map(int, bit_range.split(':')) + else: self._addr_spec = int(bit_range), int(bit_range) + self._default = int(default) + + #extract enum + self._enums = list() + if enums: + enum_val = 0 + for enum_str in map(str.strip, enums.split(',')): + if '=' in enum_str: + enum_name, enum_val = enum_str.split('=') + enum_val = int(enum_val) + else: enum_name = enum_str + self._enums.append((enum_name, enum_val)) + enum_val += 1 + + def get_addr(self): return self._addr + def get_enums(self): return self._enums + def get_name(self): return self._name + def get_default(self): + for key, val in self.get_enums(): + if val == self._default: return str.upper('%s_%s'%(self.get_name(), key)) + return self._default + def get_stdint_type(self): + if self.get_bit_width() <= 8: return 'uint8_t' + if self.get_bit_width() <= 16: return 'uint16_t' + if self.get_bit_width() <= 32: return 'uint32_t' + if self.get_bit_width() <= 64: return 'uint64_t' + raise Exception, 'too damn big' + def get_shift(self): return self._addr_spec[0] + def get_mask(self): return hex(int('1'*self.get_bit_width(), 2)) + def get_bit_width(self): return self._addr_spec[1] - self._addr_spec[0] + 1 + +if __name__ == '__main__': + regs = map(reg, parse_tmpl(REGS_DATA_TMPL).splitlines()) + open(sys.argv[1], 'w').write(parse_tmpl(HEADER_TEXT, regs=regs, file=__file__)) diff --git a/host/lib/include/gen_adf4360_regs.py b/host/lib/include/gen_adf4360_regs.py deleted file mode 100755 index 702c3060f..000000000 --- a/host/lib/include/gen_adf4360_regs.py +++ /dev/null @@ -1,169 +0,0 @@ -#!/usr/bin/env python -# -# Copyright 2008,2009 Free Software Foundation, Inc. -# -# This file is part of GNU Radio -# -# GNU Radio is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either asversion 3, or (at your option) -# any later version. -# -# GNU Radio is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with GNU Radio; see the file COPYING. If not, write to -# the Free Software Foundation, Inc., 51 Franklin Street, -# Boston, MA 02110-1301, USA. - -import re -import sys -from Cheetah.Template import Template -def parse_tmpl(_tmpl_text, **kwargs): - return str(Template(_tmpl_text, kwargs)) - -######################################################################## -# Template for raw text data describing registers -# name addr[bit range inclusive] default optional enums -######################################################################## -REGS_DATA_TMPL="""\ -######################################################################## -## address 0 -######################################################################## -core_power_level 0[2:3] 0 5ma, 10ma, 15ma, 20ma -counter_reset 0[4] 0 normal, reset -muxout_control 0[5:7] 0 3state, dld, ndiv, dvdd, rdiv, nchan_od_ld, sdo, dgnd -phase_detector_polarity 0[8] 0 neg, pos -cp_three_state 0[9] 0 normal, 3state -cp_gain_0 0[10] 0 set1, set2 -mute_till_ld 0[11] 0 dis, enb -output_power_level 0[12:13] 0 3_5ma, 5_0ma, 7_5ma, 11_0ma -#set $current_setting_enums = "0_31, 0_62, 0_93, 1_25, 1_56, 1_87, 2_18, 2_50" -current_setting1 0[14:16] 0 $current_setting_enums -current_setting2 0[17:19] 0 $current_setting_enums -power_down 0[20:21] 0 normal_op=0, async_pd=1, sync_pd=3 -prescaler_value 0[22:23] 0 8_9, 16_17, 32_33 -######################################################################## -## address 2 -######################################################################## -a_counter 2[2:6] 0 -b_counter 2[8:20] 0 -cp_gain_1 2[21] 0 set1, set2 -divide_by_2_output 2[22] 0 fund, div2 -divide_by_2_prescaler 2[23] 0 fund, div2 -######################################################################## -## address 1 -######################################################################## -r_counter 1[2:15] 0 -ablpw 1[16:17] 0 3_0ns, 1_3ns, 6_0ns -lock_detect_precision 1[18] 0 3cycles, 5cycles -test_mode_bit 1[19] 0 -band_select_clock_div 1[20:21] 0 1, 2, 4, 8 -""" - -######################################################################## -# Header and Source templates below -######################################################################## -HEADER_TEXT=""" -#import time - -/*********************************************************************** - * This file was generated by $file on $time.strftime("%c") - **********************************************************************/ - -\#ifndef INCLUDED_ADF4360_REGS_HPP -\#define INCLUDED_ADF4360_REGS_HPP - -\#include - -struct adf4360_regs_t{ -#for $reg in $regs - #if $reg.get_enums() - enum $(reg.get_name())_t{ - #for $i, $enum in enumerate($reg.get_enums()) - #set $end_comma = ',' if $i < len($reg.get_enums())-1 else '' - $(reg.get_name().upper())_$(enum[0].upper()) = $enum[1]$end_comma - #end for - } $reg.get_name(); - #else - boost::$reg.get_stdint_type() $reg.get_name(); - #end if -#end for - - adf4360_regs_t(void){ -#for $reg in $regs - $reg.get_name() = $reg.get_default(); -#end for - } - - enum addr_t{ - ADDR_CONTROL = 0, - ADDR_NCOUNTER = 2, - ADDR_RCOUNTER = 1 - }; - - boost::uint32_t get_reg(addr_t addr){ - boost::uint32_t reg = addr & 0x3; - switch(addr){ - #for $addr in (0, 1, 2) - case $addr: - #for $reg in filter(lambda r: r.get_addr() == addr, $regs) - reg |= (boost::uint32_t($reg.get_name()) & $reg.get_mask()) << $reg.get_shift(); - #end for - break; - #end for - } - return reg; - } -}; - -\#endif /* INCLUDED_ADF4360_REGS_HPP */ -""" - -class reg: - def __init__(self, reg_des): - x = re.match('^(\w*)\s*(\w*)\[(.*)\]\s*(\w*)\s*(.*)$', reg_des) - name, addr, bit_range, default, enums = x.groups() - - #store variables - self._name = name - self._addr = int(addr) - if ':' in bit_range: self._addr_spec = map(int, bit_range.split(':')) - else: self._addr_spec = int(bit_range), int(bit_range) - self._default = int(default) - - #extract enum - self._enums = list() - if enums: - enum_val = 0 - for enum_str in map(str.strip, enums.split(',')): - if '=' in enum_str: - enum_name, enum_val = enum_str.split('=') - enum_val = int(enum_val) - else: enum_name = enum_str - self._enums.append((enum_name, enum_val)) - enum_val += 1 - - def get_addr(self): return self._addr - def get_enums(self): return self._enums - def get_name(self): return self._name - def get_default(self): - for key, val in self.get_enums(): - if val == self._default: return str.upper('%s_%s'%(self.get_name(), key)) - return self._default - def get_stdint_type(self): - if self.get_bit_width() <= 8: return 'uint8_t' - if self.get_bit_width() <= 16: return 'uint16_t' - if self.get_bit_width() <= 32: return 'uint32_t' - if self.get_bit_width() <= 64: return 'uint64_t' - raise Exception, 'too damn big' - def get_shift(self): return self._addr_spec[0] - def get_mask(self): return hex(int('1'*self.get_bit_width(), 2)) - def get_bit_width(self): return self._addr_spec[1] - self._addr_spec[0] + 1 - -if __name__ == '__main__': - regs = map(reg, parse_tmpl(REGS_DATA_TMPL).splitlines()) - open(sys.argv[1], 'w').write(parse_tmpl(HEADER_TEXT, regs=regs, file=__file__)) -- cgit v1.2.3