From 788fef11ef890c6dcee3be495fc381bcf2990d3b Mon Sep 17 00:00:00 2001 From: Wade Fife Date: Sat, 29 Jan 2022 20:47:36 -0600 Subject: fpga: e31x: Add DRAM support This adds DRAM support to E31x devices. Due to the size of the DDR3 memory controller, it is not enabled by default. You can include the memory controller IP in the build by adding the DRAM environment variable to your build. For example: DRAM=1 make E310_SG3 --- host/include/uhd/rfnoc/core/e310_bsp.yml | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'host/include') diff --git a/host/include/uhd/rfnoc/core/e310_bsp.yml b/host/include/uhd/rfnoc/core/e310_bsp.yml index efd2511f1..3457198b5 100644 --- a/host/include/uhd/rfnoc/core/e310_bsp.yml +++ b/host/include/uhd/rfnoc/core/e310_bsp.yml @@ -8,6 +8,7 @@ transports: clocks: - name: radio + - name: dram io_ports: ctrlport_radio: @@ -22,3 +23,6 @@ io_ports: x300_radio: type: x300_radio drive: master + dram: + type: axi4_mm + drive: slave -- cgit v1.2.3