From ba00ff0cf5c0ced093e0be12b3006fe2f657a58a Mon Sep 17 00:00:00 2001 From: Martin Braun Date: Mon, 21 Feb 2022 11:17:25 +0100 Subject: Remove FSRU-related files The FSRU (aka EISCAT) was never supported in UHD 4.0. The FPGA repository never had the relevant files, and the block controller also never existed. This removes all the corresponding files from MPM, as well as some references from makefiles. --- fpga/usrp3/top/n3xx/setupenv.sh | 1 - 1 file changed, 1 deletion(-) (limited to 'fpga') diff --git a/fpga/usrp3/top/n3xx/setupenv.sh b/fpga/usrp3/top/n3xx/setupenv.sh index bb20a330c..d3057d5ce 100644 --- a/fpga/usrp3/top/n3xx/setupenv.sh +++ b/fpga/usrp3/top/n3xx/setupenv.sh @@ -8,7 +8,6 @@ declare -A PRODUCT_ID_MAP PRODUCT_ID_MAP["N300"]="zynq/xc7z035/ffg900/-2" PRODUCT_ID_MAP["N310"]="zynq/xc7z100/ffg900/-2" PRODUCT_ID_MAP["N320"]="zynq/xc7z100/ffg900/-2" -PRODUCT_ID_MAP["EISCAT"]="zynq/xc7z100/ffg900/-2" # Set default part for simulation export ARCH=zynq -- cgit v1.2.3